CN206251063U - differential Miller bandpass filter - Google Patents
differential Miller bandpass filter Download PDFInfo
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- CN206251063U CN206251063U CN201621408681.6U CN201621408681U CN206251063U CN 206251063 U CN206251063 U CN 206251063U CN 201621408681 U CN201621408681 U CN 201621408681U CN 206251063 U CN206251063 U CN 206251063U
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Abstract
The utility model is related to differential Miller bandpass filter, including amplifier, the first N channel feedback network, the second N channel feedback network and two clock generators；Two clock generators are connected with the first N channel feedback network and the second N channel feedback network respectively；The input X of the first N channel feedback network and amplifier1With output end Y1The input X of connection, the second N channel feedback network and amplifier2With output end Y2Connection, constitutes impedance or trapper.Compared with the prior art, the utility model can increase signal gain, increase the three dB bandwidth of wave filter, effectively reduce chip area, reduce local oscillator branch road power consumption.
Description
Technical field
The utility model is related to wave filter technology field, more particularly to for the differential Miller band of radio-frequency channel selection
Bandpass filter.
Background technology
Modern civilian and military applications are various using electronic equipment, and electromagnetic environment is complicated, interfere serious.Usually,
Communication device transceivers on car, ship and aircraft are all integrated.Therefore, radio-frequency transmitter is needed from real rugged environment
In detect required small-signal.Because the power of interference signal may be much larger than required signal power, this will
Receiver is asked to possess good selectivity, and wave filter just act as the role of Channel assignment.
Therefore the bandpass filter being applied in wireless receiver is needed with good selectivity, dynamic range wide and
Free adjustable centre frequency.Active RC filter, its characterisitic parameter is relevant with RC time constants, and integrated resistor and integrated electricity
The precision of appearance is very poor, and correct time constant is difficult to obtain.OTA-C filter has circuit simple, program-controlled, it is easy to collect
Into advantage, however it is necessary that being traded off between power consumption, quality factor and centre frequency.
Traditional N channel filter unit is to produce circuit to constitute by N number of passage and sampling pulse, and each passage has identical
Transfer function H (j ω).When H (j ω) be made up of passive RC being applied to N channel filter unit, though can obtain a very narrow band
Width, but can but take very big chip area and with less dynamic range.
Utility model content
The purpose of this utility model is to provide differential Miller bandpass filter, and technical problem to be solved is：Gain compared with
Small, the free adjustable extent of centre frequency is narrower, and chip volume is big.
The technical scheme that the utility model solves above-mentioned technical problem is as follows：Differential Miller bandpass filter, including amplify
Device, the first N channel feedback network, the second N channel feedback network and two clock generators；
The amplifier, for carrying out differential input signal, while carrying out input matching, increase input by resistance feedback
The voltage gain of signal, carries out signal amplification；It is additionally operable to carry out difference output to filtered signal；
Two clock generators, are connected with the first N channel feedback network and the second N channel feedback network respectively, point
Periodic sampling pulse sequence be used to not be generated to transmit to the first N channel feedback network and the second N channel feedback network；
The first N channel feedback network, the input X with amplifier1With output end Y1Connection, constitutes impedance or trap
Device；For weakening the signal beyond channel, centre frequency adjustment and conducting operation are carried out according to sampling pulse sequence, after amplification
Signal be filtered；
The second N channel feedback network, the input X with amplifier2With output end Y2Connection, constitutes impedance or trap
Device；For weakening the signal beyond channel, centre frequency adjustment and conducting operation are carried out according to sampling pulse sequence, after amplification
Signal be filtered.
The beneficial effects of the utility model are：Amplifier can increase signal gain, promotion signal amplification efficiency；Amplifier,
Two clock generators, the first N channel feedback network and the second N channel feedback network coordinate operations, can increase signal increasing
Benefit, increases the three dB bandwidth of wave filter, effectively reduces chip area, reduces local oscillator branch road power consumption.
On the basis of above-mentioned technical proposal, the utility model can also do following improvement.
Further, the amplifier is three-level signal structure for amplifying, and three-level signal amplification is carried out to differential input signal, and
It is connected with two power supplys, two power supplys are powered for it.
Beneficial effect using above-mentioned further scheme is：Three-level signal structure for amplifying, promotion signal gain amplifier, two
The stability that power booster signal amplifies.
Further, the amplifier includes PMOS Mp1, PMOS Mp2, NOMS pipes Mn1, NOMS pipes Mn2, NOMS pipes Mn3、
NOMS pipes Mn4, NOMS pipes Mn5, NOMS pipes Mn6, resistance R1, resistance R2, resistance R3, resistance R4, resistance RF1, resistance RF2And current source
IDC；
PMOS Mp1Source electrode and PMOS Mp2Source electrode be connected with power positive end VDD+, PMOS Mp1Grid with
NOMS pipes Mn1Grid be connected, and with input X1Connection；PMOS Mp1Drain electrode and NOMS pipes Mn1Drain electrode with NOMS manage
Mn3Grid connection；PMOS Mp2Grid and NOMS pipes Mn2Grid be connected, and with input X2Connection, PMOS Mp2's
Drain electrode and NOMS pipes Mn2Drain electrode with NOMS pipes Mn4Grid connection；NOMS pipes Mn1Source electrode and NOMS pipes Mn2Source electrode it is equal
The first terminal with current source IDC is connected, and the Second terminal of current source IDC is connected with power supply negative terminal VDD-；
NOMS pipes Mn3Source electrode and NOMS pipes Mn4Source electrode be connected with power supply negative terminal VDD-, NOMS pipes Mn3Drain electrode warp
Resistance R1It is connected with power positive end VDD+；NOMS pipes Mn4Drain electrode through resistance R2It is connected with power positive end VDD+；NOMS pipes Mn5's
Source electrode and NOMS pipes Mn6Source electrode be connected with power supply negative terminal VDD-；
NOMS pipes Mn5Grid and NOMS pipes Mn3Drain electrode connection, NOMS pipes Mn6Grid and NOMS pipes Mn4Drain electrode connect
Connect；NOMS pipes Mn5Source electrode and NOMS pipes Mn6Source electrode be connected with power supply negative terminal VDD-；NOMS pipes Mn5Drain electrode through resistance
R3 is connected with power positive end VDD+, also with output end Y1Connection；NOMS pipes Mn6Drain electrode connect through resistance R4 and power positive end VDD+
Connect, also with output end Y2Connection；
Input X1Through feedback resistance RF1With output end Y1Connection；Input X2Through feedback resistance RF2With output end Y2Connection.
Beneficial effect using above-mentioned further scheme is：Three-level signal structure for amplifying, promotion signal gain amplifier.
Further, two clock generators are the different N phase non-overlapped clock generators of clock frequency, and a N leads to
The frequency of road feedback network and the second N channel feedback network sampling pulse sequence respectively according to its corresponding clock generator is adjusted
Whole its centre frequency.
Beneficial effect using above-mentioned further scheme is：Different, the control by two clock frequencies of clock generator
The centre frequency of the first N channel feedback network and the second N channel feedback network, and difference is carried out, required center can be obtained
Frequency, and increase the three dB bandwidth of the present apparatus；The increase free adjustable extent of centre frequency；While two clocks of clock generator
Frequency has good phase characteristic；Non-collapsible N phaseswitch control signals are produced not need extra logic circuit, thus
Extra error would not be introduced.
Further, the input clock frequency of two clock generators is respectively f1、f2, f1=fo-Δf、f2=fo+ Δ f, its
Middle foIt is frequency filtering, Δ f is side-play amount；Two clock generators control the first N channel feedback network 2 and the 2nd N logical respectively
The centre frequency of road feedback network 3 is also respectively f1、f2。
Beneficial effect using above-mentioned further scheme is：First N channel feedback network 2 and the second N channel feedback network 3
Centre frequency one rise another decline；By in the first N channel feedback network 2 and the second N channel feedback network 3
Frequency of heart is f1、f2Carry out difference, wherein f1=fo-Δf、f2=fo+ Δ f, can obtain a centre frequency for fo, 3dB bands
The wave filter of width increase；Two clock generators 4 generate the rising edge that periodic sampling pulse sequence has only used clock, when
Clock generator 4 has good phase characteristic；In addition, producing non-collapsible N phaseswitch control signals not need extra logic
Circuit, thus would not also introduce extra error.
Further, two clock generator structures are identical, including N number of d type flip flop, N >=1；Each d type flip flop
D end of the Q ends with its latter d type flip flop be connected, the Q ends phase of first D end of d type flip flop and last d type flip flop
Even；The Q ends of each d type flip flop export a sampling pulse sequence.
Beneficial effect using above-mentioned further scheme is：The generation nonoverlapping control of N phases can be triggered by N number of d type flip flop
Signal processed, the first N channel feedback network of control and the second N channel feedback network carry out on and off, lifting control accuracy and
Efficiency.
Further, the first N channel feedback network is serially connected in input X1With output end Y1Between；Second N channel
Feedback network is serially connected in input X2With output end Y2Between；The first N channel feedback network and the second N channel feedback network
Structure is consistent, including N number of switching capacity branch road, N >=1；N number of switching capacity branch circuit parallel connection.
Beneficial effect using above-mentioned further scheme is：Using the Miller effect and capacitance multiplication techniques, core is effectively reduced
The area of piece, reduces local oscillator branch road power consumption.
Further, each switching capacity branch road includes switch S1, electric capacity CFWith switch S2, the switch S1, electric capacity CF
It is sequentially connected in series with switch S2.
Beneficial effect using above-mentioned further scheme is：Simple structure, switch S1 and switch S2 can reduce posting for electric capacity
Coming into force should.
Further, the span of N is：2≤N≤16, and N is even positive integer.
Another technical scheme that the utility model solves above-mentioned technical problem is as follows：Signal filtering method, based on difference rice
Bandpass filter is strangled, is comprised the following steps：
Step S1. amplifiers carry out differential input signal, carry out three-level amplification, while carrying out input by resistance feedback
Match somebody with somebody, increase the voltage gain of input signal, carry out signal amplification；
Two clock generators of step S2. are respectively used to generate periodic sampling pulse sequence and transmit to the first N channel
Feedback network and the second N channel feedback network；
Signal beyond step S3. the first N channel feedback networks and the second N channel feedback network reduction channel, according to taking
Sample pulse train carries out centre frequency adjustment and conducting operation, and the signal after amplification is filtered；
Step S4. amplifiers carry out difference output to filtered signal.
The beneficial effects of the utility model are：Amplifier can increase signal gain, promotion signal amplification efficiency；Amplifier,
Two clock generators, the first N channel feedback network and the second N channel feedback network coordinate operations, can increase signal increasing
Benefit, increases the three dB bandwidth of wave filter, effectively reduces chip area, reduces local oscillator branch road power consumption.
Brief description of the drawings
Fig. 1 is the module frame chart of the utility model differential Miller bandpass filter；
Fig. 2 is the circuit theory diagrams of amplifier, the first N channel feedback network and the second N channel feedback network；
Fig. 3 is the circuit theory diagrams of amplifier；
Fig. 4 is the circuit theory diagrams of clock generator；
Fig. 5 is the output pulse sequence figure of clock generator；
Fig. 6 is the circuit theory diagrams of d type flip flop；
Fig. 7 is the circuit theory diagrams of the circuit of the first N channel feedback network or the second N channel feedback network；
Fig. 8 is the simplified circuit theory diagrams of the utility model differential Miller bandpass filter；
Fig. 9 is the equivalent circuit figure of Fig. 8；
Figure 10 is the simplified model figure of the utility model differential Miller bandpass filter；
Figure 11 is the frequency characteristic figure of the utility model differential Miller bandpass filter；
Figure 12 is the frequency-adjustable scope curve of the utility model differential Miller bandpass filter.
In accompanying drawing, the list of parts representated by each label is as follows：
1st, amplifier, the 2, first N channel feedback network, the 3, second N channel feedback network, 4, clock generator.
Specific embodiment
Principle of the present utility model and feature are described below in conjunction with accompanying drawing, example is served only for explaining this practicality
It is new, it is not intended to limit scope of the present utility model.
As depicted in figs. 1 and 2, differential Miller bandpass filter, including amplifier 1, the first N channel feedback network 2, second
N channel feedback network 3 and two clock generators 4；
The amplifier 1, for carrying out differential input signal, while carrying out input matching by resistance feedback, increases defeated
Enter the voltage gain of signal, carry out signal amplification；It is additionally operable to carry out difference output to filtered signal；
Two clock generators 4, are connected with the first N channel feedback network 2 and the second N channel feedback network 3 respectively,
It is respectively used to generate periodic sampling pulse sequence and transmits to the first N channel feedback network 2 and the second N channel feedback network 3；
The first N channel feedback network 2, the input X with amplifier 11With output end Y1Connection, constitutes impedance or falls into
Ripple device；For weakening the signal beyond channel, centre frequency adjustment and conducting operation are carried out according to sampling pulse sequence, to amplifying
Signal afterwards is filtered；
The second N channel feedback network 3, the input X with amplifier 12With output end Y2Connection, constitutes impedance or falls into
Ripple device；For weakening the signal beyond channel, centre frequency adjustment and conducting operation are carried out according to sampling pulse sequence, to amplifying
Signal afterwards is filtered.
In above-described embodiment, 1, two clock generators 4 of amplifier, the first N channel feedback network 2 and the 2nd N lead to
The coordinate operation of road feedback network 3, can increase signal gain, increase the three dB bandwidth of wave filter, effectively reduce chip area, drop
Low local oscillator branch road power consumption.
Optionally, as one embodiment of the present utility model：The amplifier 1 is three-level signal structure for amplifying, to difference
Point input signal carries out three-level signal amplification, and is connected with two power supplys, and two power supplys are its power supply.
In above-described embodiment, three-level signal structure for amplifying, promotion signal gain amplifier, what two power booster signals amplified
Stability.
Optionally, as one embodiment of the present utility model：As shown in figure 3, the amplifier 1 includes PMOS Mp1、
PMOS Mp2, NOMS pipes Mn1, NOMS pipes Mn2, NOMS pipes Mn3, NOMS pipes Mn4, NOMS pipes Mn5, NOMS pipes Mn6, resistance R1, resistance
R2, resistance R3, resistance R4, resistance RF1, resistance RF2With current source IDC；
PMOS Mp1Source electrode and PMOS Mp2Source electrode be connected with power positive end VDD+, PMOS Mp1Grid with
NOMS pipes Mn1Grid be connected, and with input X1Connection；PMOS Mp1Drain electrode and NOMS pipes Mn1Drain electrode with NOMS manage
Mn3Grid connection；PMOS Mp2Grid and NOMS pipes Mn2Grid be connected, and with input X2Connection, PMOS Mp2's
Drain electrode and NOMS pipes Mn2Drain electrode with NOMS pipes Mn4Grid connection；NOMS pipes Mn1Source electrode and NOMS pipes Mn2Source electrode it is equal
The first terminal with current source IDC is connected, and the Second terminal of current source IDC is connected with power supply negative terminal VDD-；
NOMS pipes Mn3Source electrode and NOMS pipes Mn4Source electrode be connected with power supply negative terminal VDD-, NOMS pipes Mn3Drain electrode warp
Resistance R1It is connected with power positive end VDD+；NOMS pipes Mn4Drain electrode through resistance R2It is connected with power positive end VDD+；NOMS pipes Mn5's
Source electrode and NOMS pipes Mn6Source electrode be connected with power supply negative terminal VDD-；
NOMS pipes Mn5Grid and NOMS pipes Mn3Drain electrode connection, NOMS pipes Mn6Grid and NOMS pipes Mn4Drain electrode connect
Connect；NOMS pipes Mn5Source electrode and NOMS pipes Mn6Source electrode be connected with power supply negative terminal VDD-；NOMS pipes Mn5Drain electrode through resistance
R3 is connected with power positive end VDD+, also with output end Y1Connection；NOMS pipes Mn6Drain electrode connect through resistance R4 and power positive end VDD+
Connect, also with output end Y2Connection；
Input X1Through feedback resistance RF1With output end Y1Connection；Input X2Through feedback resistance RF2With output end Y2Connection.
In above-described embodiment, three-level signal structure for amplifying, promotion signal gain amplifier.
Optionally, as one embodiment of the present utility model：Two clock generators 4 are that clock frequency is different
N phase non-overlapped clock generators, the first N channel feedback network 2 and the second N channel feedback network 3 respectively according to its it is corresponding when
The frequency of the sampling pulse sequence of clock generator 4 adjusts its centre frequency.
It is different by two clock frequencies of clock generator 4 in above-described embodiment, control the first N channel feedback network 2
With the centre frequency of the second N channel feedback network 3, and difference is carried out, required centre frequency can be obtained, and increase the present apparatus
Three dB bandwidth；The clock frequency of two clock generators 4 has good phase characteristic simultaneously；Produce non-collapsible N phaseswitch
Control signal does not need extra logic circuit, thus would not introduce extra error yet.
Optionally, as one embodiment of the present utility model：The input clock frequency of two clock generators 4 is respectively
f1、f2, f1=fo-Δf、f2=fo+ Δ f, wherein foIt is frequency filtering, Δ f is side-play amount；Two clock generators 4 are controlled respectively
The centre frequency for making the first N channel feedback network 2 and the second N channel feedback network 3 is also respectively f1、f2。
In above-described embodiment, one rising of centre frequency of the first N channel feedback network 2 and the second N channel feedback network 3
Another declines；It is f by the centre frequency to the first N channel feedback network 2 and the second N channel feedback network 31、f2Differed from
Point, wherein f1=fo-Δf、f2=fo+ Δ f, can obtain a centre frequency for fo, the wave filter of three dB bandwidth increase；
Two clock generators 4 generate the rising edge that periodic sampling pulse sequence has only used clock, the clock
Generator 4 has good phase characteristic；In addition, producing non-collapsible N phaseswitch control signals not need extra logic electricity
Road, thus would not also introduce extra error.
Optionally, as one embodiment of the present utility model：As shown in figure 4, two structure phases of the clock generator 4
Together, including N number of d type flip flop, N >=1；D end of the Q ends of each d type flip flop with its latter d type flip flop is connected, and first
The D ends of individual d type flip flop are connected with the Q ends of last d type flip flop；The Q ends of each d type flip flop export a sampling pulse
Sequence.
In above-described embodiment, clock generator 4 is connected in the form of ring-type by N number of d type flip flop and constituted；Output pulse sequence
Figure is as shown in Figure 5；On startup, the output end voltage of first d type flip flop is configured to supply voltage VDD, other N-1 D
The output end of trigger is connected to the ground；Then, a clock input signal activates N number of d type flip flop, so as in N number of d type flip flop
It is the nonoverlapping control signal of N phases of 1/N that Q ends produce dutycycle；The structure of each d type flip flop is as shown in Figure 6；External clock control
Cmos transmission gate processed is turned on and off.
Two clock generators 4 are used for being provided periodically to the first N channel feedback network 2 and the second N channel feedback network 3
Sampling pulse sequence, Fig. 7 show the structured flowchart of the first N channel feedback network 2 or the second N channel feedback network 3, by N
Individual passage and sampling control circuit with identical transfer function H (j ω) are constituted；N channel filtering general principle be：It is N number of
Sampling pulse sequence is respectively acting on N number of passage, makes it periodically to input signal Sampling Integral in turn, so its output electricity
Pressure transfer function be：
Wherein, H (s) is the transmission function of single passage, and N is channel number, ωoIt is the input clock angle of clock generator
Frequency, is also the centre frequency of N channel filter network；So, filter can easily be adjusted by controlling the frequency of clock signal
The centre frequency of ripple device.
Because amplifier 1 is symmetrical structure, in order to simplify calculating, by the one end of amplifier 1 ground connection, the unilateral Miller filtering of analysis
Device circuit；The utility model differential Miller bandpass filter is reduced to circuit diagram as shown in Figure 8, wherein the first N channel is fed back
The N channel feedback network 3 of network 2 or second can regard an impedance Z F or a notch filter H (S) as, as viewed from ZF ends
Equivalent circuit as shown in figure 9, then its impedance equation is：
Capacitor cell CF(1+A is increased to again0)CF, sizable area is saved, here it is capacitance multiplication techniques；Switch
Conducting resistance reduces (1+A0) times, scaled power consumption.
Figure 10 show the simplified model figure of the utility model differential Miller bandpass filter, and amplifier (LNA) 1 uses three
Level structure for amplifying, for signal provides certain voltage gain A0；Two N channel feedback networks based on low noise amplifier, all make
N channel filtering technique is used, H is used1The transmission function of the first N channel feedback network 2 is represented, H is used2Represent the second N channel feedback network
3 transmission function；Wherein, every the two of branch road switch all by same phase local oscillation signal drive, using two switch
Purpose is to reduce the ghost effect of electric capacity；By calculating, the voltage gain of wave filter can be obtained：
Optionally, as one embodiment of the present utility model：The first N channel feedback network 2 is serially connected in input
X1With output end Y1Between；The second N channel feedback network 3 is serially connected in input X2With output end Y2Between；First N
Passage feedback network 2 is consistent with the structure of the second N channel feedback network 3, including N number of switching capacity branch road, N >=1；N number of switch
Capacitive branch is in parallel.
Optionally, as one embodiment of the present utility model：Each switching capacity branch road includes switch S1, electric capacity
CFWith switch S2, the switch S1, electric capacity CFIt is sequentially connected in series with switch S2.
In above-described embodiment, using the Miller effect and capacitance multiplication techniques, the area of chip is effectively reduced, reduce local oscillator branch
Road power consumption
Optionally, as one embodiment of the present utility model：The span of N is：2≤N≤16, and N is even just whole
Number, and the value of N is 8.
In above-described embodiment, the first N channel feedback network 2 and the second N channel feedback network 3 are used as an impedance or sunken
Ripple device, for weakening the signal beyond channel, N number of switching capacity branch of the first N channel feedback network 2 route a period of time clock generator
4 controls, switch S1 and switch S2 in each N number of switching capacity branch road are controlled by the clock signal of same phase；2nd N leads to
N number of switching capacity branch of road feedback network 3 route another clock generator 4, switch S1 in each N number of switching capacity branch road and
Switch S2 is controlled by the clock signal of same phase；The ghost effect of electric capacity can be reduced using switch S1 and switch S2；
First N channel feedback network 2 and the second N channel feedback network 3 are respectively f by clock frequency1、f2Two clocks
Control, and f1=fo- Δ f and f2=fo+ Δ f, then for the first N channel feedback network 2 and the second N channel feedback network 3, its
Transmission function is respectively T1(S)、T2(S), then：
Wherein R=RSW+RSFor RSIt is the internal resistance of source, RSWIt is the master switch resistance on a switching capacity branch road, C is one
Capacitance on the N number of switching capacity branch road of bar, N is port number, ω1、ω2Respectively the first N channel feedback network 2 and the 2nd N are logical
The centre frequency of road feedback network 3, and ω1=ωo- Δ ω, ω2=ωo+ Δ ω, the first N channel feedback network 2 and the 2nd N
The sample frequency of each channel transfer function of passage feedback network 3 is respectively N ω1、Nω2, its passband width is all：
First N channel feedback network 2 with the second N channel feedback network 3 except centre frequency is different, respectively f1、f2,
Relative to required frequency foAll shifted by delta f, one rises Δ f another decline Δ f, other side is all identical, to first
The N channel feedback network 3 of N channel feedback network 2 and second does difference, and available result is that a centre frequency is foFilter
Ripple device, and the three dB bandwidth of difference postfilter is bigger than single N channel wave filter three dB bandwidth；Then two N channel feedback networks
Differentiated transmission function is：
Signal filtering method, based on differential Miller bandpass filter, comprises the following steps：
Step S1. amplifiers 1 carry out differential input signal, carry out three-level amplification, while being input into by resistance feedback
Matching, increases the voltage gain of input signal, carries out signal amplification；
Two clock generators 4 of step S2. are respectively used to generate periodic sampling pulse sequence and transmit to the first N channel
The N channel feedback network 3 of feedback network 2 and second；
Signal beyond the first N channels of step S3. feedback network 2 and the reduction channel of the second N channel feedback network 3, according to
Sampling pulse sequence carries out centre frequency adjustment and conducting operation, and the signal after amplification is filtered；
Step S4. amplifiers 1 carry out difference output to filtered signal.
In above-described embodiment, amplifier 1 can increase signal gain, promotion signal amplification efficiency；Amplifier, two it is described when
Clock generator 4, the first N channel feedback network 2 and the coordinate operation of the second N channel feedback network 3, can increase signal gain, increase
The three dB bandwidth of wave filter, effectively reduces chip area, reduces local oscillator branch road power consumption.
Figure 11 is fo=1GHZ, during Δ f=5MHZ, the frequency of 8 passage differential Miller bandpass filter of the present utility model
Performance plot, the three dB bandwidth of single-ended Miller bandpass filter is 30MHZ, a width of 40MHZ of band of differential Miller bandpass filter；Figure
The 12 frequency-adjustable scope curves for showing 8 passage differential Miller bandpass filter of the present utility model, frequency-adjustable scope is
0.2GHZ~2.3GHZ, gain is 27.7dB~26.0dB.It can be seen that, by using low noise amplifier, effectively increase wave filter
Gain；By using the Miller effect and capacitance multiplication techniques, effectively reduce chip area, reduce local oscillator branch road power consumption；Use
The method that the N channel filter network that two centre frequencies are slightly different does difference, the effective three dB bandwidth for increasing wave filter.This
Bandpass filter designed by utility model, for radio-frequency receiver front-end, it is possible to achieve carry out letter in the input of receiver
Road is selected.
Preferred embodiment of the present utility model is the foregoing is only, is not used to limit the utility model, it is all in this practicality
Within new spirit and principle, any modification, equivalent substitution and improvements made etc. should be included in guarantor of the present utility model
Within the scope of shield.
Claims (9)
1. differential Miller bandpass filter, it is characterised in that including amplifier (1), the first N channel feedback network (2), the 2nd N
Passage feedback network (3) and two clock generators (4)；
Two clock generators (4) connect with the first N channel feedback network (2) and the second N channel feedback network (3) respectively
Connect；
The first N channel feedback network (2) and the input X of amplifier (1)1With output end Y1Connection, second N channel
The input X of feedback network (3) and amplifier (1)2With output end Y2Connection, constitutes impedance or trapper.
2. differential Miller bandpass filter according to claim 1, it is characterised in that the amplifier (1) is three-level letter
Number structure for amplifying, three-level signal amplification is carried out to differential input signal, and is connected with two power supplys, and two power supplys are its power supply.
3. differential Miller bandpass filter according to claim 1, it is characterised in that the amplifier (1) is including PMOS
Pipe Mp1, PMOS Mp2, NOMS pipes Mn1, NOMS pipes Mn2, NOMS pipes Mn3, NOMS pipes Mn4, NOMS pipes Mn5, NOMS pipes Mn6, resistance R1、
Resistance R2, resistance R3, resistance R4, resistance RF1, resistance RF2With current source IDC；
PMOS Mp1Source electrode and PMOS Mp2Source electrode be connected with power positive end VDD+, PMOS Mp1Grid and NOMS
Pipe Mn1Grid be connected, and with input X1Connection；PMOS Mp1Drain electrode and NOMS pipes Mn1Drain electrode with NOMS pipes Mn3's
Grid is connected；PMOS Mp2Grid and NOMS pipes Mn2Grid be connected, and with input X2Connection, PMOS Mp2Drain electrode
With NOMS pipes Mn2Drain electrode with NOMS pipes Mn4Grid connection；NOMS pipes Mn1Source electrode and NOMS pipes Mn2Source electrode with electricity
The first terminal connection of stream source IDC, the Second terminal of current source IDC is connected with power supply negative terminal VDD-；
NOMS pipes Mn3Source electrode and NOMS pipes Mn4Source electrode be connected with power supply negative terminal VDD-, NOMS pipes Mn3Drain electrode through resistance
R1It is connected with power positive end VDD+；NOMS pipes Mn4Drain electrode through resistance R2It is connected with power positive end VDD+；NOMS pipes Mn5Source electrode
With NOMS pipes Mn6Source electrode be connected with power supply negative terminal VDD-；
NOMS pipes Mn5Grid and NOMS pipes Mn3Drain electrode connection, NOMS pipes Mn6Grid and NOMS pipes Mn4Drain electrode connection；
NOMS pipes Mn5Source electrode and NOMS pipes Mn6Source electrode be connected with power supply negative terminal VDD-；NOMS pipes Mn5Drain electrode through resistance R3 with
Power positive end VDD+ is connected, also with output end Y1Connection；NOMS pipes Mn6Drain electrode be connected with power positive end VDD+ through resistance R4, also
With output end Y2Connection；
Input X1Through feedback resistance RF1With output end Y1Connection；Input X2Through feedback resistance RF2With output end Y2Connection.
4. differential Miller bandpass filter according to claim 1, it is characterised in that two clock generators (4)
For the different N phase non-overlapped clock generators of clock frequency, the first N channel feedback network (2) and the second N channel feedback network
(3) frequency of sampling pulse sequence respectively according to its corresponding clock generator (4) adjusts its centre frequency.
5. differential Miller bandpass filter according to claim 4, it is characterised in that two clock generators (4) it is defeated
Enter clock frequency respectively f1、f2, f1=fo-Δf、f2=fo+ Δ f, wherein foIt is frequency filtering, Δ f is side-play amount；At two
Clock generator (4) controls the first N channel feedback network 2 and the centre frequency of the second N channel feedback network 3 to be also respectively respectively
f1、f2。
6. differential Miller bandpass filter according to claim 1, it is characterised in that two clock generators (4)
Structure is identical, including N number of d type flip flop, N >=1；The Q ends of each d type flip flop with the D ends phase of its latter d type flip flop
Even, first D end of d type flip flop is connected with the Q ends of last d type flip flop；The Q ends of each d type flip flop export one
Sampling pulse sequence.
7. differential Miller bandpass filter according to claim 1, it is characterised in that the first N channel feedback network
(2) it is serially connected in input X1With output end Y1Between；The second N channel feedback network (3) is serially connected in input X2And output end
Y2Between；The first N channel feedback network (2) is consistent with second N channel feedback network (3) structure, including N number of switch electricity
Hold branch road, N >=1；N number of switching capacity branch circuit parallel connection.
8. differential Miller bandpass filter according to claim 7, it is characterised in that each switching capacity branch road is wrapped
Include switch S1, electric capacity CFWith switch S2, the switch S1, electric capacity CFIt is sequentially connected in series with switch S2.
9. differential Miller bandpass filter according to claim 7, it is characterised in that the span of N is：2≤N≤
16, and N is even positive integer.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109560775A (en) * | 2017-09-27 | 2019-04-02 | 深圳市中兴微电子技术有限公司 | A kind of amplifier circuit in low noise |
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2016
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109560775A (en) * | 2017-09-27 | 2019-04-02 | 深圳市中兴微电子技术有限公司 | A kind of amplifier circuit in low noise |
| CN109560775B (en) * | 2017-09-27 | 2023-04-14 | 深圳市中兴微电子技术有限公司 | Low-noise amplifier circuit |
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