CN206208984U - A kind of thunder energy counting circuit based on FPGA - Google Patents
A kind of thunder energy counting circuit based on FPGA Download PDFInfo
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- CN206208984U CN206208984U CN201621181409.9U CN201621181409U CN206208984U CN 206208984 U CN206208984 U CN 206208984U CN 201621181409 U CN201621181409 U CN 201621181409U CN 206208984 U CN206208984 U CN 206208984U
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Abstract
The utility model discloses a kind of thunder energy counting circuit based on FPGA, the circuit includes voltage transformer, current transformer, the first ADC, the second ADC and FPGA module, after the voltage scale step-down of thunder and lightning is carried out voltage acquisition by the voltage transformer through the first ADC, export carries out voltage effective value calculating to the FPGA module；The electric current of thunder and lightning is dropped stream by the current transformer in proportion, and after carrying out current acquisition through the second ADC, export carries out current effective value calculating to the FPGA module.The utility model realizes the collection and calculating of lightning voltage and electric current, and so as to calculate the power and energy of thunder and lightning, research, analysis Lightning Disaster accident for thunder and lightning, monitoring and maintenance especially to lightning protection facility are respectively provided with highly important meaning.
Description
Technical field
The utility model is related to metering instrument field, more particularly to a kind of to be based on FPGA（Field programmable gate array）Thunder
Electric flux counting circuit.
Background technology
Thunderbolt is a kind of ancient and common natural phenomena, its essence be between spatial charging cloud layer or powered cloud layer with
Electric discharge between ground object, thunder and lightning contains huge energy, and voltage when thunderbolt directly occurs is high, and thunderbolt core can be produced
The great discharge current of life, the direct destructive power of direct lightning strike and its injury to the mankind are commonly known, thus to thunder and lightning
Detection and protection have become more and more important now.
At present, design and installation lightning protection facility turns into the common methods in lightning protection mitigation, so to acting on lightning protection facility
Lightning current, voltage, and energy collection and calculating, research for thunder and lightning, analysis Lightning Disaster accident, especially to lightning protection
The maintenance of facility is respectively provided with highly important meaning.
Thus prior art could be improved and improve.
Utility model content
In view of above-mentioned the deficiencies in the prior art part, the purpose of this utility model is to provide a kind of thunder and lightning based on FPGA
Circuit for calculating energy, can gather and calculate the voltage and current value of thunder and lightning.
In order to achieve the above object, the utility model takes following technical scheme：
A kind of thunder energy counting circuit based on FPGA, the circuit includes voltage transformer, current transformer, first
Be depressured the voltage scale of thunder and lightning through an ADC moulds by ADC, the second ADC and FPGA module, the voltage transformer
After block carries out voltage acquisition, export carries out voltage effective value calculating to the FPGA module；The current transformer is by thunder and lightning
Stream drops in electric current in proportion, and after carrying out current acquisition through the second ADC, export carries out current effective value meter to the FPGA module
Calculate.
Specifically, first ADC include first resistor, second resistance, 3rd resistor, the first operational amplifier,
First electric capacity, the second electric capacity and the first analog-digital converter, one end of the first resistor connect the voltage transformer, and described the
The other end of one resistance is grounded by the second resistance, also connects the positive input terminal of first operational amplifier, described
The negative input end of one operational amplifier connects the positive input terminal of the first operational amplifier, the negative input of first operational amplifier
The output end of the first operational amplifier of end connection and one end of the 3rd resistor, the other end connection of the 3rd resistor are described
The VIN ends of the first analog-digital converter, also by the first capacity earth, the GND ends and EPAD ends of first analog-digital converter are equal
Ground connection, the vdd terminal connection+A3.3V feeder ears of first analog-digital converter, the REGCAP ends of first analog-digital converter lead to
Cross second capacity earth, the SDO ends of first analog-digital converter, SCLK ends,End andEnd connects
Connect the FPGA module.
Specifically, second ADC include the 4th resistance, the 5th resistance, the 6th resistance, the second operational amplifier,
3rd electric capacity, the 4th electric capacity and the second analog-digital converter, one end of the 4th resistance connect the current transformer, and described the
The other end of four resistance also connects the positive input terminal of second operational amplifier by the 5th resistance eutral grounding, and described the
The negative input end of two operational amplifiers connects the output end of the second operational amplifier and one end of the 6th resistance, the described 6th
The other end of resistance connects the VIN ends of second analog-digital converter, also by the 3rd capacity earth, second analog-to-digital conversion
The GND ends and EPAD ends of device are grounded, the vdd terminal connection+A3.3V feeder ears of second analog-digital converter, second mould
The REGCAP ends of number converter by the 4th capacity earth, the SDO ends of second analog-digital converter, SCLK ends,
End andEnd is all connected with the FPGA module.
Further, the FPGA module of stating includes fpga chip, the 7th resistance, the 8th resistance, the 9th resistance, the tenth electricity
Resistance and memory, the IO_L62N_D6_2D6 ends of the fpga chip connect first analog-digital converterEnd, it is described
The IO_L64N_D9_2 ends of fpga chip connect the SDO ends of first analog-digital converter, the IO_L64P_ of the fpga chip
D8_2 ends connect the SCLK ends of first analog-digital converter, the IO_L62P_D5_2 ends connection described first of the fpga chip
Analog-digital converterEnd, the IO_L48N_RDWR_B_VREF_2 ends of the fpga chip connect second mould
Number converterEnd, the IO_49N_D4_2 ends of the fpga chip connect the SDO ends of second analog-digital converter, institute
The IO_L49P_D3_2 ends for stating fpga chip connect the SCLK ends of second analog-digital converter, the IO_ of the fpga chip
L48P_D7_2 ends connect second analog-digital converterEnd, the IO_L1P_CCLK_2 ends of the fpga chip
The SCK ends of the memory, the IO_L3P_D0_D1N_MISO_MISO1_ of the fpga chip are connected by the 7th resistance
2 ends connect the SO/DQ1 ends of the memory, and the IO_L3N_MOSI_CSI_B_MISO0_2 ends connection of the fpga chip is described
The SI/DQ0 ends of memory, the IO_L12P_D1_MISO2_2 ends of the fpga chip connect the memory/ DQ2 ends,
+ 3.3V feeder ears are connected also by the 8th resistance, the IO_L12N_D2_MISO3_2 ends connection of the fpga chip is described
The HOLD/DQ3 ends of memory ,+3.3V feeder ears are connected also by the 9th resistance, the memoryEnd is by institute
State the tenth resistance connection+3.3V feeder ears, the GND ends ground connection of the memory.
Specifically, the model of first operational amplifier and the second operational amplifier is LMV358.
Specifically, the model of first analog-digital converter and the second analog-digital converter is AD7091.
Specifically, the model XC6SLX9-2TQG144C of the fpga chip.
Specifically, the model W25Q64 of the memory.
Compared to the thunder energy counting circuit based on FPGA that prior art, the utility model are provided, by using electricity
After pressing transformer that step-down treatment is carried out to the voltage of thunder and lightning and carrying out voltage acquisition through the first ADC, carried out by FPGA module
Voltage effective value is calculated；Drop stream process are carried out to the electric current of thunder and lightning by using current transformer and is carried out through the first ADC
After current acquisition, current effective value calculating is carried out by FPGA module, realize the collection and calculating of lightning voltage and electric current, so that
Calculate the power and energy of thunder and lightning, research for thunder and lightning, analysis Lightning Disaster accident, the monitoring especially to lightning protection facility and
Maintenance is respectively provided with highly important meaning.
Brief description of the drawings
Fig. 1 is the structured flowchart of the thunder energy counting circuit based on FPGA provided by the utility model.
During Fig. 2 is the thunder energy counting circuit based on FPGA provided by the utility model, first ADC
Circuit theory diagrams.
During Fig. 3 is the thunder energy counting circuit based on FPGA provided by the utility model, second ADC
Circuit theory diagrams.
During Fig. 4 is the thunder energy counting circuit based on FPGA provided by the utility model, the electricity of the FPGA module
Road schematic diagram.
Specific embodiment
The utility model provides a kind of thunder energy counting circuit based on FPGA, can gather and calculate thunder and lightning voltage and
Current value, so as to calculate the power and energy of thunder and lightning.
To make the purpose of this utility model, technical scheme and effect clearer, clear and definite, develop simultaneously implementation referring to the drawings
Example is further described to the utility model.It should be appreciated that specific embodiment described herein is only used to explain this practicality
It is new, it is not used to limit the utility model.
Refer to Fig. 1, a kind of thunder energy counting circuit based on FPGA that the utility model is provided, including mutual induction of voltage
Device 10, current transformer 20, the first ADC 30, the second ADC 40 and FPGA module 50, the voltage transformer 10 lead to
Cross first ADC 30 and connect the FPGA module 50, the current transformer 20 is connected by second ADC 40
Connect the FPGA module 50.
During specific implementation, be depressured for the voltage scale of thunder and lightning by the voltage transformer 10, is carried out through the first ADC 30
After voltage acquisition, export carries out voltage effective value calculating to the FPGA module 50；The current transformer 20 is by the electricity of thunder and lightning
Drop flows stream in proportion, and after carrying out current acquisition through the second ADC, export carries out current effective value meter to the FPGA module 50
Calculate.
Specifically, the present embodiment is not restricted to the multiplying power of the summation current transformer 20 of voltage transformer 10, during specific implementation
Can be selected according to actual conditions.
Further, Fig. 2 is referred to, first ADC 30 includes first resistor R1, second resistance R2, the 3rd electricity
Resistance R3, the first operational amplifier U1, the first electric capacity C1, the second electric capacity C2 and the first analog-digital converter ADC1, the first resistor
R1, second resistance R2 are the magnification ratio factor, and 3rd resistor R3 is current-limiting resistance；The model of the first operational amplifier U1
LMV358, it is rail-to-rail operational amplifier, is capable of achieving current potential in the whole interval change from negative supply to positive supply so that
The output impedance of voltage transformer 10 is realized matching with the input impedance of the first analog-digital converter ADC1；The first electric capacity C1 and
It is jamproof that second electric capacity C2 plays filtering；The model AD7091 of the first analog-digital converter ADC1, with a high speed
Serial interface（SPI）, for the analog signal in circuit to be converted into data signal.
During specific implementation, one end of the first resistor R1 connects the voltage transformer 10, the first resistor R1's
The other end is grounded by the second resistance R2, also connects the positive input terminal of the first operational amplifier U1, first fortune
The negative input end for calculating amplifier U1 connects the output end of the first operational amplifier U1 and one end of the 3rd resistor R3, and described the
The other end of three resistance R3 connects the VIN ends of the first analog-digital converter ADC1, is grounded also by the first electric capacity C1, and described the
The GND ends and EPAD ends of one analog-digital converter ADC1 are grounded, the vdd terminal connection+A3.3V of the first analog-digital converter ADC1
Feeder ear, the REGCAP ends of the first analog-digital converter ADC1 are grounded by the second electric capacity C2, and first modulus turns
The SDO ends of parallel operation ADC1, SCLK ends,End andEnd is all connected with the FPGA module.
Please continue to refer to Fig. 3, second ADC 40 include the 4th resistance R4, the 5th resistance R5, the 6th resistance R6,
Second operational amplifier U2, the 3rd electric capacity C3, the 4th electric capacity C4 and the second analog-digital converter ADC2, the 4th resistance R4,
Five resistance R5 are the magnification ratio factor, the 6th resistance R6 is current-limiting resistance；The model of the second operational amplifier U2
LMV358, it is rail-to-rail operational amplifier, is capable of achieving current potential in the whole interval change from negative supply to positive supply so that
The output impedance of current transformer 20 is realized matching with the input impedance of the second analog-digital converter ADC2；The 3rd electric capacity C3 and
It is jamproof that 4th electric capacity C4 plays filtering；The model AD7091 of the second analog-digital converter ADC2, with a high speed
Serial interface（SPI）, for the analog signal in circuit to be converted into data signal.
During specific implementation, one end of the 4th resistance R4 connects the current transformer 20, the 4th resistance R4's
The other end is grounded by the 5th resistance R5, also connects the positive input terminal of the second operational amplifier U2, second fortune
The negative input end for calculating amplifier U2 connects the output end of the second operational amplifier U2 and one end of the 6th resistance R6, and described the
The other end of six resistance R6 connects the VIN ends of the second analog-digital converter ADC2, is grounded also by the 3rd electric capacity C3, and described the
The GND ends and EPAD ends of two analog-digital converter ADC2 are grounded, the vdd terminal connection+A3.3V of the second analog-digital converter ADC2
Feeder ear, the REGCAP ends of the second analog-digital converter ADC2 are grounded by the 4th electric capacity C4, and second modulus turns
The SDO ends of parallel operation ADC2, SCLK ends,End and CNOVST ends are all connected with the FPGA module.
Further, refer to Fig. 4, the FPGA module include fpga chip U3, the 7th resistance R7, the 8th resistance R8,
9th resistance R9, the tenth resistance R10 and memory U4, the model XC6SLX9-2TQG144C of the fpga chip U3, are used for
Management and read the first analog-digital converter ADC1 and the second analog-digital converter ADC2 collection data, and calculate thunder and lightning voltage and
The virtual value of electric current, further calculate thunder and lightning power and energy, its calculation procedure be existing calculation procedure, and it is cured
It is not the utility model protection point in fpga chip；The 7th resistance R7 is current-limiting resistance, the 8th resistance R8, the 9th electricity
Resistance R9 and the tenth resistance R10 be pull-up resistor, the model W25Q64 of the memory U4, it is the external storage of fpga chip
Device, for storing FPGA programs.
During specific implementation, the IO_L62N_D6_2 ends of the fpga chip U3（Such as the 43rd pin of fpga chip U3）Connection institute
State the first analog-digital converter ADC1'sEnd, the IO_L64N_D9_2 ends of the fpga chip U3 connect first modulus and turn
The SDO ends of parallel operation ADC1, the IO_L64P_D8_2 ends of the fpga chip U3 connect the first analog-digital converter ADC1's
SCLK ends, the IO_L62P_D5_2 ends of the fpga chip U3 connect the first analog-digital converter ADC1's
End, the IO_L48N_RDWR_B_VREF_2 ends of the fpga chip U3 connect the second analog-digital converter ADC2'sEnd,
The IO_49N_D4_2 ends of the fpga chip U3 connect the SDO ends of the second analog-digital converter ADC2, the fpga chip U3
IO_L49P_D3_2 ends connect the SCLK ends of the second analog-digital converter ADC2, the IO_L48P_ of the fpga chip U3
D7_2 ends connect the second analog-digital converter ADC2'sEnd, the IO_L1P_CCLK_2 of the fpga chip U3
End connects the SCK ends of the memory U4, the IO_L3P_D0_D1N_ of the fpga chip U3 by the 7th resistance R7
MISO_MISO1_2 ends connect the SO/DQ1 ends of the memory U4, the IO_L3N_MOSI_CSI_B_ of the fpga chip U3
MISO0_2 ends connect the SI/DQ0 ends of the memory U4, the IO_L12P_D1_MISO2_2 ends connection of the fpga chip U3
The memory U4's/ DQ2 ends ,+3.3V feeder ears are connected also by the 8th resistance R8, the fpga chip U3's
IO_L12N_D2_MISO3_2 ends connect the HOLD/DQ3 ends of the memory U4, also by the 9th resistance R9 connections+
3.3V feeder ears, the memory U4'sEnd connects+3.3V feeder ears, the memory by the tenth resistance R10
The GND ends ground connection of U4.
It is specific to calculate voltage effective value（RMS）When, the magnitude of voltage that the first analog-digital converter ADC1 is exported is multiplied by voltage mutual
The multiplying power of sensor obtains D, and is calculated using the N number of transient state sampled value Dn for collecting, and specific formula for calculation is as follows：
The current effective value calculating process is similar with the calculating process of voltage effective value, will not be repeated here.
Further, the FPGA also has calibration function, after voltage effective value and current effective value is calculated, will
The voltage effective value and current effective value for going out, are put into " voltage deviation " and " current offset amount " register.Two values can be added
Enter measurement result, to eliminate the error of side-play amount.
The power of the thunder and lightning is multiplied with current effective value by voltage effective value and obtained, and power and the thunder and lightning of the thunder and lightning are made
Time is multiplied and can obtain the energy of thunder and lightning, and the rating formula of thunder and lightning is as follows：
When voltage effective value calculating is carried out, N number of transient voltage value that voltage transformer 1 is exported is multiplied by voltage respectively mutual
The multiplying power of sensor obtains Dn, and Dn2 is obtained by all Dn squares, then all Dn2 phases adductions that will be obtained obtain the flat of Dn2 divided by N
Average, radical sign is opened by Dn2, obtains Dn1, and Dn1 is obtained into voltage effective value Vrms plus voltage deviation.
When current effective value calculating is carried out, computational methods are similar with voltage effective value computational methods, will not be repeated here.
Voltage effective value Vrms is multiplied with current effective value Irms, that is, obtains the active-power P of thunder and lightning.
It is new to this practicality for an embodiment below in conjunction with Fig. 1, Fig. 2, Fig. 3 and Fig. 4 in order to be better understood from the utility model
Type is described further：
First, thunder and lightning is gathered, thunder and lightning is by after voltage transformer 10, voltage transformer 10 drops to the voltage of thunder and lightning
Pressure treatment, and export and carry out voltage acquisition to the first ADC 30, voltage signal is converted to number by the first analog-digital converter ADC1
Word signal, being sent to FPGA module 50 carries out voltage effective value calculating.
Meanwhile, thunder and lightning by after current transformer 20, current transformer 20 carries out drop stream process to the electric current of thunder and lightning, and
Export carries out current acquisition to the second ADC 40, and current signal is converted to data signal by the second analog-digital converter ADC2, hair
Giving FPGA module 50 carries out current effective value calculating.
Fpga chip calculates the power of thunder and lightning according to the voltage effective value and current effective value that calculate, further, will
Power can draw the energy of thunder and lightning with the time of thunder and lightning effect.
In sum, the thunder energy counting circuit based on FPGA that the utility model is provided, can realize the electricity to thunder and lightning
The collection and calculating of pressure and electric current, so that the power and energy of thunder and lightning are further calculated, research, analysis thunder and lightning for thunder and lightning
Disaster accident, monitoring and maintenance especially to lightning protection facility are respectively provided with highly important meaning.
It is understood that for those of ordinary skills, can according to the technical solution of the utility model and
The design of its utility model is subject to equivalent or change, and all these changes or replacement should all belong to appended by the utility model
Scope of the claims.
Claims (8)
1. a kind of thunder energy counting circuit based on FPGA, it is characterised in that the circuit includes that voltage transformer, electric current are mutual
Be depressured for the voltage scale of thunder and lightning by sensor, the first ADC, the second ADC and FPGA module, the voltage transformer,
After carrying out voltage acquisition through the first ADC, export carries out voltage effective value calculating to the FPGA module；The Current Mutual Inductance
The electric current of thunder and lightning is dropped stream by device in proportion, and after carrying out current acquisition through the second ADC, export carries out electricity to the FPGA module
Stream virtual value is calculated.
2. the thunder energy counting circuit based on FPGA according to claim 1, it is characterised in that an ADC moulds
Block turns including first resistor, second resistance, 3rd resistor, the first operational amplifier, the first electric capacity, the second electric capacity and the first modulus
Parallel operation, one end of the first resistor connects the voltage transformer, and the other end of the first resistor is by the described second electricity
Resistance ground connection, also connects the positive input terminal of first operational amplifier, the negative input end connection of first operational amplifier the
One end of the output end of one operational amplifier and the 3rd resistor, the other end of the 3rd resistor connects first modulus
The VIN ends of converter, also by the first capacity earth, the GND ends and EPAD ends of first analog-digital converter are grounded, described
Vdd terminal connection+A3.3V the feeder ears of the first analog-digital converter, the REGCAP ends of first analog-digital converter are by described the
Two capacity earths, the SDO ends of first analog-digital converter, SCLK ends,End andEnd is all connected with described
FPGA module.
3. the thunder energy counting circuit based on FPGA according to claim 2, it is characterised in that the 2nd ADC moulds
Block turns including the 4th resistance, the 5th resistance, the 6th resistance, the second operational amplifier, the 3rd electric capacity, the 4th electric capacity and the second modulus
Parallel operation, one end of the 4th resistance connects the current transformer, and the other end of the 4th resistance is by the described 5th electricity
Resistance ground connection, also connects the positive input terminal of second operational amplifier, the negative input end connection of second operational amplifier the
One end of the output end of two operational amplifiers and the 6th resistance, the other end of the 6th resistance connects second modulus
The VIN ends of converter, also by the 3rd capacity earth, the GND ends and EPAD ends of the second analog-digital converter described in analog-digital converter
It is grounded, the vdd terminal connection+A3.3V feeder ears of second analog-digital converter, the REGCAP ends of second analog-digital converter
By the 4th capacity earth, the SDO ends of second analog-digital converter, SCLK ends,End and CNOVST ends are all connected with
The FPGA module.
4. the thunder energy counting circuit based on FPGA according to claim 3, it is characterised in that the FPGA module bag
Include fpga chip, the 7th resistance, the 8th resistance, the 9th resistance, the tenth resistance and memory, the IO_L62N_ of the fpga chip
D6_2 ends connect first analog-digital converterEnd, the IO_L64N_D9_2 ends connection described first of the fpga chip
The SDO ends of analog-digital converter, the IO_L64P_D8_2 ends of the fpga chip connect the SCLK ends of first analog-digital converter,
The IO_L62P_D5_2 ends of the fpga chip connect first analog-digital converterEnd, the fpga chip
IO_L48N_RDWR_B_VREF_2 ends connect second analog-digital converterEnd, the IO_49N_ of the fpga chip
D4_2 ends connect the SDO ends of second analog-digital converter, the IO_L49P_D3_2 ends connection described second of the fpga chip
The SCLK ends of analog-digital converter, the IO_L48P_D7_2 ends of the fpga chip connect second analog-digital converterEnd, the IO_L1P_CCLK_2 ends of the fpga chip connect the SCK of the memory by the 7th resistance
End, the IO_L3P_D0_D1N_MISO_MISO1_2 ends of the fpga chip connect the SO/DQ1 ends of the memory, described
The IO_L3N_MOSI_CSI_B_MISO0_2 ends of fpga chip connect the SI/DQ0 ends of the memory, the fpga chip
IO_L12P_D1_MISO2_2 ends connect the memory/ DQ2 ends, power also by the 8th resistance connection+3.3V
End, the IO_L12N_D2_MISO3_2 ends of the fpga chip connect the HOLD/DQ3 ends of the memory, also by described the
Nine resistance connect+3.3V feeder ears, the memoryEnd connects+3.3V feeder ears by the tenth resistance, described
The GND ends ground connection of memory.
5. the thunder energy counting circuit based on FPGA according to claim 4, it is characterised in that first computing is put
The model of big device and the second operational amplifier is LMV358.
6. the thunder energy counting circuit based on FPGA according to claim 4, it is characterised in that first modulus turns
The model of parallel operation and the second analog-digital converter is AD7091.
7. the thunder energy counting circuit based on FPGA according to claim 4, it is characterised in that the fpga chip
Model XC6SLX9-2TQG144C.
8. the thunder energy counting circuit based on FPGA according to claim 4, it is characterised in that the type of the memory
Number be W25Q64.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621181409.9U CN206208984U (en) | 2016-10-27 | 2016-10-27 | A kind of thunder energy counting circuit based on FPGA |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621181409.9U CN206208984U (en) | 2016-10-27 | 2016-10-27 | A kind of thunder energy counting circuit based on FPGA |
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| Publication Number | Publication Date |
|---|---|
| CN206208984U true CN206208984U (en) | 2017-05-31 |
Family
ID=58758258
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201621181409.9U Withdrawn - After Issue CN206208984U (en) | 2016-10-27 | 2016-10-27 | A kind of thunder energy counting circuit based on FPGA |
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| CN (1) | CN206208984U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106370925A (en) * | 2016-10-27 | 2017-02-01 | 深圳市中鹏电子有限公司 | Lightning energy calculation circuit based on FPGA |
-
2016
- 2016-10-27 CN CN201621181409.9U patent/CN206208984U/en not_active Withdrawn - After Issue
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106370925A (en) * | 2016-10-27 | 2017-02-01 | 深圳市中鹏电子有限公司 | Lightning energy calculation circuit based on FPGA |
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