CN206162234U - Weighting current feedback's low dropout regulator - Google Patents
Weighting current feedback's low dropout regulator Download PDFInfo
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- CN206162234U CN206162234U CN201621055437.6U CN201621055437U CN206162234U CN 206162234 U CN206162234 U CN 206162234U CN 201621055437 U CN201621055437 U CN 201621055437U CN 206162234 U CN206162234 U CN 206162234U
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Abstract
The utility model discloses a weighting current feedback's low dropout regulator, including the first order fixed - gain amplifier circuit that connects gradually, two -stage variable gain level circuit, power transistor mp, connect in the frequency compensation circuit of first order fixed - gain amplifier circuit output and power transistor mp output, connect in the module of overshooting that reduces of power transistor mp output, and by the feedback loop of power transistor mp output to first order fixed - gain amplifier circuit input end feedback, wherein two -stage variable gain level circuit is by the second level gain amplifier circuit and the third level gain amplifier circuit that establish ties, and constitute with the parallelly connected weighting current feedback circuit WCF of third level gain amplifier circuit. The utility model discloses a setting up weighting current feedback circuit, making more stable, the minimum quiescent current of LDO overall gain, it is higher that output voltage adjusts the precision, has faster transient state speed, can be applied to in the load capacitance and the load current condition of bigger excursion.
Description
Technical field
The utility model is related to chip power technical field, is to be related to a kind of low pressure of weighted current feedback specifically
Difference linear constant voltage regulator.
Background technology
Low pressure difference linear voltage regulator (LDO, low drop-out regulator) has stability high, and speed is fast, cost
Low, noise is little, and the low advantage of quiescent current is widely used in power management chip design.With mobile intelligent terminal or hand-held
Equipment is constantly weeded out the old and bring forth the new, and the performance such as stability, speed and power consumption to LDO proposes higher and higher requirement.
Traditional multistage low pressure difference linear voltage regulator is generally by third stage amplifier, frequency compensated circuit, backfeed loop and
Individual power transistor (adjustment pipe) is constituted.As shown in Figure 1.gm1, gm2, gm3, gmpRepresent the mutual conductance of corresponding stage transistor;C1, C2,
Cp, R1, R2, Rp represent respectively the equivalent output parasitic capacitance of respective stages and output resistance;Ro includes power transistor Mp
The effective resistance of output resistance and load resistance;The structure can produce 4 limits P-3dB, P2, P3, Po.The size of Po limits with
RoCLProduct is inversely proportional to, and in order to ensure the stability of LDO, CL needs less;Ro is inversely proportional to load current IL, works as ILIt is larger to be,
Must assure that Ro is less, which limits the excursion of load capacitance and load current drop.
The degenerative multistage gain of belt current amplifies low pressure difference linearity voltage stabilizing source circuit structure and traditional multistage low voltage difference
Linear voltage regulator compares, and introduces NCF (Negative Current Feedback) module, as shown in Figure 2.gmfIt is NCF moulds
Block mutual conductance.In the circuit structure of Fig. 2, it is very high that R2 is designed, and it is less that Rp is designed, and its size is mainly by 1/gmDetermine.Such
Three-level circuit can be biased dynamically, so as to accelerate the discharge and recharge of Vp.Relative to traditional multistage low pressure difference linear voltage regulator, can
Greatly to improve the speed of LDO.It should be noted that Cp and R2 may be very big, this allows for CpRp and C2R2 is larger, according to
Routh-Hurwitz judgement of stability criterions, larger time constant CpRp and C2R2 may cause the limit of RHP, because
And affect the stability of loop.Therefore avoid producing RHP limit, the stability of reinforcing feedback using NFC technique.NFC
Module produces a mutual conductance electric current g with Vp voltagesmfVp feeds back to N2 nodes, not only increases the bias current of second level circuit, and
And constitute Current Negative Three-Point Capacitance loop with tertiary circuit.The output resistance of node 2 will be down to R2f by R2, also result in C2R2f and
The loop gain of LDO is all reduced.Therefore the steady of LDO loops has been ensured in wider load capacitance and load current excursion
It is qualitative.However, the reduction of LDO overall gains can sacrifice the degree of regulation of some stabilizer output voltages, and NCF can reduce N2 sections
The charge-discharge velocity of point, so as to reduce its instantaneous velocity.
Utility model content
To overcome the problems referred to above of the prior art, the utility model to provide a kind of raising output voltage degree of regulation and wink
The low pressure difference linear voltage regulator of the weighted current feedback of state response speed.
To achieve these goals, the technical solution adopted in the utility model is as follows:
A kind of low pressure difference linear voltage regulator of weighted current feedback, including the first order fixed gain being sequentially connected electricity is amplified
Road, two-stage variable gain stage circuit, power transistor Mp, are connected to first order fixed gain amplification circuit output end and power is brilliant
The frequency compensated circuit of body pipe Mp output ends, be connected to power transistor Mp output ends reduction die block, by power crystal
The backfeed loop that pipe Mp output ends are fed back to first order fixed gain input amplifier, and it is connected to power transistor Mp
Resistance R0 in parallel between output end and ground and electric capacity CL, wherein two-stage variable gain stage circuit put by the second stage gain connected
Big circuit and third level gain amplifying circuit, and the weighted current feedback circuit WCF in parallel with third level gain amplifying circuit
Composition.
Further, the weighted current feedback circuit WCF is made up of transistor M3, M6, M7 and electric capacity C1, wherein crystal
Pipe M3 and M7 grid is connected with each other, and connects electric capacity C1 one end, the electric capacity C1 other ends and M3, M7 source grounding, transistor M3
Drain electrode is connected between second level gain amplifying circuit output end and third level gain amplifying circuit input, transistor M6 grids
It is connected with third level gain amplifying circuit, M6 source electrodes access power supply VDD, M6 drain electrode connection M7 drain and gates.
Further, the second level gain amplifying circuit is made up of the transistor M1 and M2 that drain connected, transistor M1
Grid connects first order fixed gain amplification circuit output end, and M1 source electrodes access power supply VDD, and transistor M2 grids access biased electrical
Pressure VB, M2 source grounds, the drain electrode of M1 and M2 is connected with third level gain amplifying circuit.
Further, the third level gain amplifying circuit is by the transistor M4 and M5 for draining connected, and resistance R1 groups
Into transistor M5 grids connection transistor M1 drain electrodes, M5 source grounds, transistor M4 source electrodes access power supply VDD, the connection of M4 grids
M5 drains and connects transistor M6 grids, and resistance R1 one end is connected with M4 drain electrodes, other end connection power supply VDD.
Compared with prior art, the utility model has the advantages that:
The utility model by arrange weighted current feedback circuit, the quiescent current for making LDO overall gains more stable, minimum,
Output voltage regulation precision is higher, with faster transient state speed, realizes the load that can apply to larger change scope
Electric capacity and load current, its design structure is ingenious, is monolithically fabricated more succinctly, and cost is relatively low, is with a wide range of applications, and fits
Close popularization and application.
Description of the drawings
Fig. 1 is the structural representation that low pressure difference linearity source of stable pressure is amplified in conventional multi-level gain in prior art.
Fig. 2 is the structural representation that the degenerative multistage gain of belt current amplifies low pressure difference linearity source of stable pressure in prior art
Figure.
Fig. 3 is circuit theory diagrams of the present utility model.
Fig. 4 is the theory diagram of two-stage variable gain stage circuit in the utility model.
Fig. 5 is the LDO circuit schematic diagram in the utility model-embodiment.
Specific embodiment
With reference to the accompanying drawings and examples the utility model is described in further detail, and embodiment of the present utility model includes
But it is not limited to the following example.
Embodiment
As shown in Figures 3 to 5, the low pressure difference linear voltage regulator of the weighted current feedback, including the first order being sequentially connected
Fixed gain amplifying circuit, two-stage variable gain stage circuit, power transistor Mp, are connected to first order fixed gain amplifying circuit
The frequency compensated circuit of output end and power transistor Mp output ends, be connected to power transistor Mp output ends reduction punch die
Block, and the backfeed loop fed back to first order fixed gain input amplifier from power transistor Mp output ends, wherein
Two-stage variable gain stage circuit is by the second level gain amplifying circuit and third level gain amplifying circuit connected, and and the third level
Gain amplifying circuit weighted current feedback circuit WCF compositions in parallel.
Further, the weighted current feedback circuit WCF is made up of transistor M3, M6, M7 and electric capacity C1, wherein crystal
Pipe M3 and M7 grid is connected with each other, and connects electric capacity C1 one end, the electric capacity C1 other ends and M3, M7 source grounding, transistor M3
Drain electrode is connected between second level gain amplifying circuit output end and third level gain amplifying circuit input, transistor M6 grids
It is connected with third level gain amplifying circuit, M6 source electrodes access power supply VDD, M6 drain electrode connection M7 drain and gates.The second level
Gain amplifying circuit is made up of the transistor M1 and M2 for draining connected, and electricity is amplified in the connection first order fixed gain of transistor M1 grids
Road output end, M1 source electrodes access power supply VDD, and transistor M2 grids access bias voltage VB, M2 source grounds, the drain electrode of M1 and M2
It is connected with third level gain amplifying circuit.The third level gain amplifying circuit by the transistor M4 and M5 for draining connected, and
Resistance R1 is constituted, and transistor M5 grids connection transistor M1 drain electrodes, M5 source grounds, transistor M4 source electrodes access power supply VDD, M4
Grid connection M5 drains and connects transistor M6 grids, and resistance R1 one end is connected with M4 drain electrodes, other end connection power supply VDD.
Wherein reference voltage Vref is provided by band-gap reference circuit, and the output impedance of third level gain amplifying circuit is (1/
gm4//R1), gm4For the mutual conductance of transistor M4, output impedance is with ILIncrease and reduce, so work as ILWhen change, load is carried
Supplied one it is adaptive-biased, so as to improve the speed of the 3rd gain stage.
As shown in figure 5, for the circuit structure of a LDO, it includes transistor M1~M20, resistance R1 and R2, electric capacity C1 and
CC, wherein, the attachment structure of transistor M1~M6, resistance R1 and electric capacity C1 is same as shown in Figure 4, M8 grids connection M4 grids,
M8 drain electrodes are connected to output end OUT, and M8 source electrodes access power supply VDD, resistance R2 one end connection output end OUT, other end ground connection;M9
Grid connects M2 grids and connects bias current IBIAS, M9 source grounds, M9 drain electrode with M10 drain electrode be connected and connect M1 drain,
M10 grids connect M13 grids and connect M9 grids and drain electrode, and M10 source electrodes connection M11 drains and M17 drains and connect electric capacity CC,
Electric capacity CCThe other end connects output end OUT, M11 and M12 grids are connected with each other and connect M13 and M14 drain electrodes, and M11 and M12 sources
Extremely access power supply VDD, M12 drain electrodes connection M13 source electrodes and M16 drain electrodes, M14 grids connection bias current IBIAS;M14 and M15
Source ground, M15 grids connection bias current IBIAS, M15 drain electrode connection M16 and M17 source electrodes, M16 grids connection power supply VFB,
M17 grids connection power supply Vref;M18 and M20 grids are connected with each other and connect bias current IBIAS, its source grounding, its leakage
Pole is also all connected with bias current IBIAS;M19 grids and drain electrode connection M18 drain electrodes, M19 source electrodes access power supply VDD.
Above-described embodiment is only preferred embodiment of the present utility model, not to the restriction of the utility model protection domain,
In every case design principle of the present utility model, and the change for carrying out non-creativeness work on this basis and making are adopted, all should
Belong within protection domain of the present utility model.
Claims (4)
1. the low pressure difference linear voltage regulator that a kind of weighted current feeds back, it is characterised in that fix including the first order being sequentially connected
Gain amplifying circuit, two-stage variable gain stage circuit, power transistor Mp, are connected to the output of first order fixed gain amplifying circuit
End and power transistor Mp output ends frequency compensated circuit, be connected to power transistor Mp output ends reduction die block,
The backfeed loop fed back to first order fixed gain input amplifier from power transistor Mp output ends, and it is connected to work(
Resistance R0 in parallel and electric capacity C between rate transistor Mp output ends and groundL, wherein two-stage variable gain stage circuit is by for connecting
Two stage gain amplifying circuits and third level gain amplifying circuit, and it is anti-with the weighted current of third level gain amplifying circuit parallel connection
Current feed circuit WCF is constituted.
2. the low pressure difference linear voltage regulator that a kind of weighted current according to claim 1 feeds back, it is characterised in that described to add
Power current feedback circuit WCF is made up of transistor M3, M6, M7 and electric capacity C1, and wherein transistor M3 and M7 grids are connected with each other, and
Connection electric capacity C1 one end, the electric capacity C1 other ends and M3, M7 source grounding, transistor M3 drain electrodes are connected to the second stage gain amplification
Between circuit output end and third level gain amplifying circuit input, transistor M6 grids connect with third level gain amplifying circuit
Connect, M6 source electrodes access power supply VDD, M6 drain electrode connection M7 drain and gates.
3. the low pressure difference linear voltage regulator of a kind of weighted current feedback according to claim 2, it is characterised in that described the
Two stage gain amplifying circuits are made up of the transistor M1 and M2 for draining connected, and the connection first order fixed gain of transistor M1 grids is put
Big circuit output end, M1 source electrodes access power supply VDD, and transistor M2 grids access bias voltage VB, M2 source grounds, M1's and M2
Drain electrode is connected with third level gain amplifying circuit.
4. the low pressure difference linear voltage regulator of a kind of weighted current feedback according to claim 3, it is characterised in that described the
Three-level gain amplifying circuit is made up of the transistor M4 and M5 for draining connected, and resistance R1, transistor M5 grids connection crystal
Pipe M1 drains, M5 source grounds, and transistor M4 source electrodes access power supply VDD, and M4 grids connection M5 drains and connects transistor M6 grid
Pole, resistance R1 one end is connected with M4 drain electrodes, other end connection power supply VDD.
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CN201621055437.6U CN206162234U (en) | 2016-09-14 | 2016-09-14 | Weighting current feedback's low dropout regulator |
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Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
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CN110262617A (en) * | 2019-07-22 | 2019-09-20 | 宁波市芯能微电子科技有限公司 | LD0 pre-compensation circuit |
CN112653403A (en) * | 2020-12-24 | 2021-04-13 | 唯捷创芯(天津)电子技术股份有限公司 | Radio frequency power amplifier, chip and communication terminal for reducing load change sensitivity |
CN113311902A (en) * | 2021-06-03 | 2021-08-27 | 兰州大学 | Low-power-consumption voltage stabilizer with small quiescent current and no off-chip capacitor and high transient response |
CN113672027A (en) * | 2021-08-20 | 2021-11-19 | 苏州云途半导体有限公司 | Push-pull quick response LDO (low dropout regulator) capable of receiving any capacitive load |
CN114115414A (en) * | 2022-01-27 | 2022-03-01 | 成都市安比科技有限公司 | Independent linear voltage stabilizing circuit without operational amplifier structure |
CN114546015A (en) * | 2022-03-08 | 2022-05-27 | 大唐青岛西海岸热力有限公司 | Safety power supply system for thermal equipment |
CN114756083A (en) * | 2022-04-01 | 2022-07-15 | 广东省大湾区集成电路与***应用研究院 | Low-dropout linear voltage stabilizing circuit and electronic equipment |
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2016
- 2016-09-14 CN CN201621055437.6U patent/CN206162234U/en active Active
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110262617A (en) * | 2019-07-22 | 2019-09-20 | 宁波市芯能微电子科技有限公司 | LD0 pre-compensation circuit |
CN110262617B (en) * | 2019-07-22 | 2020-10-27 | 宁波市芯能微电子科技有限公司 | LDO (low dropout regulator) pre-compensation circuit |
CN112653403A (en) * | 2020-12-24 | 2021-04-13 | 唯捷创芯(天津)电子技术股份有限公司 | Radio frequency power amplifier, chip and communication terminal for reducing load change sensitivity |
CN112653403B (en) * | 2020-12-24 | 2023-03-14 | 唯捷创芯(天津)电子技术股份有限公司 | Radio frequency power amplifier, chip and communication terminal for reducing load change sensitivity |
CN113311902A (en) * | 2021-06-03 | 2021-08-27 | 兰州大学 | Low-power-consumption voltage stabilizer with small quiescent current and no off-chip capacitor and high transient response |
CN113672027A (en) * | 2021-08-20 | 2021-11-19 | 苏州云途半导体有限公司 | Push-pull quick response LDO (low dropout regulator) capable of receiving any capacitive load |
CN113672027B (en) * | 2021-08-20 | 2022-04-01 | 苏州云途半导体有限公司 | Push-pull quick response LDO (low dropout regulator) capable of receiving any capacitive load |
CN114115414A (en) * | 2022-01-27 | 2022-03-01 | 成都市安比科技有限公司 | Independent linear voltage stabilizing circuit without operational amplifier structure |
CN114546015A (en) * | 2022-03-08 | 2022-05-27 | 大唐青岛西海岸热力有限公司 | Safety power supply system for thermal equipment |
CN114546015B (en) * | 2022-03-08 | 2024-02-20 | 大唐青岛西海岸热力有限公司 | Safety power supply system of thermodynamic equipment |
CN114756083A (en) * | 2022-04-01 | 2022-07-15 | 广东省大湾区集成电路与***应用研究院 | Low-dropout linear voltage stabilizing circuit and electronic equipment |
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