CN205845957U - A kind of MOSFET element - Google Patents
A kind of MOSFET element Download PDFInfo
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- CN205845957U CN205845957U CN201620786973.7U CN201620786973U CN205845957U CN 205845957 U CN205845957 U CN 205845957U CN 201620786973 U CN201620786973 U CN 201620786973U CN 205845957 U CN205845957 U CN 205845957U
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Abstract
This utility model relates to technical field of semiconductor device, particularly relates to a kind of MOSFET element.It includes Schottky diode and groove MOSFET, and groove MOSFET includes N+ substrate, pressure drift region, PXing Ti district epitaxial layer and N+ source region epitaxial layer the most successively；Offering grid region groove and schottky trench in the upper end of groove MOSFET, and both of which is positioned at pressure drift region, schottky trench is deeper than grid region groove；Being fixedly installed gate electrode in the groove of grid region, there is gate oxide between gate electrode and grid region groove, the top half periphery of gate electrode is provided with grid electrode insulating protective layer；The lower end of Schottky diode coordinates with schottky trench；Schottky diode and the public metal electrode of source electrode of groove MOSFET.The MOSFET element that this utility model provides, it is possible to strengthening the reliability of gate oxide, manufacturing cost is minimized.
Description
Technical field
This utility model relates to technical field of semiconductor device, particularly relates to a kind of MOSFET element.
Background technology
Wide bandgap semiconductor MOSFET (metal-oxide semiconductor (MOS) audion) device, especially silicon carbide MOSFET device
And gallium nitride MOSFET element is the semiconductor material with wide forbidden band device for power switching got most of the attention at present, its drive circuit is non-
The simplest and good with the compatibility of existing power device drive circuit.
But, there are two technical problem underlying in wide bandgap semiconductor MOSFET element design aspect: one is channel electrons
Mobility is low, and then causes the problem that the channel resistance of MOSFET is big；Two under high temperature, high electric field grid oxygen reliability not enough
Problem.
Currently for the problem that channel electron mobility is low, settling mode mainly has two kinds:
One is to select suitable crystal orientation, because the electron mobility of different crystal orientations is different, mobility maximum can differ 5
Times, so selecting to be formed on the crystal face of high electron mobility raceway groove；Owing to the crystal orientation of carborundum is relatively random, so high electron mobility
The bad selection of crystal face.
Two is by special annealing process, improves channel interface state, improves channel electron mobility；This special
Annealing process operation inconvenience.
For the problem of trench gate oxygen reliability, settling mode mainly uses special grid oxygen material, such as AlN, AlON
Deng material；And the problem that only can not solve trench gate oxygen reliability well by special grid oxygen material.
To sum up, for prior art, the drawbacks described above how overcoming wide bandgap semiconductor MOSFET element is ability
The technical problem that field technique personnel are urgently to be resolved hurrily.
Utility model content
The purpose of this utility model is to provide a kind of MOSFET element, to solve the problems referred to above.
In order to achieve the above object, the technical solution of the utility model is achieved in that
This utility model provides a kind of MOSFET element, including Schottky diode and groove MOSFET.
Wherein, described groove MOSFET includes N+ substrate, pressure drift region, PXing Ti district epitaxial layer and N the most successively
All it is in close contact between+source region epitaxial layer, and every adjacent two layers；The centre position, upper end of described groove MOSFET offers grid region
Groove；The upper end-face edge position of described groove MOSFET offers schottky trench；Described grid region groove and described Schottky ditch
The bottom surface of groove is respectively positioned on the inside of described pressure drift region；The degree of depth of described schottky trench is deep more than described grid region groove
Degree.
Described groove MOSFET also includes gate electrode；Described gate electrode is fixedly installed in the groove of described grid region；Described grid
Gate oxide is there is between district's groove and described gate electrode；Described gate electrode exceeds the peripheral setting of the part of described grid region groove
There is grid electrode insulating protective layer.
The lower end of described Schottky diode is coordinated by the upper end of described schottky trench with described groove MOSFET；Institute
The source electrode stating Schottky diode and described groove MOSFET shares metal electrode.
Preferably, as one can embodiment, described Schottky diode includes central authorities' groove and exterior protrusion；Described
Schottky trench coordinates with described exterior protrusion, and described central authorities groove coordinates with described grid electrode insulating protective layer.
Preferably, as a kind of embodiment, the end face of described pressure drift region is additionally provided with the dense doped epitaxial of N1
Layer；Described N1 dense doped epitaxial floor is between described pressure drift region and described PXing Ti district epitaxial layer.
Preferably, as a kind of embodiment, the bottom surface of described grid region groove is positioned in described N1 dense doped epitaxial layer.
Preferably, as a kind of embodiment, the thickness of described PXing Ti district epitaxial layer is between 0.1 μm-1 μm.
Preferably, as a kind of embodiment, the bottom thickness of described gate oxide is more than the side of described gate oxide
Face thickness.
Preferably, as a kind of embodiment, described schottky trench is annular structural part.
Preferably, as a kind of embodiment, the thickness of described N+ substrate is between 5 μm-500 μm.
Preferably, as a kind of embodiment, the thickness of described N+ source region epitaxial layer is less than 1 μm.
Preferably, as a kind of embodiment, the thickness of described N+ source region epitaxial layer is 0.5 μm.
Compared with prior art, the advantage of this utility model embodiment is:
A kind of MOSFET element that this utility model provides, analyzes its primary structure and understands: above-mentioned MOSFET element is main
It is made up of Schottky diode and groove MOSFET；The lower end of Schottky diode fits tightly with the upper end of groove MOSFET.
In the concrete structure of above-mentioned groove MOSFET, it extends pressure drift on N+ substrate the most successively
All it is in close contact, to reach each other can between district, PXing Ti district epitaxial layer and N+ source region epitaxial layer, and every adjacent two layers
The purpose of conduction；The subregion of the Schottky diode pressure drift region to surrounding therein forms a blind zone.
The centre position, upper end of groove MOSFET offers grid region groove, is coated with gate oxidation on the inwall of grid region groove
Layer, is provided with again gate electrode in the inner side of gate oxide, and the surface of the part exceeding grid region groove because of gate electrode is coated with
Grid electrode insulating protective layer, so gate electrode is surrounded completely by gate oxide and grid electrode insulating protective layer, reaches the mesh of insulation
's.
The upper end-face edge position of groove MOSFET offers under schottky trench, schottky trench and Schottky diode
End closely cooperates, and forms schottky junction, and the degree of depth of schottky trench is more than the degree of depth of above-mentioned grid region groove, and by above-mentioned grid region ditch
Groove is surrounded, and then, schottky junction electric field shielding is formed on the bottom of grid region groove, reduce the bottom electricity of grid region groove
, improve the reliability of gate oxide；Wherein, the bottom position of grid region groove will be in pressure drift region, so, and Cai Nengbao
The architecture quality of card raceway groove and electric field shielding effect.
It addition, Schottky diode and the source electrode metal electrode to be shared of groove MOSFET.
Therefore, the MOSFET element that this utility model provides, it is not necessary to use special grid oxygen material just to overcome trench gate
The problem that oxide layer reliability is not enough so that the manufacturing process of wide bandgap semiconductor MOSFET element is more convenient, has saved one-tenth
This.
Accompanying drawing explanation
In order to be illustrated more clearly that this utility model detailed description of the invention or technical scheme of the prior art, below by right
In detailed description of the invention or description of the prior art, the required accompanying drawing used is briefly described, it should be apparent that, describe below
In accompanying drawing be embodiments more of the present utility model, for those of ordinary skill in the art, do not paying creativeness
On the premise of work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
The sectional structure schematic diagram that the MOSFET element that Fig. 1 provides for this utility model embodiment is formed through step one；
The sectional structure schematic diagram that the MOSFET element that Fig. 2 provides for this utility model embodiment is formed through step 2；
The sectional structure schematic diagram that the MOSFET element that Fig. 3 provides for this utility model embodiment is formed through step 3；
The sectional structure schematic diagram that the MOSFET element that Fig. 4 provides for this utility model embodiment is formed through step 4；
The sectional structure schematic diagram that the MOSFET element that Fig. 5 provides for this utility model embodiment is formed through step 4；
The MOSFET element that Fig. 6 provides for this utility model embodiment in the case of increasing N1 dense doped epitaxial layer, warp
The sectional structure schematic diagram that step one is formed；
The MOSFET element that Fig. 7 provides for this utility model embodiment in the case of increasing N1 dense doped epitaxial layer, warp
The sectional structure schematic diagram that step 2 is formed；
The MOSFET element that Fig. 8 provides for this utility model embodiment in the case of increasing N1 dense doped epitaxial layer, warp
The sectional structure schematic diagram that step 3 is formed；
In the case of Fig. 9 is further added by N1 dense doped epitaxial layer for the MOSFET element that this utility model embodiment provides, warp
The sectional structure schematic diagram that step 4 is formed；
The MOSFET element that Figure 10 provides for this utility model embodiment in the case of increasing N1 dense doped epitaxial layer, warp
The sectional structure schematic diagram that step 5 is formed；
The MOSFET element that Figure 11 provides for this utility model embodiment is in the situation of the bottom thickness increasing gate oxide
Under, through the sectional structure schematic diagram that step 3 is formed；
Figure 12 is further added by the situation of the bottom thickness of gate oxide for the MOSFET element that this utility model embodiment provides
Under, through the sectional structure schematic diagram that step 4 is formed；
The MOSFET element that Figure 13 provides for this utility model embodiment is in the situation of the bottom thickness increasing gate oxide
Under, through the sectional structure schematic diagram that step 5 is formed；
The MOSFET element that Figure 14 provides for this use new embodiment is increasing N1 dense doped epitaxial layer and is increasing grid oxygen
In the case of changing the bottom thickness of layer, through the sectional structure schematic diagram that step 3 is formed；
The MOSFET element that Figure 15 provides for this utility model embodiment is increasing N1 dense doped epitaxial layer and is increasing grid oxygen
In the case of changing the bottom thickness of layer, through the sectional structure schematic diagram that step 4 is formed；
The MOSFET element that Figure 16 provides for this utility model embodiment is increasing N1 dense doped epitaxial layer and is increasing grid oxygen
In the case of changing the bottom thickness of layer, through the sectional structure schematic diagram that step 5 is formed.
Description of reference numerals:
Schottky diode 1；Groove MOSFET 2；
Exterior protrusion 11；
N+ substrate 21；Pressure drift region 22；PXing Ti district epitaxial layer 23；
N+ source region epitaxial layer 24；Grid region groove 25；Schottky trench 26；
Gate electrode 27；Gate oxide 28；Grid electrode insulating protective layer 29；
N1 dense doped epitaxial layer 221；Blind zone 222.
Detailed description of the invention
Below in conjunction with accompanying drawing, the technical solution of the utility model is clearly and completely described, it is clear that described
Embodiment is a part of embodiment of this utility model rather than whole embodiments.Based on the embodiment in this utility model, this
The every other embodiment that field those of ordinary skill is obtained under not making creative work premise, broadly falls into this practicality
Novel protected scope.
In description of the present utility model, it should be noted that term " " center ", " on ", D score, "left", "right",
Orientation or the position relationship of the instruction such as " interior ", " outward " are based on orientation shown in the drawings or position relationship, are for only for ease of and retouch
State this utility model and simplifying describe rather than instruction or the hint device of indication or element must have specific orientation, with
Specific azimuth configuration and operation, therefore it is not intended that to restriction of the present utility model.Additionally, term " first ", " second "
It is only used for describing purpose, and it is not intended that indicate or hint relative importance.
In description of the present utility model, it should be noted that unless otherwise clearly defined and limited, term " phase
Even ", " connection " should be interpreted broadly, for example, it may be fixing connection, it is also possible to be to removably connect, or be integrally connected；Can
To be mechanical connection, it is also possible to be electrical connection；Can be to be joined directly together, it is also possible to be indirectly connected to by intermediary, Ke Yishi
The connection of two element internals.For the ordinary skill in the art, can understand that above-mentioned term is at this with concrete condition
Concrete meaning in utility model.
Below by specific embodiment and combine accompanying drawing this utility model is described in further detail.
Seeing Fig. 1-Fig. 5, this utility model embodiment provides a kind of MOSFET element, including Schottky diode 1 He
Groove MOSFET 2；
Wherein, groove MOSFET 2 includes N+ substrate 21, pressure drift region 22, PXing Ti district epitaxial layer 23 the most successively
All it is in close contact with between N+ source region epitaxial layer 24, and every adjacent two layers；The centre position, upper end of groove MOSFET 2 offers grid
District's groove 25；The upper end-face edge position of groove MOSFET 2 offers schottky trench 26；Grid region groove 25 and schottky trench 26
Bottom surface be respectively positioned on the inside of pressure drift region 22；The degree of depth of schottky trench 26 is more than the degree of depth of grid region groove 25；
Groove MOSFET 2 also includes gate electrode 27；Gate electrode 27 is fixedly installed in grid region groove 25；Grid region groove 25 with
Gate oxide 28 is there is between gate electrode 27；The periphery of the part that gate electrode 27 exceeds grid region groove 25 is provided with grid electrode insulating
Protective layer 29；
The lower end of Schottky diode 1 is coordinated with the upper end of groove MOSFET 2 by schottky trench 26；
Schottky diode 1 shares metal electrode with the source electrode of groove MOSFET 2.
A kind of MOSFET element that this utility model provides, analyzes its primary structure and understands: above-mentioned MOSFET element is main
It is made up of Schottky diode 1 and groove MOSFET 2；The upper end of the lower end of Schottky diode 1 and groove MOSFET 2 is closely pasted
Close.
In the concrete structure of above-mentioned groove MOSFET 2, its bottommost is N+ substrate 21, and extends the most successively
All it is in close contact, to reach between pressure drift region 22, PXing Ti district epitaxial layer 23 and N+ source region epitaxial layer 24, and every adjacent two layers
To the purpose can conducted electricity each other；The subregion of the Schottky diode 1 pressure drift region 22 to surrounding therein
Form a blind zone 222.
The centre position, upper end of groove MOSFET 2 offers grid region groove 25, is coated with on the inwall of grid region groove 25
Gate oxide 28, is provided with again gate electrode 27 in the inner side of gate oxide 28, and because gate electrode 27 exceeds the portion of grid region groove 25
The surface divided is coated with again grid electrode insulating protective layer 29, so gate electrode 27 is by gate oxide 28 and grid electrode insulating protective layer
29 surround completely, reach the purpose of insulation.
The upper end-face edge position of groove MOSFET 2 offers schottky trench 26, schottky trench 26 and Schottky two pole
The lower end of pipe 1 closely cooperates, and forms schottky junction, and the degree of depth of schottky trench 26 is more than the degree of depth of above-mentioned grid region groove 25, and
Above-mentioned grid region groove 25 is surrounded, and then, schottky junction electric field shielding is formed on the bottom of grid region groove 25, reduce
The bottom electric field of grid region groove 25, improves the reliability of gate oxide 28；Wherein, the bottom position of grid region groove 25 will be resistance to
In pressure drift region 22, so, the architecture quality of guarantee raceway groove and electric field shielding effect.
It addition, Schottky diode 1 and the source electrode metal electrode to be shared of groove MOSFET 2.
Therefore, the MOSFET element that this utility model provides, it is not necessary to use special grid oxygen material just to overcome trench gate
The problem that oxide layer reliability is not enough so that the manufacturing process of MOSFET element is more convenient, has saved cost.
It should be noted that N+ i.e. represents heavily doped N-type semiconductor.
The manufacture method of above-mentioned MOSFET element is as follows:
Step one, by one piece of heavily doped N-type wide bandgap semiconductor (preferably manufacturing silicon carbide semiconductor or gallium nitride semiconductor)
Material is as substrate, and surface carries out homogeneity N-type and is epitaxially formed pressure drift region 22, then at the base of pressure drift region 22 thereon
Carry out p-type on plinth again and be epitaxially formed PXing Ti district epitaxial layer 23, on the basis of PXing Ti district epitaxial layer 23, finally carry out N-type weight again
Doped epitaxial forms N+ source region epitaxial layer 24, pressure drift region 22, PXing Ti district epitaxial layer 23 and N+ source region epitaxial layer 24 are formed
Matrix (referring specifically to Fig. 1).
Step 2, the upper surface at N+ source region epitaxial layer 24 deposits etching groove and shelters film, forms the first mask layer (in figure
Not shown)；And carry out photoetching, etching processing on the surface of the first mask layer, and then in the centre position of N+ source region epitaxial layer 24
Place forms grid region etching groove window (not shown)；
In the position of grid region etching groove window, matrix is performed etching, etch into the inside of pressure drift region 22, formed
Grid region groove 25 (referring specifically to Fig. 2).
Step 3, at the inwall of grid region groove 25, carries out thermal oxide or deposit, forms gate oxide 28；
In the inner side of gate oxide 28, then it is deposited, and forms gate electrode 27 by photoetching, etching；
It is passivated layer deposit on the surface of gate electrode 27, forms grid electrode insulating protective layer 29 (tool by photoetching, etching
Body sees Fig. 3).
Step 4, the upper surface at N+ source region epitaxial layer 24 deposits etching groove and shelters film, forms the second mask layer (in figure
Not shown)；And carry out photoetching, etching processing on the surface of the second mask layer, and then in the both sides of the edge of N+ source region epitaxial layer 24
Position forms schottky trench etching window (not shown)；
In the position of schottky trench etching window, matrix is performed etching, etch into the inside of pressure drift region 22, shape
Become schottky trench 26, and the degree of depth of schottky trench 26 is greater than the degree of depth of grid region groove 25；Ultimately form groove MOSFET 2
(referring specifically to Fig. 4).
Step 5, carries out Schottky barrier metal deposit, annealing on the surface of schottky trench 26, forms Schottky two pole
Pipe 1；Groove MOSFET 2 and Schottky diode 1 share metal electrode (referring specifically to Fig. 5).
In the manufacture method of above-mentioned MOSFET element, use wide bandgap semiconductor (preferably manufacturing silicon carbide semiconductor or nitridation
Gallium quasiconductor) as material, using heavily doped N-type semiconductor material with wide forbidden band as substrate；Utilize epitaxy technology from substrate
Upper surface carries out homogeneity N-type extension, p-type extension and N-type heavy doping extension successively, from bottom to top sequentially forms pressure drift region
22, PXing Ti district epitaxial layer 23 and N+ source region epitaxial layer 24, this makes the doped region of MOSFET element, all at extension sheet epitaxy
During carry out, overcome the impurity doping of carbofrax material, diffusion difficulty problem, and this manufacture method can be existing
Produce on the production line of some silicon materials power MOSFET devices, be not required to buy new equipment, thus saved the biggest one-tenth
This.
In the etching process carrying out grid region groove 25 and schottky trench 26, form sediment needing the matrix surface performed etching
Long-pending etching groove shelters film, ensures when performing etching matrix as far as possible, does not damage matrix integrity degree elsewhere；Adopt afterwards
Grid region groove 25 and schottky trench 26 is sequentially formed with photoetching, lithographic technique.
After grid region groove 25 is formed, within it on wall, carry out thermal oxide or deposit, form gate oxide 28, need additionally
Add special material；Afterwards, it is deposited in the inner side of gate oxide 28, and carries out photoetching, etching in the structure that deposit is formed
Form gate electrode 27；Then, it is passivated layer deposit on the surface of gate electrode 27, and passivation layer is carried out photoetching, etching formation
Grid electrode insulating protective layer 29, gate electrode 27 is wrapped completely by grid electrode insulating protective layer 29 in the part on the top of grid region groove 25
Enclose so that gate electrode 27 insulate with external structure, obtains final groove MOSFET 2.
In schottky trench 26, finally carry out Schottky barrier metal deposit and annealing, form Schottky diode 1, Xiao
The subregion of the special based diode 1 pressure drift region 22 to surrounding therein forms a blind zone 222.
In the concrete structure of the MOSFET element of this utility model offer, Schottky diode 1 includes central authorities' groove (figure
Not shown in) and exterior protrusion 11；Exterior protrusion 11 is used for coordinating with the schottky trench 26 on groove MOSFET 2, Rolandic fissure
Groove is used for coordinating with the grid electrode insulating protective layer 29 of groove MOSFET 2 upper end.
Especially, the thickness of PXing Ti district epitaxial layer 23 should be arranged between 0.1 μm-1 μm, to increase in MOSFET element
Channel electron mobility, reduce channel resistance.
According to three kinds of improved procedures of the manufacture method of above-mentioned MOSFET element, following three kinds of structures can be formed:
See Fig. 6 or Fig. 7, Fig. 8, Fig. 9 or Figure 10, the situation of increase N1 dense doped epitaxial layer 221:
On device architecture, N1 dense doped epitaxial layer 221 is arranged on the end face of pressure drift region 22, i.e. outside the dense doping of N1
Prolong floor 221 between the district's epitaxial layer 23 of pressure drift region 22 and PXing Ti；It addition, N1 dense doped epitaxial layer 221 is positioned at blind zone
In 222, the bottom surface of grid region groove 25 is positioned in N1 dense doped epitaxial layer 221, to arrive purpose as above.
See Figure 11, Figure 12 or Figure 13, the situation of the bottom thickness of increase gate oxide 28:
On device architecture, the bottom thickness of gate oxide 28 is greater than its lateral thickness, and then broad stopband is partly led
The performance of body MOSFET element increases.
See Figure 14, Figure 15 or Figure 16, increase N1 dense doped epitaxial layer 221 and the bottom thickness increasing gate oxide 28
Assembled scheme, both can reduce the resistance of blind zone 222, can improve again the performance of wide bandgap semiconductor MOSFET element.
Concrete, schottky trench 26 is annular structural part, and utilizes this structure by the top half of groove MOSFET 2
It is surrounded, and in pressure drift region 22, forms blind zone 222.
Especially, the N+ substrate 21 structure to being disposed thereon, serve supporting role, so the thickness of N+ substrate 21 is not
Can be the thinnest, otherwise it is susceptible to deformation, thickness can be arranged between 5 μm-500 μm.
It addition, N+ source region epitaxial layer 24 should be the thinnest, thickness should be less than 1 μm；Optimum, thickness elects 0.5 μm as.
In sum, the MOSFET element that this utility model embodiment provides, it is possible to reduce channel resistance, strengthens gate oxidation
The reliability of layer；The performance making wide bandgap semiconductor MOSFET element is improved, and manufacturing cost is minimized.So, this
The manufacture method of the MOSFET element that utility model embodiment provides and device thereof, will bring good market prospect.
Last it is noted that various embodiments above is only in order to illustrate the technical solution of the utility model, rather than it is limited
System；Although being described in detail this utility model with reference to foregoing embodiments, those of ordinary skill in the art should
Understand: the technical scheme described in foregoing embodiments still can be modified by it, or to the most some or all of
Technical characteristic carries out equivalent；And these amendments or replacement, do not make the essence of appropriate technical solution depart from this practicality new
The scope of type each embodiment technical scheme.
Claims (10)
1. a MOSFET element, it is characterised in that include Schottky diode and groove MOSFET；
Wherein, described groove MOSFET includes N+ substrate, pressure drift region, PXing Ti district epitaxial layer and N+ source the most successively
All it is in close contact between district's epitaxial layer, and every adjacent two layers；The centre position, upper end of described groove MOSFET offers grid region ditch
Groove；The upper end-face edge position of described groove MOSFET offers schottky trench；Described grid region groove and described schottky trench
Bottom surface be respectively positioned on the inside of described pressure drift region；The degree of depth of described schottky trench is more than the degree of depth of described grid region groove；
Described groove MOSFET also includes gate electrode；Described gate electrode is fixedly installed in the groove of described grid region；Described grid region ditch
Gate oxide is there is between groove and described gate electrode；The periphery of the part that described gate electrode exceeds described grid region groove is provided with grid
Electrode insulation protective layer；
The lower end of described Schottky diode is coordinated by the upper end of described schottky trench with described groove MOSFET；
Described Schottky diode shares metal electrode with the source electrode of described groove MOSFET.
2. MOSFET element as claimed in claim 1, it is characterised in that
Described Schottky diode includes central authorities' groove and exterior protrusion；Described schottky trench coordinates with described exterior protrusion,
Described central authorities groove coordinates with described grid electrode insulating protective layer.
3. MOSFET element as claimed in claim 1, it is characterised in that
The thickness of described PXing Ti district epitaxial layer is between 0.1 μm-1 μm.
4. MOSFET element as claimed in claim 1, it is characterised in that
N1 dense doped epitaxial layer it is additionally provided with on the end face of described pressure drift region；Described N1 dense doped epitaxial layer is positioned at described resistance to
Between pressure drift region and described PXing Ti district epitaxial layer.
5. MOSFET element as claimed in claim 4, it is characterised in that
The bottom surface of described grid region groove is positioned in described N1 dense doped epitaxial layer.
6. the MOSFET element as described in any one of claim 1-5, it is characterised in that
The bottom thickness of described gate oxide is more than the lateral thickness of described gate oxide.
7. the MOSFET element as described in any one of claim 1-5, it is characterised in that
Described schottky trench is annular structural part.
8. the MOSFET element as described in any one of claim 1-5, it is characterised in that
The thickness of described N+ substrate is between 5 μm-500 μm.
9. the MOSFET element as described in any one of claim 1-5, it is characterised in that
The thickness of described N+ source region epitaxial layer is less than 1 μm.
10. MOSFET element as claimed in claim 9, it is characterised in that
The thickness of described N+ source region epitaxial layer is 0.5 μm.
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| CN106098561A (en) * | 2016-07-25 | 2016-11-09 | 吉林华微电子股份有限公司 | The manufacture method of a kind of MOSFET element and device thereof |
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| CN106098561A (en) * | 2016-07-25 | 2016-11-09 | 吉林华微电子股份有限公司 | The manufacture method of a kind of MOSFET element and device thereof |
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