CN205812042U - A kind of intelligent substation intelligent terminal tests device - Google Patents
A kind of intelligent substation intelligent terminal tests device Download PDFInfo
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- CN205812042U CN205812042U CN201620658742.8U CN201620658742U CN205812042U CN 205812042 U CN205812042 U CN 205812042U CN 201620658742 U CN201620658742 U CN 201620658742U CN 205812042 U CN205812042 U CN 205812042U
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- terminal
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- intelligent terminal
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Abstract
This utility model is applicable to technical field of power systems, a kind of intelligent substation intelligent terminal is provided to test device, the aobvious control terminal connected including network and test terminal, described test terminal includes master control borad and the input and output interface board being connected with described master control borad, LED Unit.Described aobvious control terminal and test terminal are connected with intelligent terminal by optical module by network connecting communication, test terminal, and test terminal receives the message to intelligent terminal, and goes to aobvious control terminal;Aobvious control terminal also can need to issue some control instructions according to test, test terminal controls the hard node action of intelligent terminal according to control instruction, and the hard node action information of intelligent terminal can be uploaded to host computer, it is achieved that the correlation function test of intelligent substation intelligent terminal.
Description
Technical field
This utility model belongs to field of power, particularly relates to a kind of intelligent substation intelligent terminal and tests device.
Background technology
Along with digitized and the popularization of Intelligent transformer station, IEC61850 standard is widely used in transformer plant automatic
In system.Intelligent substation based on IEC 61850 its research and development and application under Guo Wang company advocates are carried out in a deep going way.
Intelligent terminal is the important component part of intelligent substation, carries and controls the disconnection of switch, Guan Bi, gathers open circuit
Device, the location status of disconnecting switch, play vital effect to the safety of whole transformer station, enters factory inspection receipts and maintenance just needs
Want comprehensive and accurate debugging.But the special test that current Commissioning of Relay Protection field is not specifically designed for intelligent terminal's debugging sets
Standby.
Utility model content
In view of the above problems, this utility model provides a kind of intelligent substation intelligent terminal to test device.
This utility model adopts the following technical scheme that
Described intelligent substation intelligent terminal tests aobvious control terminal and test terminal, the described survey that device includes that network connects
Examination terminal includes master control borad and the input and output interface board being connected with described master control borad, LED Unit, and described master control borad includes
Data processor DSP, on-site programmable gate array FPGA, physical chip PHY and optical network interface, described DSP and FPGA
Parallel port connects, and described FPGA is connected to described optical network interface by described PHY, and described DSP is connected by Serial Peripheral Interface (SPI)
Having SPI Flash Flash, described DSP to connect and have network interface, DSP is connected with described test terminal by described network interface.
Further, described DSP is also associated with static RAM SRAM by parallel port.
Further, described PHY includes that pattern arranges pin, and described pattern arranges pin and passes through according to the actual demand that arranges
Resistance is pulled to running voltage or is pulled down to ground.
Further, described input and output interface board be provided with 4 open into rhabdion point, 6 output rhabdion point, described light net
Network interface has 4, and is positioned at described 4 and opens below rhabdion, outputs rhabdion point and is positioned at described 4 and opens into rhabdion point for described 6
Left side.
The beneficial effects of the utility model are: in this utility model, and described aobvious control terminal and test terminal are by network even
Connecting news, test terminal is connected with intelligent terminal by optical module, and test terminal receives the message to intelligent terminal, and goes to
Aobvious control terminal;Aobvious control terminal also can need to issue some control instructions according to test, and test terminal controls intelligence according to control instruction
The hard node action of energy terminal, and the hard node action information of intelligent terminal can be uploaded to host computer, it is achieved that intelligence power transformation
Stand intelligent terminal correlation function test.
Accompanying drawing explanation
Fig. 1 is the structure chart that the intelligent substation intelligent terminal that this utility model embodiment provides tests device;
Fig. 2 is the schematic diagram of master control borad;
Fig. 3 is test terminal back view;
Fig. 4 is test terminal side schematic view.
Detailed description of the invention
In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with accompanying drawing and enforcement
Example, is further elaborated to this utility model.Should be appreciated that specific embodiment described herein is only in order to explain
This utility model, is not used to limit this utility model.
In order to technical scheme described in the utility model is described, illustrate below by specific embodiment.
Fig. 1 shows that the intelligent substation intelligent terminal that this utility model embodiment provides tests the structure of device, in order to
It is easy to illustrate to illustrate only the part relevant to this utility model embodiment.
As it is shown in figure 1, the intelligent substation intelligent terminal that the present embodiment provides tests the aobvious control that device includes that network connects
Terminal 1 and test terminal 2, described test terminal 2 includes that master control borad 21 and the input and output being connected with described master control borad 21 connect
Oralia 22, LED Unit 23.Shown in Fig. 2, described master control borad 21 includes data processor DSP, field programmable gate array
FPGA, physical chip PHY and optical network interface, described DSP with FPGA parallel port is connected, and described FPGA is by described PHY even
Being connected to described optical network interface, described DSP is connected by Serial Peripheral Interface (SPI) has flash memory Flash, described DSP connection to have network interface,
DSP is connected with described test terminal by described network interface.
Aobvious control terminal described here is common panel computer, uses Android or other operating system.Man-machine friendship is provided
Interface mutually, and the lower section that offer data message shows, control instruction generates etc..LED Unit on described test device,
For showing the duty of test device.Described master control borad with DSP as core devices, each module data be aggregated into DSP or by
DSP is sent to each module, and DSP uses conventional data processor, primarily serves instruction and forwards and data collection forwarding effect.
In the present embodiment, memory device subsidiary for DSP includes a SPI Flash, a 32Mbit SRAM.The mastery routine storage of DSP
In SPI Flash.Additionally as a kind of preferred implementation, DSP is connected by SMC parallel bus interface SRAM, SRAM
Select the 32Mbit CYC1041DV33 model of CYPRESS company.When the SPI Flash space of DSP is not enough, SRAM is as depositing
The extending space in storage space uses, but DSP accesses the speed of SRAM far away from the speed accessing internal SRAM.
Described FPGA selects the Spartan-6 chip of XILINX company.The major function that FPGA realizes is optical-fiber network message
Forwarding.DSP passes through SMC parallel port control FPGA.Optical module it is inserted with, by optical fiber and by the intelligent terminal of side in optical network interface
Connect.The PHY chip being connected with described optical network interface uses the twoport PHY DP83849 of TI company, and two panels PHY chip connects
Four optical modules, are responsible for the conversion of modulus signal.This veneer is used is 100M FX optical-fibre communications pattern.Carrying out pattern setting
Time, described PHY includes that pattern arranges pin, and described pattern arranges pin and is pulled to work according to the actual demand that arranges by resistance
Voltage or be pulled down to ground.The pin definitions of different PHY chip may be different.So it is automatically configured to 100M after Board Power up
FX pattern, driver that need not be extra.The transmitting-receiving of network interface data is carried out between PHY and FPGA.Open described in as it is shown on figure 3, into
Output interface board be provided with 4 open into rhabdion point, 6 output rhabdion point, the accessible empty node of input and output node and charged joint
Point, outputs node employing and quickly outputs, and time sensitivity is the highest.Described optical network interface has 4, respectively Tx1, Rx1-
Tx4, Rx4, and be positioned at described 4 and open below rhabdion, output rhabdion point and be positioned at described 4 and open on the left of rhabdion point for described 6.
During use, first test terminal imports configuration file of entirely standing, such as by USB or alternate manner copy configuration literary composition
Part initializes to test terminal, then automatically configures according to configuration file, according to testing requirement, by optical fiber, connecting line
This test terminal is attached with intelligent terminal;Test man selects phase according to different test events on aobvious control terminal interface
The functional module answered is tested, as point, test movement time, 396 normative testings, chain rupture test, st, sq Num are surveyed by remote signalling
The functional modules such as examination, stress test, resolution test so that it is can fast and accurately intelligent end device be tested.Also
May be used for when intelligent substation site acceptance, periodic inspection testing intelligent end device, intelligent station transformer station is correlated with
Technical ability training etc..Finally according to test demand, test result is shown in the form of a list on result of the test hurdle, or with different face
Colour code note result of the test whether with being consistent of regulation.Conveniently result of the test is checked.
Both sides, described test terminal are provided with thermovent, and as shown in Figure 4, described thermovent is counter bore structure, described counterbore
Structure has five faces, respectively above, below, the left side, the right side and the back side, in the described left side and the right side, and an at least face peace
Equipped with Air Filter, while playing heat radiation, dust is avoided to enter very well.
The foregoing is only preferred embodiment of the present utility model, not in order to limit this utility model, all at this
Any amendment, equivalent and the improvement etc. made within the spirit of utility model and principle, should be included in this utility model
Protection domain within.
Claims (4)
1. an intelligent substation intelligent terminal tests device, it is characterised in that described device includes that the aobvious control that network connects is whole
End and test terminal, described test terminal includes master control borad and the input and output interface board being connected with described master control borad, instruction
Lamp plate, described master control borad includes data processor DSP, on-site programmable gate array FPGA, physical chip PHY and optical-fiber network
Interface, described DSP with FPGA parallel port is connected, and described FPGA is connected to described optical network interface by described PHY, and described DSP leads to
Crossing serial peripheral equipment interface SPI connection has flash memory Flash, described DSP connection to have network interface, and DSP is by described network interface and described test
Terminal connects.
2. intelligent substation intelligent terminal tests device as claimed in claim 1, it is characterised in that described DSP is by parallel port also
Connect and have static RAM SRAM.
3. intelligent substation intelligent terminal tests device as claimed in claim 2, it is characterised in that described PHY includes that pattern sets
Putting pin, described pattern arranges pin and is pulled to running voltage by resistance according to the actual demand that arranges or is pulled down to ground.
4. intelligent substation intelligent terminal tests device as claimed in claim 3, it is characterised in that described input and output interface board
Be provided with 4 open into rhabdion point, 6 output rhabdion point, described optical network interface has 4, and is positioned at described 4 and opens under rhabdion
Side, outputs rhabdion point and is positioned at described 4 and opens on the left of rhabdion point for described 6.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201620658742.8U CN205812042U (en) | 2016-06-28 | 2016-06-28 | A kind of intelligent substation intelligent terminal tests device |
Applications Claiming Priority (1)
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CN201620658742.8U CN205812042U (en) | 2016-06-28 | 2016-06-28 | A kind of intelligent substation intelligent terminal tests device |
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Publication Number | Publication Date |
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CN205812042U true CN205812042U (en) | 2016-12-14 |
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CN201620658742.8U Expired - Fee Related CN205812042U (en) | 2016-06-28 | 2016-06-28 | A kind of intelligent substation intelligent terminal tests device |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106647515A (en) * | 2016-12-29 | 2017-05-10 | 湘潭大学 | Handheld virtual loop tester |
WO2023109580A1 (en) * | 2021-12-17 | 2023-06-22 | 华为技术有限公司 | Data processing system and method |
-
2016
- 2016-06-28 CN CN201620658742.8U patent/CN205812042U/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106647515A (en) * | 2016-12-29 | 2017-05-10 | 湘潭大学 | Handheld virtual loop tester |
WO2023109580A1 (en) * | 2021-12-17 | 2023-06-22 | 华为技术有限公司 | Data processing system and method |
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Legal Events
Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20161214 Termination date: 20170628 |