CN205787504U - 一种阵列基板及显示装置 - Google Patents

一种阵列基板及显示装置 Download PDF

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CN205787504U
CN205787504U CN201620518450.4U CN201620518450U CN205787504U CN 205787504 U CN205787504 U CN 205787504U CN 201620518450 U CN201620518450 U CN 201620518450U CN 205787504 U CN205787504 U CN 205787504U
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array substrate
layer
resin layer
pixel electrode
pixel
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先建波
程鸿飞
乔勇
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BOE Technology Group Co Ltd
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Priority to US15/744,445 priority patent/US10141350B2/en
Priority to PCT/CN2017/085097 priority patent/WO2017206736A1/zh
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Abstract

本实用新型涉及显示技术领域，公开一种阵列基板及显示装置，阵列基板包括衬底基板、设置在衬底基板上的数据线和栅线，栅线和数据线限定出像素单元，像素单元包括薄膜晶体管、树脂层、像素电极，树脂层设有至少一个放气结构，放气结构的开口方向背离衬底基板，在上述阵列基板中，树脂层上的放气结构能够将树脂层中的气体排出，一方面能够减少树脂层中的气泡，进而在一定程度上减少因气泡膨胀导致的树脂层高低不平，另一方面能够减少滞留在树脂层的气体，以避免气体对后续工艺良率造成影响，进而能够提高产品良率。

Description

一种阵列基板及显示装置
技术领域
本实用新型涉及显示技术领域，尤其涉及一种阵列基板及显示装置。
背景技术
在显示技术领域，薄膜晶体管液晶显示器(TFT-LCD)由于其体积小、功耗低、无辐射等特点而广泛应用于电视、手机以及公共信息显示。TFT-LCD包括阵列基板、彩膜基板以及位于二者之间的液晶层。其中，阵列基板包括设置在衬底基板上的栅极、与栅极同层的栅线、栅绝缘层、半导体有源层、源极和漏极、像素电极等。
通常在信号线所在层与像素电极之间设有树脂层，以减少信号线所在层和像素电极之间存在的寄生电容，信号线包括栅线或数据线等。例如：底栅型阵列基板中，在数据线所在层与像素电极之间设置树脂层以避免数据线对像素电极干扰，但是树脂层的制作工艺中容易产生较多气泡，在一定程度上气泡会膨胀使得树脂层高低不平整；而且可能有滞留在树脂层的气体，无法排放，影响后续工艺良率和显示效果。
实用新型内容
本实用新型提供一种阵列基板及显示装置，在该阵列基板中，通过在树脂层上开设放气孔，排出树脂层中的气体，提高产品良率。
为达到上述目的，本实用新型提供以下技术方案：
一种阵列基板，包括衬底基板、设置在所述衬底基板上的数据线和栅线，所述栅线和数据线限定出像素单元，所述像素单元包括薄膜晶体管、树脂层、像素电极，所述树脂层设有至少一个放气结构，所述放气结构的开口方向背离所述衬底基板。
在上述阵列基板中，树脂层上的放气结构能够将树脂层中的气体排出，一方面能够减少树脂层中的气泡，进而在一定程度上减少因气泡膨胀导致的树脂层高低不平，另一方面能够减少滞留在树脂层的气体，以避免气体对后续工艺良率造成影响，进而能够提高产品良率。
可选地，至少一个所述放气结构设置在所述树脂层与所述薄膜晶体管相对应的区域内。
可选地，至少一个所述放气结构设置在所述树脂层与所述栅线有交叠的区域内；和/或；
至少一个所述放气结构设置在所述树脂层与所述数据线有交叠的区域内；和/或，
至少一个所述放气结构设置在所述树脂层与所述栅线和数据线有交叠的区域内。
可选地，对应于所述像素单元内设有至少两个所述放气结构。
可选地，至少一个所述放气结构对应于蓝色像素单元。
可选地，所述相邻的三个像素单元中均设置有所述放气结构。
可选地，还包括与所述像素电极层同层设置的覆盖电极，所述覆盖电极覆盖至少部分放气结构。
可选地，所述放气结构为盲孔，且所述盲孔的深度与所述树脂层厚度之比的范围为0.04-0.1；或者，
所述放气结构为贯穿所述树脂层的通孔。
可选地，所述树脂层位于所述数据线所在层与所述像素电极之间，所述树脂层包括彩色滤光层。
可选地，所述数据线层所在层与彩色滤光层之间有钝化层；或者，所述像素电极与所述彩色滤光层之间有钝化层。
可选地，还包括公共电极，所述钝化层位于所述像素电极和所述公共电极之间。
可选地，还包括公共电极，所述像素电极下方设置所述公共电极；或者，所述像素电极上方设置所述公共电极；或者，所述像素电极与所述公共电极同层设置。
可选地，所述像素电极包括狭缝结构。
一种显示装置，包括上述技术方案中任一项所提供的阵列基板。
附图说明
图1为本实用新型提供的一种阵列基板的结构示意图；
图2为本实用新型提供的一种阵列基板中放气结构位置示意图；
图3为本实用新型提供的一种阵列基板中放气结构另一位置示意图；
图4为本实用新型提供的一种阵列基板中放气结构另一位置示意图。
具体实施方式
下面将结合本实用新型实施例中的附图，对本实用新型实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本实用新型一部分实施例，而不是全部的实施例。基于本实用新型中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本实用新型保护的范围。
如图1、图2、图3以及图4所示，其中，图1是图2或3或4的单个像素单元的剖面图，一种阵列基板，包括衬底基板1、设置在衬底基板1上的的数据线10和栅线11，数据线10和栅线11限定出像素单元，像素单元包括薄膜晶体管4、树脂层5、像素电极8，树脂层5设有至少一个放气结构9，放气结构9的开口方向背离衬底基板1。
在上述阵列基板中，树脂层5上的放气结构9能够将树脂层5中的气体排出，一方面能够减少树脂层5中的气泡，进而在一定程度上减少因气泡膨胀导致的树脂层5高低不平，另一方面能够减少滞留在树脂层5的气体，以避免气体对后续工艺良率造成影响，进而能够提高产品良率。
一种可选实施方式中，如图2、图3以及图4所示，通常薄膜晶体管4设置在栅线11和数据线10交叉处(未示出)，至少一个放气结构9设置在树脂层5与薄膜晶体管4相对应的区域内，例如：放气结构9设置在树脂层5与薄膜晶体管4相对的区域内，既能够实现对树脂层5内气泡的排除，又能够避免对像素区造成干扰，影像显示效果。
在不影响显示效果的基础上，放气结构9在树脂层5的位置有多种方式，具体地，如图2、图3以及图4所示，至少一个放气结构9设置在树脂层5与栅线11有交叠的区域内；和/或；
至少一个放气结构9设置在树脂层5与数据线10有交叠的区域内；和/或，
至少一个放气结构9设置在树脂层5与栅线11和数据线10均有交叠处区域内。
放气结构9为位置设置方式可选以下几种：
方式一、至少一个放气结构9设置在树脂层5与栅线11有交叠正对的区域内；
方式二、至少一个放气结构9设置在树脂层5与数据线10有交叠正对的区域内；
方式三、至少一个放气结构9设置在树脂层5与栅线11和数据线10均有交叠正对的区域内。
在上述位置设置中，放气结构9设置在树脂层5与栅线11有交叠的区域内能够避免在像素区影响显示效果，而放气结构9的位置靠近数据线10的位置或者是数据线10与栅线11交叠处有利于树脂层5在上述位置的气泡的排除。
为了将气泡更好地从树脂层5中排除，一种可选实施方式中，如图3以及图4所示，对应于像素单元内设有至少两个放气结构9，其中放气结构9的形状、大小以及在树脂层5上的深度没有限制，对应于像素单元内设有的至少两个放气结构9可以是相同的放气结构9，也可以时完全不相同的放气结构9。
在对应于像素单元内设置放气结构9时，至少一个放气结构9设置在对应蓝色亚像素单元。
在对应于像素单元内设置放气结构9时，具体地，相邻的三个像素单元中均设置有放气结构9。
其中,所有像素单元的树脂层可以是整层结构，相互连接；也可以是部分或全部像素单元是相互独立的树脂层；或者，同一行或同一列像素单元的树脂层是一体结构，即同一列或同一行像素单元的树脂层相互连接。当然，对于像素单元是独立的树脂层，相邻像素单元的树脂层可以略有重叠或不重叠。
一种可选实施方式中，阵列基板还包括与像素电极8层同层设置的覆盖电极，覆盖电极覆盖至少部分放气结构9。
为了避免气体或者是电极工艺中过多的残余物堆积在放气结构9中，在部分放气结构9上覆盖有覆盖电极，可以有效地防止对显示效果的影响；覆盖电极可以相互连接，也可以全部断开，独立分布；另外，覆盖电极可以与像素电极8同层设置，也可以与像素电极8相互连接。
一种可选实施方式中，放气结构9为盲孔，且盲孔的深度与树脂层5厚度之比的范围为0.04-0.1；或者，
放气结构9为贯穿树脂层5的通孔。
放气结构9的深度小于或等于树脂层5的厚度，当放气结构9为盲孔时，盲孔的深度与树脂层5厚度之比可以为0.04、0.05、0.06、0.07、0.08、0.09、0.1，另外，放气结构9还可以为贯穿树脂层5的通孔，盲孔的深度可以根据阵列基板的具体情况进行设置。
一种可选实施方式中，树脂层5位于数据线10所在层与像素电极8之间，树脂层5包括彩色滤光层。其中,像素单元的彩色滤光层可以是整层结构，相互连接；彩色滤光层也可以是部分或全部像素单元是相互独立；或者，同一行或同一列像素单元的彩色滤光层是一体结构，即同一列或同一行像素单元的彩色滤光层相互连接。当然，对于像素单元是独立的彩色滤光层，相邻像素单元的彩色滤光层可以略有重叠或不重叠。彩色滤光层可以单一色彩或多种颜色的组合，例如：彩色滤光层包括红色，绿色，蓝色，还可以是其他颜色的组合。
当树脂层5中设置有彩色滤光层时，通过在树脂层5以及彩色滤光层中设置放气结构9，能够排除位于树脂层5以及彩色滤光层中的气泡，避免气体对树脂层5和彩色滤光层以及后续工艺造成影响。
具体地，数据线10所在层与彩色滤光层之间有钝化层6；或者，像素电极8与彩色滤光层之间有钝化层6，钝化层6不论是设置在数据线10所在层和彩色滤光层之间还是设置在像素电极8进而彩色滤光层之间，均能够加强树脂层5和源漏极电极层之间的接触强度。
具体地一种实施方式，如图1所示，像素电极8下方设置有公共电极7。在衬底基板1上设置有薄膜晶体管4，以及与薄膜晶体管4连接的像素电极8，其中，薄膜晶体管4包括栅极2、栅绝缘层3、半导体层42、源极411，漏极412，像素电极与源漏极所在层之间还设置有树脂层5、公共电极7、钝化层6，像素电极8通过过孔Q与漏极412相连，钝化层6位于像素电极8和公共电极7之间，像素电极8下方设置公共电极7。
通常，栅极2与栅线同层设置，栅极2与栅线连接或栅极与栅线是一体结构；源、漏极所在层与数据线同层设置，源极与数据线连接。
具体地，像素电极8包括狭缝结构。例如，像素电极为狭缝电极，具有狭缝结构的像素电极8的光透过率较好，使得阵列件具有较好的显示效果。当然，像素电极和公共电极还可以有其他组合方式。例如：像素电极在公共电极下方，像素电极为板状，公共电极包括狭缝结构；或者，像素电极与公共电极同层，像素电极狭缝结构，公共电极包括狭缝结构；或者像素电极在阵列基板上，公共电极在对置基板上，像素电极包括狭缝结构。
一种显示装置，包括上述技术方案中任一项所提供的阵列基板，由于阵列基板的显示效果较好，产品良率高，包含阵列基板的显示装置同样具体较好的显示效果和产品良率。
显然，本领域的技术人员可以对本实用新型实施例进行各种改动和变型而不脱离本实用新型的精神和范围。这样，倘若本实用新型的这些修改和变型属于本实用新型权利要求及其等同技术的范围之内，则本实用新型也意图包含这些改动和变型在内。

Claims (14)

1.一种阵列基板，包括衬底基板、设置在所述衬底基板上的数据线和栅线，所述栅线和数据线限定出像素单元，所述像素单元包括薄膜晶体管、树脂层、像素电极，其特征在于，所述树脂层设有至少一个放气结构，所述放气结构的开口方向背离所述衬底基板。
2.根据权利要求1所述的阵列基板，其特征在于，至少一个所述放气结构设置在所述树脂层与所述薄膜晶体管相对应的区域内。
3.根据权利要求2所述的阵列基板，其特征在于，至少一个所述放气结构设置在所述树脂层与所述栅线有交叠的区域内；和/或；
至少一个所述放气结构设置在所述树脂层与所述数据线有交叠的区域内；和/或，
至少一个所述放气结构设置在所述树脂层与所述栅线和数据线均有交叠的区域内。
4.根据权利要求2所述的阵列基板，其特征在于，对应于所述像素单元内设有至少两个所述放气结构。
5.根据权利要求2所述的阵列基板，其特征在于，至少一个所述放气结构对应于蓝色像素单元。
6.根据权利要求2所述的阵列基板，其特征在于，所述相邻的三个像素单元中均设置有所述放气结构。
7.根据权利要求2所述的阵列基板，其特征在于，还包括与所述像素电极层同层设置的覆盖电极，所述覆盖电极覆盖至少部分放气结构。
8.根据权利要求1所述的阵列基板，其特征在于，所述放气结构为盲孔，且所述盲孔的深度与所述树脂层厚度之比的范围为0.04-0.1；或者，
所述放气结构为贯穿所述树脂层的通孔。
9.根据权利要求1所述的阵列基板，其特征在于，所述树脂层位于所述数据线所在层与所述像素电极之间，所述树脂层包括彩色滤光层。
10.根据权利要求9所述的阵列基板，其特征在于，所述数据线所在层与彩色滤光层之间有钝化层；或者，所述像素电极与所述彩色滤光层之间有钝化层。
11.根据权利要求10所述的阵列基板，其特征在于，还包括公共电极，所述钝化层位于所述像素电极和所述公共电极之间。
12.根据权利要求1或10所述的阵列基板，其特征在于，还包括公共电极，所述像素电极下方设置所述公共电极；或者，所述像素电极上方设置所述公共电极；或者，所述像素电极与所述公共电极同层设置。
13.根据权利要求1或11所述的阵列基板，其特征在于，所述像素电极包括狭缝结构。
14.一种显示装置，其特征在于，包括如权利要求1-13所述的阵列基板。
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