CN205726284U - Intelligent earphone - Google Patents

Intelligent earphone Download PDF

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Publication number
CN205726284U
CN205726284U CN201620391279.5U CN201620391279U CN205726284U CN 205726284 U CN205726284 U CN 205726284U CN 201620391279 U CN201620391279 U CN 201620391279U CN 205726284 U CN205726284 U CN 205726284U
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China
Prior art keywords
electrically connected
volume
resistance
loop
level setting
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Expired - Fee Related
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CN201620391279.5U
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Chinese (zh)
Inventor
刘聪
邬宁
程飞龙
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FENGFAN (SUZHOU) AUDIO TECHNOLOGY Co.,Ltd.
Jiangxi Feier Technology Co., Ltd
Original Assignee
Peak (suzhou) Audio Technology Co Ltd
Peak (beijing) Technology Co Ltd
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Priority to CN201620391279.5U priority Critical patent/CN205726284U/en
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Abstract

The utility model discloses a kind of intelligent earphone, wherein, comprise depletion type disconnecting switch and at least two volume controls loop, depletion type disconnecting switch is electrically connected at least two volume and controls loop, at least two volume controls the corresponding different intelligent earphone volume control mode in loop, and depletion type disconnecting switch is according to whether receive and select the volume switching to export high level to control loop after at least two volume controls the high level that one of loop exports.

Description

Intelligent earphone
Technical field
This utility model relates to a kind of intelligent earphone, particularly to a kind of intelligent earphone being capable of automatically selecting switching volume control loop.
Background technology
Popular along with music and video playback apparatus, enriches the entertainment life of people.Current existing music and video playback apparatus are based primarily upon ios system and Android system, and the intelligent earphone that it is possible to be applicable to ios system and Android system rises the most therewith.
Patent CN204616061U discloses a kind of Intelligent mobile equipment earphone and controls device, is arranged in an intelligent earphone.nullRefer to Fig. 1,Fig. 1 is the circuit diagram that prior art Intelligent mobile equipment earphone controls device,This device makes Intelligent mobile equipment earphone control device can control switch between loop and Android volume control loop in ios volume by switching double-point double-throw switch S,Although ios system and Android system can be applicable to,But when using Android volume to control loop,MIC end due to ios earphone chip internal,REM end and earth terminal GND are in connection status,And,Find that the supply voltage after connecting intelligent controlling device extremely major part Android device is typically at 0.7V~0.8V in testing,Cause the intelligent controlling device of earphone and the operational failure of Android device,Additionally after earphone switches to ios control model,Under certain high temperature,The reverse leakage causing diode causes self-inspection under ios pattern to be lost efficacy,Cause causing can not effectively disconnecting Android volume when using ios volume to control loop and control loop.
Patent CN103079138B also discloses a kind of earphone, refer to Fig. 2 again, Fig. 2 is the circuit diagram of prior art earphone, this earphone includes: votage control switch S, switch key group, mike Mic and plural head circuit, the most different head circuit correspondence different intelligent mobile phone operating systems;Votage control switch is arranged between switch key group and mike and head circuit more than two;The operating system of the smart mobile phone that votage control switch is currently inserted into according to earphone described in the voltage identification connecing mike end of earphone, the switching switch controlling self is switched to one group of head circuit of correspondence, to realize connecting of switch key group and the mike one group head circuit corresponding with this.The corresponding voltage range simultaneously also disclosing the first operation system of smart phone is+1.5V~+1.9V, the corresponding voltage range of the second operation system of smart phone is+2.0V~+2.5V, and the corresponding voltage range of the third operation system of smart phone is+2.6V~+3.5V.Coordinate votage control switch to switch over after identifying mike both end voltage and controlling to be capable of by the way of its own switch switches head circuit the switching of head circuit but precisely identify mike both end voltage due to needs to cause there is the problems such as time slot if there is spread of voltage or engagement process and can cause earphone short time disabler impact use although this, and votage control switch cannot thoroughly disconnect other meeting roads when using a kind of head circuit, it is also possible to causes ear-phone function to lose efficacy.
Therefore it is badly in need of developing a kind of intelligent earphone that can overcome drawbacks described above.
Utility model content
Technical problem to be solved in the utility model is just to provide a kind of intelligent earphone, wherein, comprise: depletion type disconnecting switch and at least two volume control loop, described depletion type disconnecting switch is electrically connected at described at least two volume and controls loop, described at least two volume controls the corresponding different intelligent earphone volume control mode in loop, and described depletion type disconnecting switch is according to whether receive and select the described volume switching to export described high level to control loop after described at least two volume controls the high level that one of loop exports.
Above-mentioned intelligent earphone, wherein, also comprise single-pole double-throw switch (SPDT), it is electrically connected at described depletion type disconnecting switch and described at least two volume controls loop, second end of described single-pole double-throw switch (SPDT) is also electrically connected at the MIC+ end of described intelligent earphone, and user selects the described volume control loop of switching to control loop works by controlling the described single-pole double-throw switch (SPDT) described volume of startup according to described depletion type disconnecting switch.
Above-mentioned intelligent earphone, wherein, described at least two volume controls the ios volume that loop is ios volume control mode and controls the Android volume control loop of loop and Android volume control mode.
nullAbove-mentioned intelligent earphone,Wherein,Described ios volume controls loop and comprises the first resistance、Second resistance、3rd resistance、Ios control chip、First field effect transistor switch pipe、First level setting switches and the second level setting switches,3rd end of described single-pole double-throw switch (SPDT) is electrically connected at described ios control chip by described first resistance,Described ios control chip is electrically connected at the drain electrode of described first field effect transistor switch pipe by described second resistance,The grid of described first field effect transistor switch pipe is electrically connected at described ios control chip,The source electrode of described first field effect transistor switch pipe is electrically connected at one end of described first level setting switches,The source electrode of described first field effect transistor switch pipe is electrically connected at one end of described second level setting switches also by described 3rd resistance,Described first level setting switches and the other end ground connection of described second level setting switches.
Above-mentioned intelligent earphone, wherein, described Android volume controls loop and comprises the 4th resistance, 5th resistance, described first level setting switches and described second level setting switches, first end of described single-pole double-throw switch (SPDT) is electrically connected at two inputs of described depletion type disconnecting switch, two outfans of described depletion type disconnecting switch one of them be electrically connected at one end of described second level setting switches by described 4th resistance, two outfans of described depletion type disconnecting switch wherein another is electrically connected at one end of described first level setting switches by described 5th resistance, the VCC end of described depletion type disconnecting switch is electrically connected at the MICPWR end of described ios control chip.
Above-mentioned intelligent earphone, wherein, also comprise microphone chip and connect/hang up key, described microphone chip is electrically connected at described MIC+ end, described connect/hang up key one end and be electrically connected on the connecting path of described MIC+ end and described microphone chip, described in connect/hang up the other end ground connection of key.
Above-mentioned intelligent earphone, wherein, also comprise the second field effect transistor switch pipe, its grid is electrically connected at described ios control chip, described ios control chip is electrically connected at the source electrode of described two field effect transistor switch pipes also by the 7th resistance, and the drain electrode of described second field effect transistor switch pipe is electrically connected at described microphone chip.
Above-mentioned intelligent earphone, wherein, also comprising the 3rd field effect transistor switch pipe, its grid is electrically connected at the first end of described single-pole double-throw switch (SPDT) by one the 8th resistance, the source ground of described 3rd field effect transistor switch pipe, the drain electrode of described 3rd field effect transistor switch pipe is electrically connected at described microphone chip.
Above-mentioned intelligent earphone, wherein, also comprises the first Transient Voltage Suppressor, and its one end is electrically connected on the connecting path of described 5th resistance and described first level setting switches, the other end ground connection of described first Transient Voltage Suppressor.
Above-mentioned intelligent earphone, wherein, also comprises the second Transient Voltage Suppressor, and its one end is electrically connected on the connecting path of described 4th resistance and described second level setting switches, the other end ground connection of described second Transient Voltage Suppressor.
In sum, relative to prior art, it has the beneficial effects that this utility model,
1, depletion type disconnecting switch is utilized to turn in the case of unpowered voltage, the characteristic of isolation is presented when having power supply (reaching more than 1.5V), when the MICPWR end of ios chip exports high level, depletion type disconnecting switch selects switching ios volume to control loop the loop disconnection other connected.Now single-pole double-throw switch (SPDT) is pushed the 3rd end, can allow whole circuit work well;
2, not exporting high level when MICPWR end, depletion type disconnecting switch turns on, and selects Android volume to control loop.Now single-pole double-throw switch (SPDT) is pushed the first end, can allow whole circuit work well.
Control device by this intelligent earphone and can effectively disconnect Android volume control loop when switching to ios volume control mode, can effectively disconnect ios volume when switching to Android volume control mode and control loop, control interfering between loop with two kinds of volumes that this is avoided.
With embodiment, this utility model is described further below in conjunction with the accompanying drawings.
Accompanying drawing explanation
Fig. 1 is the circuit diagram that prior art Intelligent mobile equipment earphone controls device;
Fig. 2 is the circuit diagram of prior art earphone;
Fig. 3 is this utility model intelligent earphone circuit diagram.
Detailed description of the invention
With specific embodiment, technical solutions of the utility model are described in detail below in conjunction with the accompanying drawings, to be further understood that the purpose of this utility model, scheme and effect, but are not limited to this utility model.
Refer to Fig. 3, Fig. 3 is this utility model intelligent earphone circuit diagram.In the present embodiment, this utility model intelligent earphone comprises, depletion type disconnecting switch SW1 and at least two volume control loop, depletion type disconnecting switch SW1 is electrically connected at least two volume and controls loop, at least two volume controls the corresponding different intelligent earphone volume control mode in loop, and depletion type disconnecting switch SW1 is according to whether receive and select the volume switching to export high level to control loop after at least two volume controls the high level that one of loop exports.Two kinds of volumes of at least a part of which control the ios volume that loop is ios volume control mode and control the Android volume control loop of loop and Android volume control mode, but this utility model is not limited thereto, can be the most also that the WindowsPhone volume of WindowsPhone volume control mode controls loop.
Further, intelligent earphone also comprises:
Single-pole double-throw switch (SPDT) SW2, first end 1 of single-pole double-throw switch (SPDT) SW2 is electrically connected at depletion type disconnecting switch two inputs INA, INB and the MIC+ end of intelligent earphone, and user selects the volume control loop of switching to start this volume control loop works by controlling single-pole double-throw switch (SPDT) SW2 according to depletion type disconnecting switch SW1.
nullIos volume controls loop and comprises the first resistance R1、Second resistance R2、3rd resistance R3、Ios control chip U1、First field effect transistor switch pipe Q1、First level setting switches S1 and the second level setting switches S2,3rd end 3 of single-pole double-throw switch (SPDT) SW2 is electrically connected at the MIC end of ios control chip U1 by the first resistance R1,The REM end of ios control chip U1 is electrically connected at the drain D of the first field effect transistor switch pipe Q1 by the second resistance R2,The grid G of the first field effect transistor switch pipe Q1 is electrically connected at the MICPWR end of ios control chip U1,The source S of the first field effect transistor switch pipe Q1 is electrically connected at one end of the first level setting switches S1,The source S of the first field effect transistor switch pipe Q1 is electrically connected at one end of the second level setting switches S2 also by the 3rd resistance R3,First level setting switches S1 and the other end ground connection of described second level setting switches S2;
nullAndroid volume controls loop and comprises the 4th resistance R4、5th resistance R5、First level setting switches S1 and the second level setting switches S2,First end 1 of single-pole double-throw switch (SPDT) SW2 is electrically connected at two input INA of depletion type disconnecting switch SW1、INB,The outfan OUTA of depletion type disconnecting switch SW1 of corresponding input INA is electrically connected at one end of the second level setting switches S2 by the 4th resistance R4,The outfan OUTB of depletion type disconnecting switch SW1 of corresponding input INB is electrically connected at one end of the first level setting switches S1 by the 5th resistance R5,The VCC end of depletion type disconnecting switch SW1 is electrically connected at the MICPWR end of ios control chip U1 by the 6th resistance R6,One end of first electric capacity C1 is electrically connected on the connecting path between the 6th resistance R6 and VCC end,The other end ground connection of the first electric capacity C1.
Yet further, intelligent earphone also comprises the first Transient Voltage Suppressor D1, the second Transient Voltage Suppressor D2 and the 3rd Transient Voltage Suppressor D3;One end of first Transient Voltage Suppressor D1 is electrically connected on the connecting path of the 5th resistance R5 and the first level setting switches S1, the other end ground connection of the first Transient Voltage Suppressor D1;One end of second Transient Voltage Suppressor D2 is electrically connected on the connecting path of the 4th resistance R4 and the second level setting switches S2, the other end ground connection of the second Transient Voltage Suppressor D2;One end of 3rd Transient Voltage Suppressor D3 is electrically connected at second end 2 of MIC+ terminal single-pole double-throw switch (SPDT) SW2, the other end ground connection of the 3rd Transient Voltage Suppressor D3;On the connecting path of the second end 2 that one end of the 3rd electric capacity C3 is electrically connected at the 3rd Transient Voltage Suppressor D3 and single-pole double-throw switch (SPDT) SW2, the other end ground connection of the 3rd electric capacity C3.This utility model wherein arranges three Transient Voltage Suppressors and each serves as the effect of electrostatic protection in circuit, but this utility model is not to be limited.
Further, intelligent earphone also comprises microphone chip U2, meets/hang up key S3, the second field effect transistor switch pipe Q2 and the 3rd field effect transistor switch pipe Q3;Microphone chip U2 is electrically connected at second end 2 of MIC+ end and single-pole double-throw switch (SPDT) SW2 containing an a power end POWER and outfan OUT, power end POWER;The one end meeting/hang up key S3 is electrically connected on the connecting path of the second end 2 and power end POWER of single-pole double-throw switch (SPDT) SW2, connects/hang up the other end ground connection of key S3;The grid G of the second field effect transistor switch pipe Q2 is electrically connected at the MICPWR end of ios control chip U1, MICPWR end is electrically connected at ground connection after the source S of the second field effect transistor switch pipe Q2 also by the 7th resistance R7, mike U2 also comprises two GND ends, and the drain D of the second field effect transistor switch pipe Q2 is electrically connected at two GND ends;The grid G of the 3rd field effect transistor switch pipe Q3 is electrically connected at first end 1 of single-pole double-throw switch (SPDT) SW2 by the 8th resistance R8, the source S ground connection of the 3rd field effect transistor switch pipe Q3, the drain D of the 3rd field effect transistor switch pipe Q3 is electrically connected at two GND ends, one end of the 9th resistance R9, the other end ground connection of the 9th resistance R9 it is also connected with on the connecting path of the grid G of the 8th resistance R8 and the 3rd field effect transistor switch pipe Q3;The outfan OUT of microphone chip U2 is electrically connected at the second field effect transistor switch pipe Q2 and the drain D of the 3rd field effect transistor switch pipe Q3 by the tenth resistance R10;The two of tenth resistance R10 are also parallel with the second electric capacity C2 and the 11st resistance R11 being sequentially connected in series.
Below in conjunction with Fig. 3, describe this utility model intelligent earphone specific works process in detail.
First self-inspection stage: ios control chip through single-pole double-throw switch (SPDT) SW2 by second, three ends are ios volume control mode after powering on, the entrance self-inspection first stage i.e. checks the second resistance R2 of REM end, when the first self-inspection stage of entrance, the MICPWR end of ios control chip U1 is output as low level, REM is output as high level, MICPWR end is the feeder ear of depletion type disconnecting switch SW1, two input INA of depletion type disconnecting switch SW1, INB and corresponding two input INA, two outfan OUTA of INB, OUTB turns on, simultaneously because the 2nd resistance R2 and the series connection of the first field effect transistor Q1, owing to the first field effect transistor Q1 terminates in that drain D and pin present high resistant, the impedance detection of the REM end of ios control chip is passed through;
When MICPWR end is output as high level, REM end is output as low level, MICPWR end is the feeder ear of depletion type disconnecting switch SW1, two inputs INA, INB of depletion type disconnecting switch SW1 and two outfans OUTA, OUTB of corresponding two inputs INA, INB disconnect, i.e. depletion type disconnecting switch SW1 selects to switch to ios volume control loop.First field effect transistor Q1 conducting simultaneously, second resistance R2 is electrically connected with the 3rd resistance R3 and the first level setting switches S1, the second level setting switches S2 respectively through drain D and the source S of the first field effect transistor Q1, i.e. user can be accordingly increased by the first level setting switches S1, the second level setting switches S2 or be reduced volume, passes through to meet/hang up key S3 simultaneously and answers or hang up the telephone;
nullSingle-pole double-throw switch (SPDT) SW2 is by first,Two ends are Android volume control mode after powering on,When MICPWR end is output as low level,I.e. depletion type disconnecting switch SW1 can't detect high level input,Two input INA of depletion type disconnecting switch SW1、INB and corresponding two input INA、Two outfan OUTA of INB、OUTB turns on,I.e. depletion type disconnecting switch SW1 selects to switch to Android volume control loop,First end 1 of single-pole double-throw switch (SPDT) SW2 is by depletion type disconnecting switch SW1、4th resistance R4、5th resistance R5 is electrically connected at the first level setting switches S1、Second level setting switches S2,I.e. user can pass through the first level setting switches S1、Second level setting switches S2 accordingly increases or reduces volume,Pass through to meet/hang up key S3 answer or hang up the telephone simultaneously.It should be noted that, owing to arranging the first field effect transistor switch pipe Q1, can thoroughly disconnect Android volume when depletion type disconnecting switch SW1 does not receives high level and control the connection in loop and ios control chip U1, ensure to control loop can effectively disconnect ios volume with this, it is to avoid two kinds of volumes control interfering between loops.
Refer to table 1, the truth table that table 1 works for intelligent earphone:
Table 1
As shown in a, b row of table 1, intelligent earphone accesses Android mobile phone, when depletion type disconnecting switch SW1 does not receives high level, selects to switch to Android volume and controls loop;Now when single-pole double throw open SW2 close be in Android volume control mode time, the first level setting switches S1, the second level setting switches S2 and meet/hang up key S3 and can work;Now meet/hang up key S3 can work when single-pole double-throw switch (SPDT) is in ios volume control mode, but the first level setting switches S1, the second level setting switches S2 do not work, i.e. user is merely able to put forward music or connects/hang up and can not regulate volume, if user needs to regulate volume, only need to stir single-pole double throw opens SW2 to Android volume control mode.
As shown in c, d row of table 1, intelligent earphone accesses i Phone, when depletion type disconnecting switch SW1 receives high level, selects to switch to ios volume and controls loop;Now when single-pole double throw open SW2 close be in ios volume control mode time, the first level setting switches S1, the second level setting switches S2 and meet/hang up key S3 and can work;Now meet/hang up key S3 can work when single-pole double-throw switch (SPDT) is in Android volume control mode, but the first level setting switches S1, the second level setting switches S2 do not work, i.e. user is merely able to put forward music or connects/hang up and can not regulate volume, if user needs to regulate volume, only need to stir single-pole double throw opens SW2 to ios volume control mode.
Certainly; this utility model also can have other various embodiments; in the case of without departing substantially from this utility model spirit and essence thereof; those of ordinary skill in the art are when making various corresponding change and deformation according to this utility model, but these change accordingly and deformation all should belong to the scope of the claims appended by this utility model.

Claims (10)

1. an intelligent earphone, it is characterized in that, comprise: depletion type disconnecting switch and at least two volume control loop, described depletion type disconnecting switch is electrically connected at described at least two volume and controls loop, described at least two volume controls the corresponding different intelligent earphone volume control mode in loop, and described depletion type disconnecting switch is according to whether receive and select the described volume switching to export described high level to control loop after described at least two volume controls the high level that one of loop exports.
2. intelligent earphone as claimed in claim 1, it is characterized in that, also comprise single-pole double-throw switch (SPDT), it is electrically connected at described depletion type disconnecting switch and described at least two volume controls loop, second end of described single-pole double-throw switch (SPDT) is also electrically connected at the MIC+ end of described intelligent earphone, and user selects the described volume control loop of switching to control loop works by controlling the described single-pole double-throw switch (SPDT) described volume of startup according to described depletion type disconnecting switch.
3. intelligent earphone as claimed in claim 2, it is characterised in that described at least two volume controls the ios volume that loop is ios volume control mode and controls the Android volume control loop of loop and Android volume control mode.
null4. intelligent earphone as claimed in claim 3,It is characterized in that,Described ios volume controls loop and comprises the first resistance、Second resistance、3rd resistance、Ios control chip、First field effect transistor switch pipe、First level setting switches and the second level setting switches,3rd end of described single-pole double-throw switch (SPDT) is electrically connected at described ios control chip by described first resistance,Described ios control chip is electrically connected at the drain electrode of described first field effect transistor switch pipe by described second resistance,The grid of described first field effect transistor switch pipe is electrically connected at described ios control chip,The source electrode of described first field effect transistor switch pipe is electrically connected at one end of described first level setting switches,The source electrode of described first field effect transistor switch pipe is electrically connected at one end of described second level setting switches also by described 3rd resistance,Described first level setting switches and the other end ground connection of described second level setting switches.
5. intelligent earphone as claimed in claim 4, it is characterized in that, described Android volume controls loop and comprises the 4th resistance, 5th resistance, described first level setting switches and described second level setting switches, first end of described single-pole double-throw switch (SPDT) is electrically connected at two inputs of described depletion type disconnecting switch, two outfans of described depletion type disconnecting switch one of them be electrically connected at one end of described second level setting switches by described 4th resistance, two outfans of described depletion type disconnecting switch wherein another is electrically connected at one end of described first level setting switches by described 5th resistance, the VCC end of described depletion type disconnecting switch is electrically connected at the MICPWR end of described ios control chip.
6. intelligent earphone as claimed in claim 5, it is characterized in that, also comprise microphone chip and connect/hang up key, described microphone chip is electrically connected at described MIC+ end, described connect/hang up key one end and be electrically connected on the connecting path of described MIC+ end and described microphone chip, described in connect/hang up the other end ground connection of key.
7. intelligent earphone as claimed in claim 6, it is characterized in that, also comprise the second field effect transistor switch pipe, its grid is electrically connected at described ios control chip, described ios control chip is electrically connected at the source electrode of described two field effect transistor switch pipes also by the 7th resistance, and the drain electrode of described second field effect transistor switch pipe is electrically connected at described microphone chip.
8. intelligent earphone as claimed in claim 7, it is characterized in that, also comprise the 3rd field effect transistor switch pipe, its grid is electrically connected at the first end of described single-pole double-throw switch (SPDT) by one the 8th resistance, the source ground of described 3rd field effect transistor switch pipe, the drain electrode of described 3rd field effect transistor switch pipe is electrically connected at described microphone chip.
9. intelligent earphone as claimed in claim 8, it is characterized in that, also comprising the first Transient Voltage Suppressor, its one end is electrically connected on the connecting path of described 5th resistance and described first level setting switches, the other end ground connection of described first Transient Voltage Suppressor.
10. intelligent earphone as claimed in claim 9, it is characterized in that, also comprising the second Transient Voltage Suppressor, its one end is electrically connected on the connecting path of described 4th resistance and described second level setting switches, the other end ground connection of described second Transient Voltage Suppressor.
CN201620391279.5U 2016-05-03 2016-05-03 Intelligent earphone Expired - Fee Related CN205726284U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107343234A (en) * 2016-05-03 2017-11-10 峰范(北京)科技有限公司 Intelligent earphone
CN108495222A (en) * 2018-03-14 2018-09-04 佳禾智能科技股份有限公司 Double compatible line control earphone control circuits and the control method realized based on the circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107343234A (en) * 2016-05-03 2017-11-10 峰范(北京)科技有限公司 Intelligent earphone
CN107343234B (en) * 2016-05-03 2023-04-21 江西斐耳科技有限公司 Intelligent earphone
CN108495222A (en) * 2018-03-14 2018-09-04 佳禾智能科技股份有限公司 Double compatible line control earphone control circuits and the control method realized based on the circuit

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