CN205644429U - Supply circuit of polydisc position hard disk - Google Patents
Supply circuit of polydisc position hard disk Download PDFInfo
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- CN205644429U CN205644429U CN201620194666.XU CN201620194666U CN205644429U CN 205644429 U CN205644429 U CN 205644429U CN 201620194666 U CN201620194666 U CN 201620194666U CN 205644429 U CN205644429 U CN 205644429U
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Abstract
The embodiment of the utility model provides a relate to hard disk power supply technique, in particular to supply circuit of polydisc position hard disk for length when solving the power module use that exists among the prior art, the crash rate is high, and the scheduling problem costs an arm and a leg. Include: every power module passes through reposition of redundant personnel control circuit organizes the electricity with different hard disks respectively and is connected, including at least one hard disk, includes different hard disks in the different hard disks group in every hard disk group, reposition of redundant personnel control circuit determines each power module and when in proper working order, controls its hard disk group power supply of connecting for the electricity, and, determine arbitrary power module work and when unusual, control arbitrary power module in proper working order, still do the hard disk group power supply that the unusual power module electricity of arbitrary work is connected. Long extension when making power module use, the reliability improves.
Description
Technical Field
The utility model relates to a hard disk power supply technology, in particular to power supply circuit of many dish positions hard disk.
Background
In the multi-power supply design scheme of the multi-disk hard disk, only one power supply supplies power to a load at the same time in the single-power supply scheme in the prior art, the power module is short and long in use time and high in failure rate, the starting current of a single hard disk with the voltage of 12V is usually more than 2A, the current during working is about 1A, when the number of disk positions exceeds 8, the power consumption of the hard disk part can reach 100W, and the requirements on the stability and the heat dissipation of the power module are high. In order to solve the problem, a special redundant power supply module is provided in a high-end server product in the prior art, but the special redundant power supply module is expensive, has a large number of elements, influences the heat dissipation effect, and is not suitable for being applied to the embedding field. Therefore, in an application scenario with a severe environment or a high reliability requirement, how to prolong the service life of the power module and improve the reliability is a problem to be solved at present.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a supply circuit of polydisc position hard disk to length, failure rate height and the expensive problem when solving the power module that exists among the prior art and using.
The utility model aims at realizing through the following technical scheme:
a power supply circuit of a multi-disk hard disk comprises: at least two power supply modules and a shunt control circuit; wherein,
each power supply module is respectively and electrically connected with different hard disk groups through the shunt control circuit, each hard disk group comprises at least one hard disk, and different hard disk groups comprise different hard disks;
when the shunt control circuit determines that each power supply module works normally, the shunt control circuit controls the power supply module to supply power to the electrically connected hard disk group; and when determining that any power supply module works abnormally, controlling any power supply module which works normally, and supplying power to the hard disk group electrically connected with any power supply module which works abnormally.
Optionally, the shunt control circuit is specifically configured to:
when the output voltage of any power supply module is judged to be within a preset voltage range, determining that any power supply module works normally;
and when the output voltage of any power supply module is judged to be beyond the voltage range, determining that any power supply module works abnormally.
Optionally, the shunt control circuit is further configured to:
and when determining that any power supply module recovers from the abnormal work to the normal work, controlling the power supply module recovering to the normal work to supply power to the hard disk group electrically connected with the power supply module when the power supply module works normally.
Optionally, the shunt control circuit includes:
the power supply isolation chip module, the power supply abnormity detection module, the signal level conversion module and the power supply shunting and combining control module;
the power isolation chip module is used for respectively generating power state indicating signals according to the output voltage of each power module and outputting the power state indicating signals corresponding to each power module to the power abnormity detection module, wherein the power state indicating signals are used for indicating whether the value of the output voltage of the corresponding power module is within a preset voltage range;
the power supply abnormity detection module is used for respectively judging whether each power supply module works normally according to the power supply state indication signal output by the power supply isolation chip module and outputting a power supply indication signal to the signal level conversion module; the power supply indicating signal is used for indicating whether a power supply module in the at least two power supply modules works abnormally or not;
the signal level conversion module is used for converting the power supply indication signal output by the power supply abnormality detection module into a level signal which can be received by the power supply shunting and combining control module and outputting the level signal to the power supply shunting and combining control module;
the power supply shunting and combining control module is used for determining that each power supply module is normally operated according to the level signal output by the signal level conversion module and controlling the power supply module to supply power to the electrically connected hard disk group; and when determining that any power supply module works abnormally, controlling any power supply module which works normally, and supplying power to the hard disk group electrically connected with any power supply module which works abnormally.
Optionally, the power isolation chip module includes:
the first resistance branch is used for connecting the output end of any power supply module, dividing the output voltage of any power supply module, and connecting the divided voltage signal to a sixth pin of the power supply isolation chip;
the second resistance branch is used for connecting the output end of any power supply module, dividing the output voltage of any power supply module, and connecting the divided voltage signal to a fifth pin of the power supply isolation chip;
the power isolation chip is configured to generate a power status indication signal corresponding to any one of the power modules according to the voltage signal of the UV pin and the voltage signal of the fifth pin, and output the power status indication signal corresponding to any one of the power modules to the power abnormality detection module through a fourteenth pin of the power isolation chip.
Optionally, the power supply abnormality detecting module includes:
and the AND gate is used for carrying out logic operation on the power state indicating signal corresponding to each power module input to the AND gate to obtain the power supply indicating signal and transmitting the power supply indicating signal to the signal level conversion module through a fifth resistance branch.
Optionally, the signal level conversion module includes:
a base electrode of the first triode is connected with the output end of the power supply abnormality detection module through a sixth resistor branch, and a collector electrode of the first triode is connected with a second node and is used for reversing the polarity of the power supply indication signal output by the power supply abnormality detection module;
the input end of the third switch group is respectively connected with the output end of each power supply module, the output voltage of one power supply module of the at least two power supply modules is selected to be output to the collector of the second triode through a seventh resistor branch circuit, and the level of the output signal of the collector of the second triode is equal to the level of the output voltage of any selected power supply module;
and the base electrode of the second triode is connected with the second node through an eighth resistor branch, the polarity of the signal output by the second node is converted, and a level signal which can be received by the power supply shunting and combining control module is output.
Optionally, the power isolation chip module further includes: the first switch group comprises a first metal oxide semiconductor field effect transistor (MOS) and a second MOS, wherein two source electrodes of the first MOS are connected with each other, a drain electrode of the first MOS is connected to an eleventh pin of the first power isolation chip, a drain electrode of the second MOS is respectively connected with a tenth pin of the first power isolation chip and the hard disk group, base electrodes of the first MOS and the second MOS are connected to an eighth pin of the first power isolation chip, when a difference value between the voltage of the eleventh pin and the voltage of the tenth pin is larger than or equal to a threshold value, the eighth pin drives the first switch group to be switched on, and when the difference value between the voltage of the eleventh pin and the voltage of the tenth pin is smaller than the threshold value, the first switch group is switched off;
the power supply shunting and combining control module comprises: the fourth switch group at least comprises a fifth MOS tube and a sixth MOS tube, the fifth MOS tube and the sixth MOS tube are connected with the drain electrodes of the fifth MOS tube and the sixth MOS tube, the output end of the signal level conversion module is connected with the output end of the signal level conversion module, the source electrode of the fifth MOS tube is connected with the hard disk group through a first branch, the source electrode of the sixth MOS tube is connected with the hard disk group through the first branch, and when the first switch group is switched on and the fourth switch group is switched off, each power module of the at least two power modules is controlled to supply power to the hard disk group electrically connected with the power module; when the first switch set is switched off and the fourth switch set is switched on, the power supply module which normally works is controlled to supply power to the hard disk set which is electrically connected with the at least one power supply module which works abnormally.
Optionally, the hard disks in each hard disk group are inserted into a hard disk back plate in an electrically connected manner, and the shunt control circuit is electrically connected to the hard disk back plate.
The utility model discloses in include: at least two power supply modules and a shunt control circuit; each power supply module is respectively and electrically connected with different hard disk groups through the shunt control circuit, each hard disk group comprises at least one hard disk, and different hard disk groups comprise different hard disks; when the shunt control circuit determines that each power supply module works normally, the shunt control circuit controls the power supply module to supply power to the electrically connected hard disk group; and when determining that any power supply module works abnormally, controlling any power supply module which works normally, and supplying power for the hard disk set electrically connected with any power supply module which works abnormally, so that the service life of the power supply module is prolonged, and the reliability is improved.
Drawings
Fig. 1 is a schematic diagram of a power supply circuit of a multi-disk hard disk according to an embodiment of the present invention;
fig. 2 is an application block diagram provided by an embodiment of the present invention;
fig. 3 is a schematic circuit diagram of a power isolation chip module in a power supply circuit of a multi-disk hard disk according to an embodiment of the present invention;
fig. 4 is a schematic circuit diagram of a power anomaly detection module, a signal level conversion module and a power shunting and combining control module in a power supply circuit of a multi-disk hard disk according to an embodiment of the present invention.
Detailed Description
The utility model discloses a power supply mode that two at least power module of reposition of redundant personnel control circuit control are many dish position hard disks to when extension power module used, improve the reliability.
The embodiments of the present invention will be described in further detail with reference to the drawings attached to the specification. It is to be understood that the embodiments described herein are for purposes of illustration and explanation only and are not intended to limit the present invention.
As shown in fig. 1, an embodiment of the present invention provides a power supply circuit for a multi-disk hard disk, for supplying power to the multi-disk hard disk 400, including: at least two power supply modules (first power supply module 100 and second power supply module 200, etc.) and a shunt control circuit 300.
In the utility model, each power module is respectively electrically connected with different hard disk groups through the shunt control circuit, each hard disk group comprises at least one hard disk, and different hard disk groups comprise different hard disks;
when the shunt control circuit determines that each power supply module works normally, the shunt control circuit controls the power supply module to supply power to the electrically connected hard disk group; and when determining that any power supply module works abnormally, controlling any power supply module which works normally, and supplying power to the hard disk group electrically connected with any power supply module which works abnormally.
The hard disks in each hard disk group can be inserted in the hard disk back plate in an electrically connecting mode, and the shunt control circuit is electrically connected with the hard disk back plate.
The utility model provides a power supply circuit of a multi-disk hard disk, which comprises at least two power supply modules and a shunt control circuit; each power supply module is respectively and electrically connected with different hard disk groups through the shunt control circuit, each hard disk group comprises at least one hard disk, and different hard disk groups comprise different hard disks; when the shunt control circuit determines that each power supply module works normally, the shunt control circuit controls the power supply module to supply power to the electrically connected hard disk group; and when determining that any power supply module works abnormally, controlling any power supply module which works normally, and supplying power for the hard disk set electrically connected with any power supply module which works abnormally, so that the service life of the power supply module is prolonged, and the reliability is improved.
In the embodiment of the present invention, the power module is a dc power module.
The embodiment of the utility model provides an in, the hard disk in the hard disk group can be pegged graft in the hard disk backplate through the mode of electricity connection, provides the interface by the hard disk backplate to make external circuit or equipment can realize the electricity through the interface that the hard disk backplate provided and the hard disk in the different hard disk groups and be connected. The embodiment of the utility model provides an in do not inject the fixed mode of hard disk, also can adopt the fixed hard disk of other modes.
For example, the following steps are carried out: taking two power modules as an example, as shown in fig. 2, output voltages of a power module 1 (i.e., a first power module) and a power module 2 (i.e., a second power module) are respectively marked as +12V _1 and +12V _2, if both the two power modules work normally, the power module 1 supplies power to half of the hard disks in the hard disk backplane, a voltage input to the hard disk backplane is marked as +12V _ a, the power module 2 is controlled to supply power to the other half of the hard disks in the hard disk backplane, a voltage input to the hard disk backplane is marked as +12V _ B, and +12V _ a and +12V _ B respectively supply power to half of the hard disks in the hard disk backplane.
Assuming that when one of the power modules 1 and 2 in fig. 2 is damaged or pulled out (i.e. the power module is abnormal), the remaining power modules supply power to all the hard disks on the hard disk backplane; the hdd (hard Disk drive) in fig. 2 is a hard Disk drive, which is referred to as a hard Disk for short.
The utility model discloses in, the reposition of redundant personnel control circuit specifically is used for:
when the output voltage of any power supply module is judged to be within a preset voltage range, determining that any power supply module works normally;
and when the output voltage of any power supply module is judged to be beyond the voltage range, determining that any power supply module works abnormally.
The embodiment of the utility model provides an in, predetermined voltage range can be set for according to experience or emulation or application environment, wherein, surpass voltage range includes and is less than voltage range's minimum is greater than voltage range's maximum value.
Optionally, the shunt control circuit is further configured to:
and when determining that any power supply module recovers from the abnormal work to the normal work, controlling the power supply module recovering to the normal work to supply power to the hard disk group electrically connected with the power supply module when the power supply module works normally.
The utility model discloses in, it is optional, the reposition of redundant personnel control circuit includes: the power supply isolation chip module, the power supply abnormity detection module, the signal level conversion module and the power supply shunting and combining control module;
the power isolation chip module is used for respectively generating power state indicating signals according to the output voltage of each power module and outputting the power state indicating signals corresponding to each power module to the power abnormity detection module, wherein the power state indicating signals are used for indicating whether the value of the output voltage of the corresponding power module is within a preset voltage range;
the power supply abnormity detection module is used for respectively judging whether each power supply module works normally according to the power supply state indication signal output by the power supply isolation chip module and outputting a power supply indication signal to the signal level conversion module; the power supply indicating signal is used for indicating whether a power supply module in the at least two power supply modules works abnormally or not;
the signal level conversion module is used for converting the power supply indication signal output by the power supply abnormality detection module into a level signal which can be received by the power supply shunting and combining control module and outputting the level signal to the power supply shunting and combining control module;
the power supply shunting and combining control module is used for determining that each power supply module is normally operated according to the level signal output by the signal level conversion module and controlling the power supply module to supply power to the electrically connected hard disk group; and when determining that any power supply module works abnormally, controlling any power supply module which works normally, and supplying power to the hard disk group electrically connected with any power supply module which works abnormally.
The utility model discloses in, it is optional, the power isolation chip module includes:
the first resistance branch is used for connecting the output end of any power supply module, dividing the output voltage of any power supply module, and connecting the divided voltage signal to a sixth pin of the power supply isolation chip;
wherein the sixth pin is a voltage limiting indication (UV) pin;
the second resistance branch is used for connecting the output end of any power supply module, dividing the output voltage of any power supply module, and connecting the divided voltage signal to a fifth pin of the power supply isolation chip;
wherein the fifth pin is an overvoltage indication (OV) pin;
the power isolation chip is configured to generate a power state indication signal corresponding to any one of the power modules according to the voltage signal of the UV pin and the voltage signal of the OV pin, and output the power state indication signal corresponding to any one of the power modules to the power abnormality detection module through a fourteenth pin of the power isolation chip;
the embodiment of the utility model provides an in including a plurality of resistance branch roads and a plurality of power isolation chip, every group resistance branch road and power isolation chip correspond a power module.
In the following, a detailed description is given to the implementation of the power isolation chip module in the shunt control circuit according to an embodiment of the present invention by taking two power modules as an example.
In a first embodiment, a power isolation chip module in a shunt control circuit in this embodiment includes:
the first resistance branch is used for connecting the output end of the first power supply, dividing the output voltage of the first power supply module, and connecting a voltage-limiting indication UV pin of the first power supply isolation chip with a voltage-divided voltage signal; if the UV pin detects that the voltage value is higher than the set voltage value, the output voltage of the first power supply module is higher than the acceptable minimum power supply voltage when the hard disk backboard works stably; if the detected voltage value on the UV pin is lower than the set voltage value, the output voltage of the first power supply module is lower than the acceptable minimum power supply voltage when the hard disk backboard works stably;
the second resistance branch is used for connecting the output end of the first power supply module, dividing the output voltage of the first power supply module, and connecting a voltage signal after voltage division to an overvoltage indication (OV) pin of the first power supply isolation chip; if the voltage detected on the OV pin is higher than a set voltage value, the output voltage of the first power module is higher than the maximum acceptable power supply voltage when the hard disk backboard works stably, and the first isolation chip drives the first switch group to be disconnected through the eighth pin; or, if the OV pin detects that the voltage value is lower than the set voltage value, the output voltage of the first power supply module is lower than the maximum power supply voltage acceptable when the hard disk backboard works stably;
wherein, the eighth pin is a Gate pin;
the first power isolation chip is configured to generate a first power state indication signal according to the voltage signal of the UV pin and the voltage signal of the OV pin, and output the first power state indication signal to the power abnormality detection module through a fourteenth pin of the first power isolation chip; when the voltages detected by the UV pin and the OV pin are both in a preset range, the first power state indicating signal indicates that the value of the output voltage of the first power module is in a preset voltage range; or when the voltages detected by the UV pin and the OV pin are not in a preset range, the first power state indicating signal indicates that the value of the output voltage of the first power module is not in the preset voltage range;
the first switch group comprises a first metal oxide semiconductor field effect transistor (MOS) and a second MOS, wherein two source electrodes of the first MOS are connected with each other, a drain electrode of the first MOS is connected to an eleventh pin of the first power isolation chip, a drain electrode of the second MOS is connected to a tenth pin of the first power isolation chip and is connected with the hard disk backboard, base electrodes of the first MOS and the second MOS are connected to an eighth pin of the first power isolation chip, when a difference value between the voltage of the eleventh pin and the voltage of the tenth pin is larger than or equal to a threshold value, the eighth pin drives the first switch group to be switched on, and when the difference value between the voltage of the eleventh pin and the voltage of the tenth pin is smaller than the threshold value, the eighth pin drives the first switch group to be switched off;
the first capacitor branch is respectively connected with the thirteenth pin and the eleventh pin of the first power isolation chip and supplies power supply voltage to the interior of the first power isolation chip through charging and discharging of the first capacitor branch;
the second capacitor branch connects the twelfth pin and the eleventh pin of the first power isolation chip, and filters noise on an external power supply connected to the eleventh pin, so that an internal circuit of the first power isolation chip cannot be triggered by mistake;
the input end of the fifth switch group is respectively connected with the output voltage of the first power supply module and the output voltage of the second power supply module, and the output end of the fifth switch group is connected with the first filter circuit, so that the output voltage of the first power supply module or the output voltage of the second power supply module is output to the first pin of the first power supply isolation chip through the first filter circuit;
the input end of the sixth switch group is respectively connected with the standby power supply voltage of the first power supply module and the standby power supply voltage of the second power supply module, and the output end of the sixth switch group is connected with a ninth resistance branch circuit, so that the standby power supply voltage of the first power supply module or the standby power supply voltage of the second power supply module is connected with the fourth pin of the first power supply isolation chip through the ninth resistance branch circuit, and the output level of the fourth pin is the same as the level of the standby power supply voltage of the first power supply module or the standby power supply voltage of the second power supply module;
the output end of the sixth switch group is connected with the tenth resistance branch, so that the standby power supply voltage of the first power supply module or the standby power supply voltage of the second power supply module is connected with the fourteenth pin of the first power supply isolation chip through the tenth resistance branch, and the output level of the state indication signal of the first power supply module is the same as the level of the standby power supply voltage of the first power supply module or the standby power supply voltage of the second power supply module;
the first grounding branch circuit is connected with the seventh pin and the ninth pin of the first power isolation chip and the ground;
the third resistance branch is used for connecting the output end of the second power supply module, dividing the output voltage of the second power supply module, and connecting a voltage-limiting indication UV pin of the second power supply isolation chip with a voltage-divided voltage signal; if the voltage value detected on the UV pin is higher than the set voltage value, the output voltage of the second power supply module is higher than the acceptable minimum power supply voltage when the hard disk backboard works stably; or if the detected voltage value on the UV pin is lower than the set voltage value, the output voltage of the second power supply module is lower than the acceptable minimum power supply voltage when the hard disk backboard works stably;
the fourth resistance branch is used for connecting the output end of the second source, dividing the output voltage of the second power supply module, and connecting a voltage signal after voltage division to an overvoltage indication (OV) pin of the second power supply isolation chip; if the OV pin detects that the voltage value is higher than the set voltage value, the output voltage of the second power supply module is higher than the maximum acceptable power supply voltage when the hard disk backboard works stably, and the second isolation chip drives the third switch tube group to be disconnected through the eighth pin; or, if the OV pin detects that the voltage value is lower than the set voltage value, the output voltage of the second power supply module is lower than the maximum power supply voltage acceptable when the hard disk backboard works stably;
the second power isolation chip is configured to generate a second power state indication signal according to the voltage signal of the UV pin and the voltage signal of the OV pin, and output the second power state indication signal to the power abnormality detection module through a fourteenth pin of the second power isolation chip; when the voltages detected by the UV pin and the OV pin are both in a preset range, the second power state indicating signal indicates that the value of the output voltage of the second power supply is in the preset voltage range; or when the voltages detected by the UV pin and the OV pin are not in a preset range, the second power state indicating signal indicates that the value of the output voltage of the second power module is not in the preset voltage range;
a second switch group, wherein the second switch group includes a third MOS transistor and a fourth MOS transistor whose source electrodes are connected, a drain electrode of the third MOS transistor is connected to an eleventh pin of the second power isolation chip, a drain electrode of the fourth MOS transistor is connected to a tenth pin of the second power isolation chip and is connected to the hard disk backplane, base electrodes of the third MOS transistor and the fourth MOS transistor are connected to an eighth pin of the second power isolation chip, when a difference between a voltage of the eleventh pin and a voltage of the tenth pin is greater than or equal to a threshold value, the eighth pin drives the second switch group to be turned on, and when the difference between the voltage of the eleventh pin and the voltage of the tenth pin is less than the threshold value, the eighth pin drives the second switch group to be turned off;
a third capacitor branch, connecting a thirteenth pin of the second power isolation chip with the first pin, and supplying voltage to a driving circuit connected with the eighth pin inside the second power isolation chip through charging and discharging of the third capacitor branch;
the fourth capacitor branch connects the twelfth pin of the second power isolation chip with the eleventh pin, and filters noise on an external power supply connected to the eleventh pin, so that an internal circuit of the second power isolation chip cannot be triggered by mistake;
the input end of the seventh switch group is respectively connected with the output voltage of the first power supply module and the output voltage of the second power supply module, and the output end of the seventh switch group is connected with the second filter circuit, so that the output voltage of the first power supply module or the output voltage of the second power supply module is output to the first power supply pin of the second power supply isolation chip through the second filter circuit;
an eighth switch group, an input end of which is connected to a standby power supply voltage of the first power supply module and a standby power supply voltage of the second power supply module, respectively, and an output end of which is connected to a seventh resistive branch, so that the standby power supply voltage of the first power supply module or the standby power supply voltage of the second power supply module is connected to a fourth pin of the second power supply isolation chip through an eleventh resistive branch, and an output level of the fourth pin is the same as a level of the standby power supply voltage of the first power supply module or the standby power supply voltage of the second power supply module;
the output end of the eighth switch group is connected with the twelfth resistance branch circuit, so that the standby power supply voltage of the first power supply module or the standby power supply voltage of the second power supply module is connected with the fourteenth pin of the second power supply isolation chip through the twelfth resistance branch circuit, and the output level of the second power supply state indicating signal is the same as the level of the standby power supply voltage of the first power supply module or the standby power supply voltage of the second power supply module;
the second grounding branch is connected with the seventh pin and the ninth pin of the second power isolation chip and the ground;
wherein the seventh pin is a Ground (GND) pin;
the thirteenth resistance branch is connected with the drain electrode of the second MOS tube and the ground, and plays a role in limiting current and providing a current discharging path when the first switch group is disconnected;
the fifth capacitor branch is connected with the drain electrode of the second MOS tube and the ground, and plays a role in filtering;
the fourteenth resistance branch circuit is connected with the drain electrode of the fourth MOS tube and the ground, and plays a role in limiting current and providing a current discharge path when the second switch group is disconnected;
and the sixth capacitor branch is connected with the drain electrode of the fourth MOS tube and the ground, and plays a role in filtering.
In this embodiment, the first power module outputs +12V and +5V at the same time, the +12V output by the first power module is the first power module output voltage, and the +5V output by the first power module is the standby power voltage of the first power module; the second power module outputs +12V voltage and +5V voltage at the same time, the +12V voltage output by the second power module is the output voltage of the second power module, and the +5V voltage output by the second power module is the standby power voltage of the second power module. The standby power supply voltage of the first power supply module or the standby power supply voltage of the second power supply module is connected with an open collector gate connected with the fourteenth pin in the power isolation chip through a tenth resistance branch and a twelfth resistance branch, so that the level of a power state indicating signal output by the power isolation chip module is the same as the level of the standby power supply voltage of the first power supply module or the standby power supply voltage of the second power supply module; and the standby power supply voltage of the first power supply module or the standby power supply voltage of the second power supply module also supplies power to the AND gate.
In this embodiment, the set voltage value may be 0.6V.
For example, the following steps are carried out: fig. 3 is an optional implementation circuit of the power isolation chip module, and the first power isolation chip is exemplified by TPS2410PWR, which is not limited by the present invention. The output voltage of the power module 1 is marked as +12V _1 voltage, the output voltage of the power module 2 is marked as +12V _2 voltage, +12V _1 voltage and +12V _2 voltage or the power is supplied to the TPS2410PWR through the VDD pin, the VDD pin is the first pin described in the first embodiment, the utility model discloses in realize phase or function through a combination diode D11, D11 is the fifth switch group described in the first embodiment, but the utility model discloses do not limit it. The power state indicating signal is determined by OV and UV signals, the internal comparison point of OV and UV is 0.6V, R13 and R15 determine the voltage division coefficient of UV, wherein, the resistance branch composed of the resistors R13 and R15 is the first resistance branch described in the first embodiment, the resistors R12 and R14 determine the voltage dividing coefficient of OV, the resistor branch formed by the resistors R12 and R14 is the second resistor branch described in the first embodiment, for example, when R12 ═ 10K Ω, R14 ═ 470 Ω, R13 ═ 10K Ω, R14 ═ 510 Ω, uov-0.6/0.47 (10+0.47) -13.4V, Uuv-0.6/0.68 (10+0.68) -10.3V, wherein Uov is OV point voltage, Uuv is UV point voltage, the preset voltage range of the power supply module is 10.3V-13.4V, when the output voltage of the power module is greater than 13.4V or less than 10.3V, the PG signal will be pulled low, indicating that the power supply is abnormal.
M11 and M12 are MOS transistors with connected sources, a switch group formed by M11 and M12 is the first switch group described in the first embodiment, a drain of M12 is connected to pin a of the first power isolation chip U2, the pin a is the eleventh pin described in the first embodiment, a source of M11 is connected to pin C of the first power isolation chip U2, the pin C is the tenth pin described in the first embodiment, gates of M11 and M12 are connected to a Gate pin of the TPS2410PWR, the Gate pin is the eighth pin described in the first embodiment, when UA-UC-U-b, the Gate of the first power isolation chip U2410 PWR is connected to the Gate pin of the TPS2410PWR>10mV, and UA satisfies the chip and presets the voltage range, power isolation chip Gate pin drive MOS nest of tubes M11 and M12 open to control power module 1 and supply power for the hard disk of half slot number on the hard disk backplate, the voltage of inputing to the hard disk backplate at this moment marks as +12V _ A, wherein, UA is A point voltage, UC is C point voltage. If the power supply module is pulled out or under-voltage, UA-UC>If the condition of 10mV can not be met, the MOS tube sets M11 and M12 are disconnected, and the current is prevented from flowing backwards; wherein, a resistor R16 is connected in parallel on the output loopThe resistance branch in which the resistor R16 is located is the thirteenth resistance branch described in the first embodiment, if UA>UOVThen the MOS transistor group is forced to be disconnected, and at this time, R16 has the functions of current limiting and current discharging path providing, and preventing the power chip from being damaged.
A capacitor C10 provides a power supply voltage for the TPS2410PWR through charging and discharging, where a capacitor branch in which the capacitor C10 is located is the first capacitor branch described in the first embodiment; the capacitor C11 filters noise on an external power source connected to the pin a of the TPS2410PWR, so that the internal circuit of the TPS2410PWR is not triggered by error, and the capacitor branch in which the capacitor C11 is located is the second capacitor branch described in the first embodiment; the branch formed by the capacitors C12, C14, C15, and C16 is the fifth capacitor branch described in the first embodiment, and the fifth capacitor branch connects the drain of the M11 and the ground, so as to perform a filtering function.
The standby power supply voltage of the power module 1 is marked as +5V _ STB _1, the standby power supply voltage of the power module 2 is marked as +5V _ STB _2, +5V _ STB _1 and +5V _ STB _2 are connected to a PG pin of a TPS2410PWR through a resistor R10 after being phase-changed or phase-changed by a composite diode D112, so that a PG signal output by the TPS2410PWR is the same as the standby power supply voltage of the power module 1 +5V _ STB _1 or the standby power supply voltage of the power module 2 +5V _ STB _ 2; the output level of the FLTB pin is connected to an FLTB pin of a TPS2410PWR through a resistor R9, so that the output level of the FLTB pin is the same as the standby power supply voltage +5V _ STB _1 of the power module 1 or the standby power supply voltage +5V _ STB _2 of the power module 2; wherein D112 is the sixth switch set described in the first embodiment, the resistance branch in which the resistor R9 is located is the ninth resistance branch described in the first embodiment, the resistance branch in which the resistor R10 is located is the tenth resistance branch described in the first embodiment, and the PG pin is the fourteenth pin described in the first embodiment; the FLTB pin is the fourth pin described in the first embodiment.
The RSVD pin of the TPS2410PWR and the GND pin are connected to ground through a ground branch, where the ground branch is the first ground branch described in the first embodiment, the RSVD pin is the ninth pin described in the first embodiment, and the GND pin is the seventh pin described in the first embodiment.
The chip is kept apart to the second power with chip structure is the same is kept apart to first power, the embodiment of the utility model provides an in do not describe.
The utility model discloses in, it is optional, power anomaly detection module includes:
and the AND gate is used for carrying out logic operation on the power state indicating signal corresponding to each power module input to the AND gate to obtain the power supply indicating signal and transmitting the power supply indicating signal to the signal level conversion module through a fifth resistance branch.
In the following, a detailed description is given of the implementation of the power supply abnormality detection module in the shunt control circuit according to an embodiment of the present invention, taking two power supply modules as an example.
In a second embodiment, a power supply abnormality detection module in the shunt control circuit in this embodiment includes:
the AND gate is used for carrying out logical operation on the first power state indicating signal and the second power state indicating signal which are input to the AND gate to obtain the power supply indicating signal and transmitting the power supply indicating signal to the signal level conversion module through a fifth resistance branch;
the input end of the ninth switch group is respectively connected with the standby power supply voltage of the first power supply module and the standby power supply voltage of the second power supply module, and the output end of the ninth switch group is connected to the first pin of the AND gate to supply power to the AND gate;
and the thirteenth resistance branch is used for connecting the output of the AND gate, outputting the power supply indicating signal output by the AND gate to the first node, and playing a role in limiting current.
The utility model discloses in, it is optional, signal level conversion module includes:
a base electrode of the first triode is connected with the output end of the power supply abnormality detection module through a sixth resistor branch, and a collector electrode of the first triode is connected with a second node and is used for reversing the polarity of the power supply indication signal output by the power supply abnormality detection module;
the input end of the third switch group is respectively connected with the output end of each power supply module, the output voltage of one power supply module of the at least two power supply modules is selected to be output to the collector of the second triode through a seventh resistor branch circuit, and the level of the output signal of the collector of the second triode is equal to the level of the output voltage of any selected power supply module;
and the base electrode of the second triode is connected with the second node through an eighth resistor branch, the polarity of the signal output by the second node is converted, and a level signal which can be received by the power supply shunting and combining control module is output.
In the following, a detailed description is given of the implementation of the signal level conversion module in the shunt control circuit according to an embodiment of the present invention, taking two power modules as an example.
In a third embodiment, a signal level conversion module in the shunt control circuit in this embodiment includes:
the fourteenth resistor branch is used for connecting the first node and the base electrode of the first triode and playing a role in limiting current;
the fifteenth resistance branch is used for connecting the output end of the ninth switch group with the collector of the first triode to play a role in limiting current;
the seventh capacitor branch is used for connecting the first node and the ground and playing a role in filtering;
a base electrode of the first triode is connected with the output end of the power supply abnormality detection module through a sixth resistor branch, and a collector electrode of the first triode is connected with a second node and is used for reversing the polarity of the power supply indication signal output by the power supply abnormality detection module;
the sixteenth resistor branch circuit is used for connecting the second node and the base electrode of the second triode and plays a role in limiting current;
the input end of the third switch group is respectively connected with the output end of the first power supply module and the output end of the second power supply module, the first power supply module or the second power supply module is selected, the output voltage of the selected first power supply module or the output voltage of the second power supply module is output to the collector electrode of the second triode through a seventh resistor branch, and the level of the output signal of the collector electrode of the second triode is equal to the level of the output voltage of the selected first power supply module or the output voltage of the second power supply module;
the seventh resistance branch is used for connecting the output end of the third switch group with the collector of the second triode to play a role in limiting current;
and the base electrode of the second triode is connected with the second node through an eighth resistor branch, the polarity of the signal output by the second node is converted, and a level signal which can be received by the power supply shunting and combining control module is output.
The utility model discloses in, it is optional, the power isolation chip module still includes: the first switch group comprises a first metal oxide semiconductor field effect transistor (MOS) and a second MOS, wherein two source electrodes of the first MOS are connected with each other, a drain electrode of the first MOS is connected to an eleventh pin of the first power isolation chip, a drain electrode of the second MOS is respectively connected with a tenth pin of the first power isolation chip and the hard disk backboard, base electrodes of the first MOS and the second MOS are connected to an eighth pin of the first power isolation chip, when a difference value between the voltage of the eleventh pin and the voltage of the tenth pin is larger than or equal to a threshold value, the eighth pin drives the first switch group to be switched on, and when the difference value between the voltage of the eleventh pin and the voltage of the tenth pin is smaller than the threshold value, the first switch group is switched off;
wherein the threshold is associated with the power isolation chip, and different power isolation chips have different thresholds.
The power supply shunting and combining control module comprises: the fourth switch group at least comprises a fifth MOS tube and a sixth MOS tube, the fifth MOS tube and the sixth MOS tube are connected with the drain electrodes of the fifth MOS tube and the sixth MOS tube, the output end of the signal level conversion module is connected with the output end of the signal level conversion module, the source electrode of the fifth MOS tube is connected with the hard disk backboard through a first branch circuit, the source electrode of the sixth MOS tube is connected with the hard disk backboard through a second branch circuit, and when the first switch group is switched on and the fourth switch group is switched off, each power module of the at least two power modules is controlled to supply power to the hard disk group electrically connected with the power module; when the first switch set is switched off and the fourth switch set is switched on, the power supply module which normally works is controlled to supply power to the hard disk set which is electrically connected with the at least one power supply module which works abnormally.
In the following, a detailed description is given to the implementation of the power shunting and combining control module in the shunting control circuit according to the embodiment of the present invention by taking two power modules as an example.
In a fourth embodiment, a power shunting and combining control module in the shunt control circuit in this embodiment includes:
the seventeenth resistor branch is used for connecting the collector of the second triode with the grid of the fourth switch group and playing a role in limiting current;
a fourth switch group, for example, a fifth MOS transistor, a sixth MOS transistor, a seventh MOS transistor, and an eighth MOS transistor with four drains connected, where the fifth MOS transistor, the sixth MOS transistor, the seventh MOS transistor, and the eighth MOS transistor are connected to an output end of the signal level conversion module, a source of the fifth MOS transistor and a source of the seventh MOS transistor are connected to the hard disk backplane through a first branch, and a source of the sixth MOS transistor and a source of the eighth MOS transistor are connected to the hard disk backplane through a first branch, and when the first switch group is turned on, the second switch group is turned off, and the fourth switch group is turned on, the first power module supplies power to a first part of hard disks of the hard disk backplane and a second part of hard disks of the hard disk backplane; when the first switch group is switched on, the second switch group is switched on and the fourth switch group is switched off, the first power supply module supplies power to a first part of hard disks of the hard disk backboard, and the second power supply module supplies power to a second part of hard disks of the hard disk backboard; when the first switch group is disconnected, the second switch group is connected and the fourth switch group is connected, the second power supply module supplies power to the first part of hard disks of the hard disk backboard and the second part of hard disks of the hard disk backboard.
For example, the following steps are carried out: fig. 4 is an alternative implementation circuit of the power abnormality detection module, the signal level conversion module, and the power shunting and combining control module; wherein the +12V _1_ PG signal outputted from the first power isolation chip and the +12V _2_ PG signal outputted from the second power isolation chip are connected to the input terminal of the and gate U1, the +5V _ STB _1 and the +5V _ STB _2 supply power to the and gate through the common cathode diode module D1, the D1 is the ninth switch set described in the second embodiment, when both power modules are working normally, the PG signal outputted from the first power isolation chip and the PG signal outputted from the second power isolation chip are both high, the and gate U1 outputs high level, the base of Q1 is high, the Q1 is the first triode described in the second embodiment, the Q1 emitter junction is conductive, the collector of Q1 is pulled low, so that the base of Q2 is low, the Q2 is the second triode described in the second embodiment, the Q2 emitter junction is non-conductive, the collector of Q2 is connected to the common cathode terminal of the common cathode diode module D2 through the resistor R8, the D2 is the third switch group described in the second embodiment, the anode of the D2 is connected to +12V _1 and +12V _2, respectively, at this time, the collector of the Q2 is high, the drains of the P-channel MOS transistors (PMOS) M1, M2, M3 and M4 connected to the Q2 are 12V, the voltage between the gate and the source of the switch group formed by the M1, M2, M3 and M4, that is, the fourth switch group described in the second embodiment, is less than the turn-on voltage, and 4 MOS transistors are not conductive, so that when both power modules are normally operated, the two power sources are independently operated, and the +12V _ a and +12V _ B are independently used for supplying power to the respective loads.
When one of the power modules fails or is unplugged, the MOS transistor corresponding to the power supply is disconnected, the corresponding PG signal is pulled low, so that the and gate U1 outputs a low level, the base of Q1 is a low level, the emitter junction of Q1 is not conducted, at this time, the collector of Q1 is a high level, the base of Q2 is a high level, the emitter junction of Q2 is conducted, the collector of Q2 is a low level, at this time, the power module corresponding to +12V _ a fails, the power module corresponding to +12V _ B normally works, the voltage between the gates and the sources of PMOS M2 and M4 is greater than the turn-on voltage, M2 and M4 are conducted, the drain thereof is 12V, because body diodes exist inside M1 and M3, the source voltages of M1 and M3 are also close to 12V, the voltage between the gates and the sources is also greater than the turn-on voltage, M1 and M3 are completely conducted, at this time, the power module corresponding to +12V _ B is all the hard disk backplane, and if the power module corresponding to the +12V _ B fails, the same process is carried out. The M1 and M2 are connected with the M3 and M4 in parallel to improve the maximum current load value, and one pair of P MOS or a plurality of pairs of P MOS are selected to be connected in parallel to be calculated according to the actual maximum current value of the load.
The capacitor C2 is connected to the first node and ground, and plays a role of filtering, the capacitor branch in which the capacitor C2 is located is the seventh capacitor branch described in the second embodiment, and the first node is an intersection point of the branch in which the resistor R3 is located, the branch in which the resistor R4 is located, and the branch in which the capacitor C2 is located; the branch in which the resistor R3 is located, i.e., the thirteenth resistor branch described in embodiment two, connects the output of U1 with the first node, and plays a role of limiting current; the branch in which the resistor R4 is located, i.e., the fourteenth resistor branch described in the second embodiment, connects the first node and the base of the Q1, and plays a role in limiting current.
The branch in which the resistor R6 is located is the fifteenth resistor branch described in the second embodiment, and the output end of the switch group D1 is connected to the collector of the Q1, so as to perform the function of current limiting; the branch in which the resistor R7 is located is the sixteenth resistor branch described in the second embodiment, and the sixteenth resistor branch is connected to the second node and the base of the Q2, and plays a role of limiting current, where the second node is an intersection point of the branch in which the resistor R6 is located, the branch in which the resistor R7 is located, and the collector of the Q1; the branch in which the resistor R8 is located is the seventh resistor branch described in the second embodiment, and the output end of the switch group D1 is connected to the collector of the Q2, so as to perform the function of current limiting; the branch in which the resistor R9 is located is the seventeenth resistor branch described in the second embodiment, and the collector of the Q2 is connected to the gates of M1, M2, M3, and M4, so as to perform a current limiting function.
It should be noted that the embodiment of the present invention is also applicable to a plurality of scenes of a power module, and takes three power modules as an example, and the situation of more than three power modules is similar to this, and here is not illustrated one by one. The three power modules are respectively marked as a power module 1, a power module 2 and a power module 3, correspondingly, the power isolation chip module comprises three power isolation chips, the circuit connection of each power isolation chip is similar to that in fig. 3, and is not repeated here, the output of the three power isolation chips is connected to a power abnormality detection module, whether each power module works normally is judged by the power abnormality detection module, and outputs a power supply indicating signal to the signal level conversion module, the signal level conversion module converts the power supply indicating signal output by the power supply abnormality detection module into a level signal which can be received by the power supply shunting and combining control module, and the power supply shunting and combining control module controls the three power supply modules to supply power to different hard disk groups according to the level signal output by the signal level conversion module.
For example, assuming that the hard disks on the hard disk backplane are divided into three hard disk groups, under a normal operation condition of the power module, the power module 1 supplies power to the first hard disk group, the power module 2 supplies power to the second hard disk group, and the power module 3 supplies power to the third hard disk group, when the power module 1 operates abnormally and cannot supply power to the first hard disk group, the power splitting and combining control module controls the power module 2 or the power module 3 to supply power to the first hard disk group. Wherein, when selecting the power module for the power supply of first hard disk group, power reposition of redundant personnel and close way control module can select power module 2 to supply power for first hard disk group according to the order of power module's sequence number from little to big, also can select power module 3 to supply power for first hard disk group according to the order of power module's sequence number from big to little, also can select power module 2 and the little power module of power module 3 medium load to supply power for first hard disk group, the embodiment of the utility model provides a do not limit to it. For another example, if the power module 1 and the power module 2 work abnormally, the power splitting and combining control module controls the power module 3 to supply power to the first hard disk set and the second hard disk set.
While the preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the appended claims be interpreted as including the preferred embodiment and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (7)
1. A power supply circuit of a multi-disk hard disk is characterized by comprising: at least two power supply modules and a shunt control circuit; wherein,
each power supply module is respectively and electrically connected with different hard disk groups through the shunt control circuit, each hard disk group comprises at least one hard disk, and different hard disk groups comprise different hard disks;
when the shunt control circuit determines that each power supply module works normally, the shunt control circuit controls the power supply module to supply power to the electrically connected hard disk group; and when determining that any power supply module works abnormally, controlling any power supply module which works normally, and supplying power to the hard disk group electrically connected with any power supply module which works abnormally.
2. The circuit of claim 1, wherein the shunt control circuit comprises: the power supply isolation chip module, the power supply abnormity detection module, the signal level conversion module and the power supply shunting and combining control module;
the power isolation chip module is used for respectively generating power state indicating signals according to the output voltage of each power module and outputting the power state indicating signals corresponding to each power module to the power abnormity detection module, wherein the power state indicating signals are used for indicating whether the value of the output voltage of the corresponding power module is within a preset voltage range;
the power supply abnormity detection module is used for respectively judging whether each power supply module works normally according to the power supply state indication signal output by the power supply isolation chip module and outputting a power supply indication signal to the signal level conversion module; the power supply indicating signal is used for indicating whether a power supply module in the at least two power supply modules works abnormally or not;
the signal level conversion module is used for converting the power supply indication signal output by the power supply abnormality detection module into a level signal which can be received by the power supply shunting and combining control module and outputting the level signal to the power supply shunting and combining control module;
the power supply shunting and combining control module is used for determining that each power supply module is normally operated according to the level signal output by the signal level conversion module and controlling the power supply module to supply power to the electrically connected hard disk group; and when determining that any power supply module works abnormally, controlling any power supply module which works normally, and supplying power to the hard disk group electrically connected with any power supply module which works abnormally.
3. The circuit of claim 2, wherein the power isolation chip module comprises:
the first resistance branch is used for connecting the output end of any power supply module, dividing the output voltage of any power supply module, and connecting the divided voltage signal to a sixth pin of the power supply isolation chip;
the second resistance branch is used for connecting the output end of any power supply module, dividing the output voltage of any power supply module, and connecting the divided voltage signal to a fifth pin of the power supply isolation chip;
the power isolation chip is configured to generate a power state indication signal corresponding to any one of the power modules according to the voltage signal of the sixth pin and the voltage signal of the fifth pin, and output the power state indication signal corresponding to any one of the power modules to the power abnormality detection module through a fourteenth pin of the power isolation chip.
4. The circuit of claim 2, wherein the power anomaly detection module comprises:
and the AND gate is used for carrying out logic operation on the power state indicating signal corresponding to each power module input to the AND gate to obtain the power supply indicating signal and transmitting the power supply indicating signal to the signal level conversion module through a fifth resistance branch.
5. The circuit of claim 2, wherein the signal level translation module comprises:
a base electrode of the first triode is connected with the output end of the power supply abnormality detection module through a sixth resistor branch, and a collector electrode of the first triode is connected with a second node and is used for reversing the polarity of the power supply indication signal output by the power supply abnormality detection module;
the input end of the third switch group is respectively connected with the output end of each power supply module, the output voltage of one power supply module of the at least two power supply modules is selected to be output to the collector of the second triode through a seventh resistor branch circuit, and the level of the output signal of the collector of the second triode is equal to the level of the output voltage of any selected power supply module;
and the base electrode of the second triode is connected with the second node through an eighth resistor branch, the polarity of the signal output by the second node is converted, and a level signal which can be received by the power supply shunting and combining control module is output.
6. The circuit of claim 3, wherein the power isolation chip module further comprises: a first switch group, where the first switch group includes a first MOS transistor and a second MOS transistor whose source electrodes are connected, a drain electrode of the first MOS transistor is connected to an eleventh pin of the first power isolation chip, a drain electrode of the second MOS transistor is connected to a tenth pin of the first power isolation chip and the hard disk group, respectively, base electrodes of the first MOS transistor and the second MOS transistor are connected to an eighth pin of the first power isolation chip, when a difference between a voltage of the eleventh pin and a voltage of the tenth pin is greater than or equal to a threshold value, the eighth pin drives the first switch group to be turned on, and when the difference between the voltage of the tenth pin and the voltage of the eleventh pin is less than the threshold value, the first switch group is turned off;
the power supply shunting and combining control module comprises: the fourth switch group at least comprises a fifth MOS tube and a sixth MOS tube, the fifth MOS tube and the sixth MOS tube are connected with the drain electrodes of the fifth MOS tube and the sixth MOS tube, the output end of the signal level conversion module is connected with the output end of the signal level conversion module, the source electrode of the fifth MOS tube is connected with the hard disk group through a first branch circuit, the source electrode of the sixth MOS tube is connected with the hard disk group through a second branch circuit, and when the first switch group is switched on and the fourth switch group is switched off, each power module of the at least two power modules is controlled to supply power to the hard disk group electrically connected with the power module; when the first switch set is switched off and the fourth switch set is switched on, the power supply module which normally works is controlled to supply power to the hard disk set which is electrically connected with the at least one power supply module which works abnormally.
7. The circuit of any one of claims 1 to 6, wherein the hard disks in each hard disk group are inserted into a hard disk backplane by means of electrical connection, and the shunt control circuit is electrically connected with the hard disk backplane.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201620194666.XU CN205644429U (en) | 2016-03-14 | 2016-03-14 | Supply circuit of polydisc position hard disk |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112000210A (en) * | 2020-07-29 | 2020-11-27 | 北京浪潮数据技术有限公司 | Backplate power plane system |
| WO2023045248A1 (en) * | 2021-09-22 | 2023-03-30 | 苏州浪潮智能科技有限公司 | Detection apparatus for power supply voltage of hard disk |
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2016
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112000210A (en) * | 2020-07-29 | 2020-11-27 | 北京浪潮数据技术有限公司 | Backplate power plane system |
| CN112000210B (en) * | 2020-07-29 | 2022-06-17 | 北京浪潮数据技术有限公司 | Backplate power plane system |
| WO2023045248A1 (en) * | 2021-09-22 | 2023-03-30 | 苏州浪潮智能科技有限公司 | Detection apparatus for power supply voltage of hard disk |
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