CN205281344U - Test panel card is transferred to server - Google Patents

Test panel card is transferred to server Download PDF

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Publication number
CN205281344U
CN205281344U CN201521125383.1U CN201521125383U CN205281344U CN 205281344 U CN205281344 U CN 205281344U CN 201521125383 U CN201521125383 U CN 201521125383U CN 205281344 U CN205281344 U CN 205281344U
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CN
China
Prior art keywords
interface
psoc
server
cpld
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201521125383.1U
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Chinese (zh)
Inventor
郭月俊
薛广营
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shandong Mass Institute Of Information Technology
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Shandong Mass Institute Of Information Technology
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Priority to CN201521125383.1U priority Critical patent/CN205281344U/en
Application granted granted Critical
Publication of CN205281344U publication Critical patent/CN205281344U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model discloses a test panel card is transferred to server relates to server spare part, is provided with high -density connector, VR interface, JTAG interface and PSoC interface on it, the high -density connector respectively with VR interface, JTAG interface and PSoC interface connection communication, be applicable to CPLD on the connection service ware mainboard, PSoC and VR chip, VR interface, JTAG interface and PSoC interface are respectively through VR chip, CPLD and PSoC interactive communication on high -density connector and the server mainboard, simultaneously VR interface, JTAG interface and PSoC interface are applicable to connection VR respectively and burn record ware, CPLD fever record ware and PSoC fever record ware. The utility model discloses can accomplish and burn record and debugging to the CPLD on the server mainboard, PSoC and VR chip procedure under the condition of not plug server node, saved the mainboard space, simplified the operation process of debugging.

Description

A kind of server debugging board
Technical field
This utility model relates to server parts, specifically a kind of server debugging board.
Background technology
CPLD (ComplexProgrammableLogicDevice) CPLD, it is from PAL and GAL device development device out, the big structure of scale is complicated, and user can according to each needing and the large-scale digital ic of constitutive logic function voluntarily. Warm connection function do not supported by burning CPLD firmware, need before system electrification, plug cd-rom recorder, and after firmware burning completes, system cut-off just can be pulled out cd-rom recorder, otherwise CPLD circuit can be caused potential impact, such as cause JTAG(JointTestActionGroup, joint test working group) false triggering etc. of signal.
PSoC:(ProgrammableSystem-On-Chip, programmable system on sheet) at a proprietary MCU(MicroprogrammedControlUnit) it is integrated with configurable analog-and digital-peripheral components array PSoC block around kernel, utilize the interconnected array able to programme of chip internal, effectively analog-and digital-piece of resource on configuration chip. VR chip is debugged or burning, it is generally required to adopt the cd-rom recorder that VR manufacturer provides, by I2C scan bus VR chip address on mainboard, scanning one by one for some VR chips, FW information is burnt in VR chip by the I2C interface then passed through on cd-rom recorder.
CPLD, PSoC and VR chip etc. on existing server master board is adopted to carry out debugging or the method for burning, need individually each device of CPLD, PSoC and VR chip to be connected corresponding cd-rom recorder, then carry out respectively again debugging or burning, complex operation step, expend time in manpower, seriously hinders work efficiency.
Summary of the invention
The weak point that this utility model develops for current needs and prior art, it is provided that provide the outer debugging board card of a kind of server board.
A kind of server debugging board described in the utility model, the technical scheme solving the employing of above-mentioned technical problem is as follows: described server debugging board is a PCB, is provided with high-density connector, VR interface, jtag interface and PSoC interface; Wherein, described high-density connector is connected communication with VR interface, jtag interface and PSoC interface respectively; Described high-density connector is applicable to CPLD, PSoC and VR chip on Connection Service device mainboard, and described VR interface, jtag interface and PSoC interface are respectively through high-density connector and VR chip, CPLD and PSoC interactive communication on server master board; Described VR interface, jtag interface and PSoC interface are respectively suitable for connecting VR cd-rom recorder, CPLD cd-rom recorder and PSoC cd-rom recorder simultaneously.
Preferably, the interface of CPLD, PSoC and VR chip unified output after integrating on described server master board, the high-density connector debugging board with described server is connected communication.
Preferably, the CPLD on described server master board is connected by the JTAG high-density connector debugging board with server.
Preferably, the VR chip on described server master board is connected by the I2C high-density connector debugging board with server.
Preferably, the PSoC on described server master board is connected by the SWD high-density connector debugging board with server.
A kind of server debugging board described in the utility model compared with prior art has the beneficial effect that employing this utility model, server master board is unified output after being integrated by the interfaces such as CPLD, PSoC and VR chip, carry out splitting switching again through this server debugging board card, can when not pluggable server node, complete CPLD, PSoC and the VR chip etc. on server master board is carried out burning program and debugging, meet the needs to board debugging, save motherboard space, simplify the operating process of debugging.
Accompanying drawing explanation
Accompanying drawing 1 is the schematic block diagram of described server debugging board.
Detailed description of the invention
For making the purpose of this utility model, technical scheme and advantage clearly understand, below in conjunction with specific embodiment, and with reference to accompanying drawing, a kind of server debugging board card described in the utility model is further described.
A kind of server debugging board that the utility model proposes, is one piece of PCB, it is possible to for CPLD, PSoC and the VR chip etc. on server master board is carried out burning program and debugging. Adopt this server debugging board, server master board is unified output after being integrated by the interfaces such as CPLD, PSOC and VR chip, carry out splitting switching again through this server debugging board card, well CPLD, PSoC and VR chip on server master board etc. can be carried out burning program and debugging, save motherboard space simultaneously, and simplify operation.
Embodiment:
A kind of server debugging board described in the present embodiment, as shown in Figure 1, described server debugging board is a PCB to its overall structure, and this PCB is provided with high-density connector, VR interface, jtag interface and PSoC interface; Wherein said high-density connector is connected communication with VR interface, jtag interface and PSoC interface respectively; And CPLD, PSoC and VR chip on described high-density connector Connection Service device mainboard, described VR interface, jtag interface and PSoC interface are respectively through high-density connector and VR chip, CPLD and PSoC interactive communication on server master board; Described VR interface, jtag interface and PSoC interface are respectively suitable for connecting VR cd-rom recorder, CPLD cd-rom recorder and PSoC cd-rom recorder simultaneously. Realize debugging board by this server, CPLD, PSoC and the VR chip etc. on server master board is carried out burning program and debugging.
Server debugging board described in the present embodiment, the interface of CPLD, PSoC and VR chip unified output after integrating on described server master board, the high-density connector debugging board with described server is connected communication. Connect design by above-mentioned interface, three kinds of cables are connected and is reduced to a kind of cable, it is to avoid the too much complex operation of interface, error-prone trouble, it is ensured that server master board is correctly connected with this server debugging board so that debug board easy to use.
Server debugging board described in the present embodiment, as shown in Figure 1, the CPLD on described server master board is provided with jtag interface, is connected by the JTAG high-density connector debugging board with server. VR chip on described server master board is provided with I2C interface, is connected by the I2C high-density connector debugging board with server. PSoC on described server master board is provided with SWD interface, is connected by the SWD high-density connector debugging board with server.
Above-mentioned detailed description of the invention is only concrete case of the present utility model; scope of patent protection of the present utility model includes but not limited to above-mentioned detailed description of the invention; any that meet claims of the present utility model and any person of an ordinary skill in the technical field is to its suitably change done or replaces, and all should fall into scope of patent protection of the present utility model.

Claims (5)

1. a server debugging board, it is characterised in that described server debugging board is a PCB, is provided with high-density connector, VR interface, jtag interface and PSoC interface; Wherein, described high-density connector is connected communication with VR interface, jtag interface and PSoC interface respectively; Described high-density connector is applicable to CPLD, PSoC and VR chip on Connection Service device mainboard, and described VR interface, jtag interface and PSoC interface are respectively through high-density connector and VR chip, CPLD and PSoC interactive communication on server master board; Described VR interface, jtag interface and PSoC interface are respectively suitable for connecting VR cd-rom recorder, CPLD cd-rom recorder and PSoC cd-rom recorder simultaneously.
2. a kind of server debugs board according to claim 1, it is characterised in that the interface of CPLD, PSoC and VR chip unified output after integrating on described server master board, the high-density connector debugging board with described server is connected communication.
3. a kind of server debugs board according to claim 2, it is characterised in that the CPLD on described server master board is connected with described high-density connector by JTAG.
4. a kind of server debugs board according to claim 2, it is characterised in that the VR chip on described server master board is connected with described high-density connector by I2C.
5. a kind of server debugs board according to claim 2, it is characterised in that the PSoC on described server master board is connected with described high-density connector by SWD.
CN201521125383.1U 2015-12-31 2015-12-31 Test panel card is transferred to server Expired - Fee Related CN205281344U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201521125383.1U CN205281344U (en) 2015-12-31 2015-12-31 Test panel card is transferred to server

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201521125383.1U CN205281344U (en) 2015-12-31 2015-12-31 Test panel card is transferred to server

Publications (1)

Publication Number Publication Date
CN205281344U true CN205281344U (en) 2016-06-01

Family

ID=56065902

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201521125383.1U Expired - Fee Related CN205281344U (en) 2015-12-31 2015-12-31 Test panel card is transferred to server

Country Status (1)

Country Link
CN (1) CN205281344U (en)

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20160601

Termination date: 20181231

CF01 Termination of patent right due to non-payment of annual fee