CN205068366U - Circuit of exempting from wire jumper is downloaded to program run and JTAG procedure - Google Patents
Circuit of exempting from wire jumper is downloaded to program run and JTAG procedure Download PDFInfo
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- CN205068366U CN205068366U CN201520865141.XU CN201520865141U CN205068366U CN 205068366 U CN205068366 U CN 205068366U CN 201520865141 U CN201520865141 U CN 201520865141U CN 205068366 U CN205068366 U CN 205068366U
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- jtag
- signal
- cpu
- reset
- reset signal
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Abstract
The utility model provides a program run and JTAG procedure are downloaded and are exempted from the wire jumper circuit, burning including CPU, watchdog chip, JTAG and writing the ware, dog signal to watchdog chip is fed in CPU output, the watchdog reset signal RESET_WD and the JTAG of the output of watchdog chip burn the signal battery SWD_3.3V that writes the ware through " or " export the first signal RSTM after logical, the first signal RSTM burn with JTAG the JTAG reset signal SWD_RST that writes ware output through " with " the second signal RESET_CPU of logic back output, this signal is inputed to CPU as CPU reset signal, the JTAG fever write ware number of pass certificate, clock and reset signal and CPU mutual. The utility model has the advantages of avoid using circuit switching devices such as change over switch and dial switch, exempt from the wire jumper, the reliability is high, with low costs, this circuit has been saved download of JTAG procedure and debug time greatly, has been saved the area of PCB board, has been improved production efficiency, has also been increased the product reliability of operation simultaneously.
Description
Technical field
The utility model relates to a kind of wire jumper free circuit, is specifically related to the circuit of the operation of a kind of program and JTAG download program wire jumper free.
Background technology
In the industrial control field of application single-chip microcomputer, for ensureing the reliability service of single-chip computer control system, needing external hardware watchdog circuit in typical application and program is monitored.
Program operation can produce " feeding dog " signal under normal circumstances, system reset can not be caused, but in JTAG fever writes program download process (in initial program downloading process), because can not produce " feeding dog " signal before program burn writing with CPU in programming process, outer watchdog can produce reset signal and cause JTAG fever writes cannot complete the process of download program, and therefore traditional method must complete program burn writing by following steps:
1: first power-off, the reset signal of disconnecting external house dog and cpu reset signal line, be connected to the reset signal of jtag interface by cpu reset signal;
2: power on, carry out program burn writing by JTAG fever writes;
3: power-off, the reset signal recovering outer watchdog is connected with cpu reset signal, the reset signal of cpu reset signal and jtag interface is disconnected;
4: power on, program is run;
So after complete with programming before use JTAG fever writes carries out program burn writing, need to carry out twice switching to the output signal line of house dog.
The commutation circuit of traditional house dog output signal is realized by wire jumper or switch, as shown in Figure 1, S1 is wire jumper or switch, RESET_WD is the reset signal that house dog exports, SWD_RST is the reset signal that JTAG fever writes exports, and RESET_CPU is the reset signal being input to CPU.And in batch production and debug process, can to wire jumper or toggle switch frequent operation, work uninteresting and increase consuming time, increase a wire jumper or toggle switch in circuit simultaneously, be equivalent to a mechanical fault point many, because of switch long-term work contact easily the oxidized circuit that causes virtually connect, affect watchdog circuit and normally work, therefore, to the fusion of JTAG download program and external hardware watch dog monitoring circuit and improvement, there is very high using value.
Summary of the invention
For the problems referred to above, the utility model provides the program that a kind of reliability is high, cost is low to run and JTAG download program wire jumper free circuit.
For solving the problem, the technical scheme that the utility model is taked is: the circuit of program operation and JTAG download program wire jumper free, comprise CPU, watchdog chip, JTAG fever writes, CPU exports feeding-dog signal to watchdog chip, and the power supply signal SWD_3.3V of the watchdog reset signal RESET_WD that watchdog chip exports and JTAG fever writes exports the first signal RSTM after "or" logic; The secondary signal RESET_CPU that the JTAG reset signal SWD_RST that first signal RSTM exports with JTAG fever writes exports after "AND" logic, this signal inputs to CPU as cpu reset signal, JTAG fever writes by data, clock and reset signal and CPU mutual.
The logical expression of above signal is as follows:
RESET_CPU＝(SWD_3.3V||RESET_WD)&&SWD_RST；
In program download process, CPU does not export " feed dog " signal is to outer watchdog chip, " hello dog " operation exception, outer watchdog chip exports watchdog reset signal RESET_WD, this watchdog reset signal RESET_WD can be shielded by the power supply signal SWD_3.3V that JTAG fever writes plug provides, make it lose reset response to CPU after shielding, the JTAG reset signal that JTAG fever writes exports simultaneously still can control reset CPU, completes download program work.
When program burn writing is complete, JTAG fever writes plug pulls out, and after the power supply signal SWD_3.3V that plug provides cancels, the reset signal RESET_WD of outer watchdog recovers reset function, and can reset when " feeding dog " operation exception CPU.
Plug JTAG fever writes plug and can carry out program burn writing, house dog was lost efficacy, and pulling out JTAG fever writes plug program can normally run, and house dog is effective.Without the need to operating wire jumper or switch in whole program burn writing process.
Above-mentioned functions realizing circuit, without the device of wire jumper or switch and so on, in the whole process by JTAG fever writes programming program, does not need plug wire jumper or change-over switch.JTAG fever writes need be configured to active output, or fever writes plug needs to provide external power source, and circuit function passes through the plug of JTAG fever writes plug, along with program burn writing realizes automatically.
This circuit function can be realized by gate circuit, the power supply signal SWD_3.3V of JTAG fever writes is through the 3rd pull down resistor ground connection and jointly access or export behind the door the first signal RSTM with the watchdog reset signal RESET_WD that watchdog chip exports, the JTAG reset signal SWD_RST warp that first signal RSTM exports with JTAG fever writes inputs to CPU with the secondary signal RESET_CPU exported behind the door as cpu reset signal, in addition, JTAG reset signal SWD_RST is through the second pull-up resistor welding system power supply VCC_3.3V, secondary signal RESET_CPU is through the first pull-up resistor welding system power supply VCC_3.3V.
Second pull-up resistor and the 3rd pull down resistor design for intensifier circuit reliability, can ensure JTAG plug pull out after circuit still can reliably working.
This circuit function can be realized by discrete component, and circuit is simple, and cost is low.The power supply signal SWD_3.3V of JTAG fever writes is connected to the anode of diode, and the watchdog reset signal RESET_WD that watchdog chip exports is connected to the negative electrode of diode through the 6th resistance; The negative electrode of diode is connected to the first negative electrode input end of common anode Schottky diode, the JTAG reset signal SWD_RST that JTAG fever writes exports is connected to the second negative electrode input end of common anode Schottky diode, the anode that JTAG reset signal SWD_RST is connected to the common anode Schottky diode of system power supply VCC_3.3V through the 5th pull-up resistor is connected to system power supply VCC_3.3V through the 4th pull-up resistor, and the anode output signal RESET_CPU of anode Schottky diode is as cpu reset signal altogether.
5th pull-up resistor is for Anti-interference Design is set up, if watchdog reset signal RESET_WD wiring path is shorter, the 5th pull-up resistor can omit.
The power supply signal SWD_3.3V of JTAG fever writes is connected to the anode of diode, the watchdog reset signal RESET_WD that watchdog chip exports is connected to the negative electrode of diode through the first resistance, diode cathode output signal RSTM is the equal of the signal that SWD_3.3V and RESET_WD two signal produces after "or" logical relation; Then the JTAG reset signal SWD_RST that RSTM exports with JTAG fever writes is again connected to two negative electrode input ends of common anode Schottky diode, the anode of anode Schottky diode connects pull-up resistor altogether, and the anode output signal RESET_CPU of anode Schottky diode is the equal of the signal that RSTM and SWD_RST produces after "AND" logical relation altogether.
The utility model has avoids using the circuit conversion such as switch and toggle switch device, wire jumper free, reliability is high, cost is low advantage, and this circuit greatly saves JTAG download program and debug time, saves the area of pcb board, improves production efficiency, too increases product reliability of operation simultaneously.
Accompanying drawing explanation
Fig. 1 is the connection diagram of traditional house dog output signal commutation circuit;
Fig. 2 is the utility model circuit function logic diagram;
Fig. 3 is embodiment one circuit connection diagram;
Fig. 4 is embodiment two circuit connection diagram;
Embodiment
Embodiment one
The circuit of program operation and JTAG download program wire jumper free, comprise CPU, watchdog chip, JTAG fever writes, CPU exports feeding-dog signal to watchdog chip, the power supply signal SWD_3.3V of JTAG fever writes is through the 3rd pull down resistor R3 ground connection and jointly access or export behind the door the first signal RSTM with the watchdog reset signal RESET_WD that watchdog chip exports, the JTAG reset signal SWD_RST warp that first signal RSTM exports with JTAG fever writes inputs to CPU with the secondary signal RESET_CPU exported behind the door as cpu reset signal, in addition, JTAG reset signal SWD_RST is through the second pull-up resistor R2 welding system power supply VCC_3.3V, secondary signal RESET_CPU is through the first pull-up resistor R1 welding system power supply VCC_3.3V.
Embodiment two
The circuit of program operation and JTAG download program wire jumper free, comprise CPU, watchdog chip, JTAG fever writes, CPU exports feeding-dog signal to watchdog chip, the power supply signal SWD_3.3V of JTAG fever writes is connected to the anode of diode D2, and the watchdog reset signal RESET_WD that watchdog chip exports is connected to the negative electrode of diode D2 through the 6th resistance R6; The negative electrode of diode D2 is connected to the first negative electrode input end of common anode Schottky diode D1, the JTAG reset signal SWD_RST that JTAG fever writes exports is connected to the second negative electrode input end of common anode Schottky diode D1, JTAG reset signal SWD_RST is connected to system power supply VCC_3.3V through the 5th pull-up resistor R5, the anode of anode Schottky diode D1 is connected to system power supply VCC_3.3V through the 4th pull-up resistor R4 altogether, and the anode output signal RESET_CPU of anode Schottky diode D1 is as cpu reset signal altogether.
Claims (3)
1. the circuit of program operation and JTAG download program wire jumper free, comprise CPU, watchdog chip, JTAG fever writes, it is characterized in that: CPU exports feeding-dog signal to watchdog chip, and the power supply signal SWD_3.3V of the watchdog reset signal RESET_WD that watchdog chip exports and JTAG fever writes exports the first signal RSTM after "or" logic; The secondary signal RESET_CPU that the JTAG reset signal SWD_RST that first signal RSTM exports with JTAG fever writes exports after "AND" logic, this signal inputs to CPU as cpu reset signal, JTAG fever writes by data, clock and reset signal and CPU mutual.
2. the circuit of program operation according to claim 1 and JTAG download program wire jumper free, it is characterized in that: the power supply signal SWD_3.3V of JTAG fever writes is through the 3rd pull down resistor (R3) ground connection and jointly access or export behind the door the first signal RSTM with the watchdog reset signal RESET_WD that watchdog chip exports, the JTAG reset signal SWD_RST warp that first signal RSTM exports with JTAG fever writes inputs to CPU with the secondary signal RESET_CPU exported behind the door as cpu reset signal, in addition, JTAG reset signal SWD_RST is through the second pull-up resistor (R2) welding system power supply VCC_3.3V, secondary signal RESET_CPU is through the first pull-up resistor (R1) welding system power supply VCC_3.3V.
3. the circuit of program operation according to claim 1 and JTAG download program wire jumper free, it is characterized in that: the power supply signal SWD_3.3V of JTAG fever writes is connected to the anode of diode (D2), the watchdog reset signal RESET_WD that watchdog chip exports is connected to the negative electrode of diode (D2) through the 6th resistance (R6), the negative electrode of diode (D2) is connected to the first negative electrode input end of common anode Schottky diode (D1), the JTAG reset signal SWD_RST that JTAG fever writes exports is connected to the second negative electrode input end of common anode Schottky diode (D1), the anode that JTAG reset signal SWD_RST is connected to the common anode Schottky diode (D1) of system power supply VCC_3.3V through the 5th pull-up resistor (R5) is connected to system power supply VCC_3.3V through the 4th pull-up resistor (R4), the anode output signal RESET_CPU of anode Schottky diode (D1) is as cpu reset signal altogether.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520865141.XU CN205068366U (en) | 2015-11-02 | 2015-11-02 | Circuit of exempting from wire jumper is downloaded to program run and JTAG procedure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520865141.XU CN205068366U (en) | 2015-11-02 | 2015-11-02 | Circuit of exempting from wire jumper is downloaded to program run and JTAG procedure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205068366U true CN205068366U (en) | 2016-03-02 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520865141.XU Withdrawn - After Issue CN205068366U (en) | 2015-11-02 | 2015-11-02 | Circuit of exempting from wire jumper is downloaded to program run and JTAG procedure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205068366U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105224372A (en) * | 2015-11-02 | 2016-01-06 | 积成电子股份有限公司 | The circuit of program operation and JTAG download program wire jumper free |
| CN110471672A (en) * | 2019-08-13 | 2019-11-19 | 天津津航计算技术研究所 | A kind of anti-coded lock dead circuit of the DSP programming of logic-based chip |
-
2015
- 2015-11-02 CN CN201520865141.XU patent/CN205068366U/en not_active Withdrawn - After Issue
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105224372A (en) * | 2015-11-02 | 2016-01-06 | 积成电子股份有限公司 | The circuit of program operation and JTAG download program wire jumper free |
| CN105224372B (en) * | 2015-11-02 | 2018-07-27 | 积成电子股份有限公司 | Program is run and JTAG programs download the circuit of wire jumper free |
| CN110471672A (en) * | 2019-08-13 | 2019-11-19 | 天津津航计算技术研究所 | A kind of anti-coded lock dead circuit of the DSP programming of logic-based chip |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20160302 Effective date of abandoning: 20180727 |