CN204989825U - Direct current timer circuit - Google Patents
Direct current timer circuit Download PDFInfo
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- CN204989825U CN204989825U CN201520519146.7U CN201520519146U CN204989825U CN 204989825 U CN204989825 U CN 204989825U CN 201520519146 U CN201520519146 U CN 201520519146U CN 204989825 U CN204989825 U CN 204989825U
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Abstract
The utility model discloses a direct current timer circuit, including resistance R1, switch S2, chip IC1 and hilted broadsword multithrow switch S1, switch S2's the one end VCC that connects, electric capacity C2, triode V1's collecting electrode, relay J's contact J -1, relay J's contact J -2 and chip IC1's pin 16 are connected to switch S2's the other end, and relay J, triode V1's base connecting resistance R3 is connected to triode V1's projecting pole. The utility model discloses direct current timer circuit simple structure, components and parts are few, adopt CD4060 timer chip and hilted broadsword multithrow switch to constitute the accurate regularly structure of many gears, can with the timing accuracy accuracy by 1 second, can send the chimes of doom simultaneously and remind the user after the timing, consequently have the precision height, the cost of manufacture is hanged down and the manifold advantage of function.
Description
Technical field
The utility model relates to a kind of timer, specifically a kind of direct current timer circuit.
Background technology
Timer is electronic equipment common in daily life, be usually used in the timing controlled of household electrical appliance, bring great convenience to the life of people, but timer is in the market mostly slightly chooses control mode, adopt a control handle to control, precision reduces, and high-precision timer exists again that cost of manufacture is high, complex structure, bulky defect, small household appliances inside cannot be integrated into, therefore need to be improved.
Utility model content
The purpose of this utility model is to provide the direct current timer circuit that a kind of cost of manufacture is low, degree of regulation is high, to solve the problem proposed in above-mentioned background technology.
For achieving the above object, the utility model provides following technical scheme:
A kind of direct current timer circuit, comprise resistance R1, switch S 2, chip IC 1 and single pole multiple throw S1, one end of described switch S 2 connects power supply VCC, the other end of switch S 2 connects electric capacity C2, the collector of triode V1, the contact J-1 of relay J, the contact J-2 of relay J and the pin 16 of chip IC 1, the emitter of triode V1 connects relay J, the base stage contact resistance R3 of triode V1, the other end of resistance R3 connects the moved end 1 of single pole multiple throw S1 and the anode of diode D1, the negative electrode contact resistance R1 of diode D1 and the pin 11 of chip IC 1, the other end of resistance R1 connects a stiff end of electric capacity C1 and potentiometer RP1, the sliding end of potentiometer RP1 connects another stiff end of potentiometer RP1 and the pin 10 of chip IC 1, the other end contact resistance R2 of electric capacity C2 and the pin 12 of chip IC 1, the other end of resistance R2 connects the other end of relay J, loudspeaker B, the pin 8 also ground connection of load A and chip IC 1, the other end of the contact J-2 of relay J connects the other end of loudspeaker B, the other end of electric capacity C1 connects the pin 9 of chip IC 1, the other end of the contact J-1 of relay J connects the other end of load A, the not moved end 2 of single pole multiple throw S1 connects the pin 3 of chip IC 1, the not moved end 3 of single pole multiple throw S1 connects the pin 15 of chip IC 1, the not moved end 4 of single pole multiple throw S1 connects the pin 4 of chip IC 1.
As preferred version of the present utility model: the model of described chip IC 1 is CD4060.
Compared with prior art, the beneficial effects of the utility model are: the utility model direct current timer circuit structure is simple, components and parts are few, CD4060 timer chip and single pole multiple throw is adopted to form many gears fine timing structure, timing accuracy can be accurate to 1 second, chimes of doom can be sent simultaneously remind user after timing terminates, therefore have that precision is high, cost of manufacture is low and the advantage of diverse in function.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of direct current timer circuit.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
Refer to Fig. 1, a kind of direct current timer circuit, comprise resistance R1, switch S 2, chip IC 1 and single pole multiple throw S1, one end of described switch S 2 connects power supply VCC, the other end of switch S 2 connects electric capacity C2, the collector of triode V1, the contact J-1 of relay J, the contact J-2 of relay J and the pin 16 of chip IC 1, the emitter of triode V1 connects relay J, the base stage contact resistance R3 of triode V1, the other end of resistance R3 connects the moved end 1 of single pole multiple throw S1 and the anode of diode D1, the negative electrode contact resistance R1 of diode D1 and the pin 11 of chip IC 1, the other end of resistance R1 connects a stiff end of electric capacity C1 and potentiometer RP1, the sliding end of potentiometer RP1 connects another stiff end of potentiometer RP1 and the pin 10 of chip IC 1, the other end contact resistance R2 of electric capacity C2 and the pin 12 of chip IC 1, the other end of resistance R2 connects the other end of relay J, loudspeaker B, the pin 8 also ground connection of load A and chip IC 1, the other end of the contact J-2 of relay J connects the other end of loudspeaker B, the other end of electric capacity C1 connects the pin 9 of chip IC 1, the other end of the contact J-1 of relay J connects the other end of load A, the not moved end 2 of single pole multiple throw S1 connects the pin 3 of chip IC 1, the not moved end 3 of single pole multiple throw S1 connects the pin 15 of chip IC 1, the not moved end 4 of single pole multiple throw S1 connects the pin 4 of chip IC 1.
The model of chip IC 1 is CD4060.
Principle of work of the present utility model is: this circuit times from 1 second to l hour, can carry out three gear controls by single pole multiple throw S1, that is:, when S1 connection 1,2 end, timing is 1 ~ 20 second; When S1 connection 1,3 end, timing is 15 ~ 320 seconds; S1 connects 1,4 ends, and timing is 4 ~ 85 minutes.The concrete time carries out fine adjustment calibration timing by potentiometer RP1.Timing mode is counter.CD4060 is binary one 4 grades of counters, and after switch S 2 disconnects, circuit automatic clear, timing restarts, when just having connected circuit.After timing arrives, CD4060 exports high level, transistor V1 conducting, relay J energising action, its normally closed contact J-1 contact disconnects, and cuts off the power supply of load A, timing terminates, the normally opened contact J-2 of relay J closes simultaneously, and loudspeaker B conducting sends chimes of doom, reminds user that timing terminates.
Claims (2)
1. a direct current timer circuit, comprise resistance R1, switch S 2, chip IC 1 and single pole multiple throw S1, it is characterized in that, one end of described switch S 2 connects power supply VCC, the other end of switch S 2 connects electric capacity C2, the collector of triode V1, the contact J-1 of relay J, the contact J-2 of relay J and the pin 16 of chip IC 1, the emitter of triode V1 connects relay J, the base stage contact resistance R3 of triode V1, the other end of resistance R3 connects the moved end 1 of single pole multiple throw S1 and the anode of diode D1, the negative electrode contact resistance R1 of diode D1 and the pin 11 of chip IC 1, the other end of resistance R1 connects a stiff end of electric capacity C1 and potentiometer RP1, the sliding end of potentiometer RP1 connects another stiff end of potentiometer RP1 and the pin 10 of chip IC 1, the other end contact resistance R2 of electric capacity C2 and the pin 12 of chip IC 1, the other end of resistance R2 connects the other end of relay J, loudspeaker B, the pin 8 also ground connection of load A and chip IC 1, the other end of the contact J-2 of relay J connects the other end of loudspeaker B, the other end of electric capacity C1 connects the pin 9 of chip IC 1, the other end of the contact J-1 of relay J connects the other end of load A, the not moved end 2 of single pole multiple throw S1 connects the pin 3 of chip IC 1, the not moved end 3 of single pole multiple throw S1 connects the pin 15 of chip IC 1, the not moved end 4 of single pole multiple throw S1 connects the pin 4 of chip IC 1.
2. a kind of direct current timer circuit according to claim 1, is characterized in that, the model of described chip IC 1 is CD4060.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201520519146.7U CN204989825U (en) | 2015-07-16 | 2015-07-16 | Direct current timer circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201520519146.7U CN204989825U (en) | 2015-07-16 | 2015-07-16 | Direct current timer circuit |
Publications (1)
Publication Number | Publication Date |
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CN204989825U true CN204989825U (en) | 2016-01-20 |
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ID=55124177
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201520519146.7U Expired - Fee Related CN204989825U (en) | 2015-07-16 | 2015-07-16 | Direct current timer circuit |
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CN (1) | CN204989825U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106517169A (en) * | 2016-12-13 | 2017-03-22 | 顾广才 | Single-layer graphene peeling device |
-
2015
- 2015-07-16 CN CN201520519146.7U patent/CN204989825U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106517169A (en) * | 2016-12-13 | 2017-03-22 | 顾广才 | Single-layer graphene peeling device |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160120 Termination date: 20170716 |