CN204964822U - Prevent BOSA packaging structure of short circuit - Google Patents

Prevent BOSA packaging structure of short circuit Download PDF

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Publication number
CN204964822U
CN204964822U CN201520714034.7U CN201520714034U CN204964822U CN 204964822 U CN204964822 U CN 204964822U CN 201520714034 U CN201520714034 U CN 201520714034U CN 204964822 U CN204964822 U CN 204964822U
Authority
CN
China
Prior art keywords
bosa
pin
encapsulating structure
electric capacity
packaging structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201520714034.7U
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Chinese (zh)
Inventor
王文兆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Feixun Data Communication Technology Co Ltd
Original Assignee
Shanghai Feixun Data Communication Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Feixun Data Communication Technology Co Ltd filed Critical Shanghai Feixun Data Communication Technology Co Ltd
Priority to CN201520714034.7U priority Critical patent/CN204964822U/en
Application granted granted Critical
Publication of CN204964822U publication Critical patent/CN204964822U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model provides a prevent BOSA packaging structure of short circuit, packaging structure includes: the BOSA main part, the PIN pin, the PIN pin sets up in the BOSA main part, be used for with the BOSA main part links to each other with PCB's encapsulation pad, paster electric capacity sets up in the silk screen printing region of PIN pin, packaging structure includes 5 the PIN pin, the equal ground connection of all pins of paster electric capacity, paster electric capacity is in by the chip mounter welding in the silk screen printing region. The utility model provides a prevent BOSA packaging structure of short circuit through increase by two paster electric capacity on the basis of former universal architecture, fills up in the below of BOSA main part, can prevent the PIN pin welding short circuit of BOSA main part, save the plastic spacer simultaneously, reduced the complexity of factory production equipment plug -in components, improved the product packaging efficiency to the cost of labor of device cost and production has been saved.

Description

A kind of BOSA encapsulating structure of against short-circuit
Technical field
The utility model relates to BOSA optical device technical field, particularly relates to a kind of BOSA encapsulating structure of against short-circuit.
Background technology
The singularity that BOSA (Bi-DirectionalOpticalSub-Assembly, light transceiver module) encapsulates due to it, contour structures on the market all as shown in Figure 1A, mainly contains 9 PIN.As shown in Figure 1B, it is the vertical view of BOSA encapsulating structure 01 in prior art, wherein, 5 pin-pitch of R1-R5 are very narrow, directly insert in the encapsulation welding tray of PCB during welding, and 5 pins are close to PCB surface, when during wave-soldering, the opposite side of pad climbed to by scolding tin, be easy to produce short circuit.As shown in Figure 1 C, it is the left view of BOSA encapsulating structure 01 in prior art, welds again, can not produce the problems referred to above after 4 pin T1-T4 in BOSA encapsulating structure 01 need bending.
Existing BOSA package design as shown in Figure 2, just relates to according to the mechanical dimension of BOSA, and reckoned without the problem of tin short circuit.So when subsequent production, in order to reduce short-circuit risks, generally between BOSA and PCB, padding a white plastic insulation spacer 02 (as shown in Figure 3), but such a process increases the difficulty of artificial plug-in unit, add time cost, reduce plug-in unit efficiency.
It can thus be appreciated that short circuit problem does not take into account by existing BOSA package design scheme at the beginning of design, even if when subsequent production by increasing the remedial measures of insulation spacer.Therefore, namely provide a kind of does not increase the BOSA encapsulating structure 01 that cost of labor can reduce short-circuit risks simultaneously, becomes one of problem demanding prompt solution.
Utility model content
In view of the above problems, the application describes a kind of BOSA encapsulating structure of against short-circuit, and described encapsulating structure comprises:
Light transceiver module main body;
PIN pin, described PIN pin is arranged in described smooth transceiver module main body, in order to described smooth transceiver module main body to be connected with the encapsulation welding tray of PCB;
Patch capacitor, is arranged in the silk-screen region of described PIN pin.
Preferably, described encapsulating structure comprises 5 described PIN pins.
Preferably, the equal ground connection of all pins of described patch capacitor.
Preferably, described patch capacitor is welded in described silk-screen region by chip mounter.
Preferably, the number of described patch capacitor is 2.
Preferably, the model of described patch capacitor is 0402.
Preferably, the rounded structure in described silk-screen region.
Technique scheme tool has the following advantages or beneficial effect: the BOSA encapsulating structure of the against short-circuit that the utility model proposes, by increasing by two patch capacitors on the basis of former universal architecture, pad, in the below of BOSA main body, can prevent the PIN pin solder shorts of BOSA main body; Eliminate plastic spacer simultaneously, reduce the complicacy of plant produced assembled insert, improve assembling product efficiency, and save the cost of labor of device cost and production.
Accompanying drawing explanation
With reference to appended accompanying drawing, to describe embodiment of the present utility model more fully.But, appended accompanying drawing only for illustration of and elaboration, do not form the restriction to the utility model scope.
Figure 1A is the outside drawing of BOSA encapsulating structure in prior art;
Figure 1B is the vertical view of BOSA encapsulating structure in prior art;
Fig. 1 C is the left view of BOSA encapsulating structure in prior art;
Fig. 2 is the package design structural representation of BOSA encapsulating structure in prior art;
Fig. 3 is the structural representation of the BOSA encapsulating structure employing pad in prior art;
Fig. 4 is the structural representation of the BOSA encapsulating structure of a kind of against short-circuit of the utility model;
Fig. 5 is that in prior art, BOSA encapsulating structure carries out the process flow chart produced;
Fig. 6 is the process flow chart that the BOSA encapsulating structure of a kind of against short-circuit of the utility model carries out producing.
Embodiment
Be described in detail below in conjunction with the BOSA encapsulating structure of the drawings and specific embodiments to a kind of against short-circuit of the utility model.
As shown in Figure 4, a kind of BOSA encapsulating structure of against short-circuit, comprising:
BOSA main body (i.e. light transceiver module main body) 1, described BOSA main body 1 is light transceiver module;
Five PIN pins, described PIN pin is arranged in described BOSA main body 1, is connected with the encapsulation welding tray of PCB for described BOSA main body 1;
Two patch capacitors, are arranged in the silk-screen region A of five described PIN pins, the rounded structure of described silk-screen region A.
Five described PIN pins are respectively R1, R2, R3, R4 and R5, described pin is all arranged in described BOSA main body 1, described BOSA main body, by these five PIN pins, directly insert in the encapsulation welding tray of PCB, and five PIN pins is close to PCB surface through soldering.In order to prevent in welding process, scolding tin is climbed to the opposite side of pad and produces short circuit, therefore in the silk-screen region of 5 described PIN pins, is provided with two patch capacitors.
Wherein, two described patch capacitors are respectively electric capacity C1 and electric capacity C2.Because BOSA main body 1 only has silk-screen region A and PCB to contact, so electric capacity C1 and electric capacity C2 is arranged in the silk-screen region A of 5 described PIN pins.Only have when electric capacity C1 and electric capacity C2 region overlap therewith, just can play the effect of padded BOSA.In addition, all pins all ground connection of electric capacity C1 and electric capacity C2, and two electric capacity are at SMD (SurfaceMountedDevices, surface mount device) operation completes welding by chip mounter and reflow soldering, do not take the labor hour cost of DIP (DualInline-pinPackage, dual-in-line package technology) operation.The model of described electric capacity C1 and electric capacity C2 can be 0402.
Because BOSA is DIP device, therefore need before welding to carry out artificial plug-in unit.As shown in Figure 5, the operation using existing BOSA encapsulating structure to carry out producing is:
For BOSA main body and pad blanking;
Artificial is BOSA main body increase pad;
Artificial add plug-in unit for BOSA main body;
Carry out wave-soldering, the PIN pin of BOSA and PCB mainboard are weldingly connected;
Test and put in storage.
And the BOSA encapsulating structure adopting the present embodiment to propose, as shown in Figure 6, the operation of carrying out producing is:
For the blanking of BOSA main body;
Artificial add plug-in unit for BOSA main body;
Carry out wave-soldering, the PIN pin of BOSA and PCB mainboard are weldingly connected;
Test and put in storage.
Can draw from above-mentioned contrast, after silk-screen region A is provided with patch capacitor C1 and C2, eliminate the operation of " for pad blanking " and " artificial is BOSA main body increase pad ", save labor hour cost, save the cost of plastic cement pad in prior art simultaneously, thus also save plastic cement pad produce inspection, storage, blanking cost.Reduce the artificial plug-in unit difficulty of BOSA, improve BOSA plug-in unit efficiency, reduce production cost.Meanwhile, the performance of product is not affected.
The BOSA encapsulating structure that the present embodiment provides, effectively can prevent solder shorts when product volume production for a kind of and can reduce the BOSA encapsulating structure of production cost.The design proposal of this structure, by increasing by two 0402 electric capacity C1 and C2 on the basis of former universal architecture, pads the below in BOSA main body 1, can prevent the PIN pin solder shorts of BOSA main body 1; Eliminate plastic spacer simultaneously, reduce the complicacy of plant produced assembled insert, improve assembling product efficiency, and save the cost of labor of device cost and production.
For a person skilled in the art, after reading above-mentioned explanation, various changes and modifications undoubtedly will be apparent.Therefore, appending claims should regard the whole change and correction of containing true intention of the present utility model and scope as.In Claims scope, the scope of any and all equivalences and content, all should think and still belong in intention of the present utility model and scope.

Claims (6)

1. a BOSA encapsulating structure for against short-circuit, is characterized in that, described encapsulating structure comprises:
Light transceiver module main body;
PIN pin, described PIN pin is arranged in described smooth transceiver module main body, in order to described smooth transceiver module main body to be connected with the encapsulation welding tray of PCB;
Patch capacitor, is arranged in the silk-screen region of described PIN pin.
2. the BOSA encapsulating structure of against short-circuit according to claim 1, is characterized in that, described encapsulating structure comprises 5 described PIN pins.
3. the BOSA encapsulating structure of against short-circuit according to claim 1, is characterized in that, the equal ground connection of all pins of described patch capacitor.
4. the BOSA encapsulating structure of against short-circuit according to claim 3, is characterized in that, described patch capacitor is welded in described silk-screen region by chip mounter.
5. the BOSA encapsulating structure of against short-circuit according to claim 4, is characterized in that, the number of described patch capacitor is 2.
6. the BOSA encapsulating structure of against short-circuit according to claim 4, is characterized in that, the model of described patch capacitor is 0402.
The BOSA encapsulating structure of against short-circuit according to claim 1, is characterized in that, the rounded structure in described silk-screen region.
CN201520714034.7U 2015-09-15 2015-09-15 Prevent BOSA packaging structure of short circuit Expired - Fee Related CN204964822U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201520714034.7U CN204964822U (en) 2015-09-15 2015-09-15 Prevent BOSA packaging structure of short circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201520714034.7U CN204964822U (en) 2015-09-15 2015-09-15 Prevent BOSA packaging structure of short circuit

Publications (1)

Publication Number Publication Date
CN204964822U true CN204964822U (en) 2016-01-13

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Family Applications (1)

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CN201520714034.7U Expired - Fee Related CN204964822U (en) 2015-09-15 2015-09-15 Prevent BOSA packaging structure of short circuit

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108333694A (en) * 2018-02-11 2018-07-27 青岛海信宽带多媒体技术有限公司 A kind of optical secondary module and optical module
US10333271B2 (en) 2016-11-02 2019-06-25 Pegatron Corporation Pin-covering apparatus and bi-directional optical device using the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10333271B2 (en) 2016-11-02 2019-06-25 Pegatron Corporation Pin-covering apparatus and bi-directional optical device using the same
CN108333694A (en) * 2018-02-11 2018-07-27 青岛海信宽带多媒体技术有限公司 A kind of optical secondary module and optical module
CN108333694B (en) * 2018-02-11 2020-08-14 青岛海信宽带多媒体技术有限公司 Optical secondary module and optical module

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20160113

Termination date: 20180915