CN204810633U

CN204810633U - High accuracy undercurrent LED driver chip of display technique is deposited to built -in twin -lock

Info

Publication number: CN204810633U
Application number: CN201520610667.3U
Authority: CN
Inventors: 李付民; 万波; 蒋志伟
Original assignee: Shenzhen Aisenda Technology Co Ltd
Current assignee: Shenzhen Aisenda Technology Co Ltd
Priority date: 2015-08-14
Filing date: 2015-08-14
Publication date: 2015-11-25
Anticipated expiration: 2025-08-14

Abstract

The utility model discloses a high accuracy undercurrent LED driver chip of display technique is deposited to built -in twin -lock, including 16 displacement temporary storages, 16 scanning gray scale latchs, 16 gray scale signal modulation wares of 16 constant current output driver wares and output current regulators, 16 position scanning gray scale latch includes the 1 16 scanning gray scale latch and the 2 16 scanning gray scale latch, 16 position displacement temporary storage with the 1 16 scanning gray scale latch is connected, the 1 16 scanning gray scale latch with the 2 16 scanning gray scale latch is connected, the 2 16 scanning gray scale latch with 16 position constant current output driver ware is connected. The utility model has the advantages of: can provide high accuracy multichannel constant current source, can effectively improve the refresh rate and the LED utilization ratio of traditional general drive display screen, the function is eliminated to " the ghost " that have the built -in, promote the image performance of scanning screen.

Description

A kind of built-in twin-lock deposits the high accuracy small area analysis LED drive chip of Display Technique

Technical field

The utility model relates to electrical engineering field, and particularly a kind of built-in twin-lock deposits the high accuracy small area analysis LED drive chip of Display Technique.

Background technology

LED is a kind of efficient, durable, safe light source, is called as forth generation lighting source, becomes the major way of mankind's illumination gradually.Meanwhile, LED Driving technique also achieve larger progress.LED drive chip is the key function part in LED illumination System, and along with the raising of people's quality of life, it is also proposed higher requirement to LED illumination, the technological innovation of LED drive chip also faces new challenges.

LED has in indoor and outdoor LED display panel, variable consulting billboard (VMS), LED dot matrix module, building and decorative lighting, industrial lighting and LCD display backlight field and applies comparatively widely, but the product existed at present is because there is more defect in the function imperfection of its driving chip: input current is unstable, display screen refresh rate, LED utilance are low, easy appearance " ghost " phenomenon, scan screen Findings is poor, GTG performance is poor, and brightness disproportionation is first-class.

Therefore, market proposes higher demand to LED and driving chip thereof: can provide high-precision multi-path constant current, effectively can improve refresh rate and LED utilance that traditional common drives display screen, there is built-in " ghost " and eliminate function, promote the Findings of scan screen.Comprehensive the demand, the high accuracy small area analysis LED drive chip that a built-in twin-lock that can meet above function deposits Display Technique has wide market prospects.

Utility model content

The purpose of this utility model is the high accuracy small area analysis LED drive chip that a kind of built-in twin-lock provided to solve above-mentioned the deficiencies in the prior art deposits Display Technique.This driver can provide high-precision multi-path constant current, effectively can improve refresh rate and LED utilance that traditional common drives display screen, have built-in " ghost " and eliminate function, promote the Findings of scan screen.

To achieve these goals, a kind of built-in twin-lock designed by the utility model deposits the high accuracy small area analysis LED drive chip of Display Technique, comprise 16 Bit Shift buffers, 16 bit scan GTG latchs, 16 constant current output drivers, 16 grayscale signal modulators and output current adjuster, described 16 bit scan GTG latchs comprise the one 16 bit scan GTG latch and the 2 16 bit scan GTG latch; Described 16 Bit Shift buffers are connected with described one 16 bit scan GTG latch, described one 16 bit scan GTG latch is connected with described 2 16 bit scan GTG latch, and described 2 16 bit scan GTG latch is connected with described 16 constant current output drivers;

Described output current adjuster is connected with described 16 constant current output drivers;

Described 16 Bit Shift buffers are provided with serial data input (DI), data clock signal input terminal (DCK) and serial data output terminal (DO);

Described 16 bit scan GTG latchs are provided with data latch input terminal (LAT);

Described 16 constant current output drivers are provided with constant current output (OUT);

Described 16 grayscale signal modulators are provided with GTG modulating signal input (PDM);

Described output current adjuster connects outer meeting resistance input (REXT).

Further, built-in twin-lock deposits a high accuracy small area analysis LED drive chip for Display Technique, and the high accuracy small area analysis LED drive chip that described built-in twin-lock deposits Display Technique is provided with control logic and drive current earth terminal (GND) and chip power supply section (VDD).

Further, a kind of built-in twin-lock deposits the high accuracy small area analysis LED drive chip of Display Technique, and the high accuracy small area analysis LED drive chip that described built-in twin-lock deposits Display Technique adopts SSOP24 to encapsulate pattern or QFN24 encapsulation pattern.

Further, a kind of built-in twin-lock deposits the high accuracy small area analysis LED drive chip of Display Technique, and the constant current output end (OUT) of described 16 constant current output drivers is provided with 16.

A kind of built-in twin-lock that the utility model obtains deposits the high accuracy small area analysis LED drive chip of Display Technique, can normal running under the operating voltage of 3.5 ~ 5.0V, chip provides 16 maximum open-drain constant currents of bearing operating voltage 17V to sink to output, and can set the output size of electric current by an outer meeting resistance; This chip uses the serial input interface of 4 lines, makes controller can by four inputs: serial data input (DI), data clock signal input terminal (DCK), data latch input terminal (LAT), GTG modulating signal input (PDM) control constant current output port and utilize serial data output terminal (DO) that multiple driver is cascaded operation.

Driver simplifies passive component needed for circuit board and provides ± interchannel of 3% and the electric current output accuracy of ± 4% chip chamber, and the SSOP/QFN that have employed 24 pin positions encapsulates pattern to be applicable to different application demand and can to work under the external environment of-40 DEG C to+85 DEG C.

The utility model has the advantage of:

1, high-precision multi-path constant current can be provided;

2, refresh rate and LED utilance that traditional common drives display screen can effectively be improved;

3, there is built-in " ghost " and eliminate function;

4, the Findings of scan screen is promoted.

Accompanying drawing explanation

Fig. 1 is the functional block diagram of embodiment.

Embodiment

Below in conjunction with drawings and Examples, the utility model is further illustrated.

Embodiment:

As shown in the figure, a kind of built-in twin-lock deposits the high accuracy small area analysis LED drive chip of Display Technique, comprise 16 Bit Shift buffers, 16 bit scan GTG latchs, 16 constant current output drivers, 16 grayscale signal modulators and output current adjuster, described 16 bit scan GTG latchs comprise the one 16 bit scan GTG latch and the 2 16 bit scan GTG latch; Described 16 Bit Shift buffers are connected with described one 16 bit scan GTG latch, described one 16 bit scan GTG latch is connected with described 2 16 bit scan GTG latch, and described 2 16 bit scan GTG latch is connected with described 16 constant current output drivers;

The high accuracy small area analysis LED drive chip that described built-in twin-lock deposits Display Technique is provided with control logic and drive current earth terminal (GND) and chip power supply section (VDD); The high accuracy small area analysis LED drive chip that described built-in twin-lock deposits Display Technique adopts SSOP24 to encapsulate pattern; The constant current output end (OUT) of described 16 constant current output drivers is provided with 16.

A kind of built-in twin-lock that the present embodiment obtains deposits the high accuracy small area analysis LED drive chip of Display Technique, can normal running under the operating voltage of 3.5 ~ 5.0V, chip provides 16 maximum open-drain constant currents of bearing operating voltage 17V to sink to output, and can set the output size of electric current by an outer meeting resistance; This chip uses the serial input interface of 4 lines, makes controller can by four inputs: serial data input (DI), data clock signal input terminal (DCK), data latch input terminal (LAT), GTG modulating signal input (PDM) control constant current output port and utilize serial data output terminal (DO) that multiple driver is cascaded operation.

The advantage of the present embodiment is:

1, high-precision multi-path constant current can be provided;

3, there is built-in " ghost " and eliminate function;

4, the Findings of scan screen is promoted.

For the utility model person of an ordinary skill in the technical field; without departing from the concept of the premise utility; its framework form can be flexible and changeable; just make some simple deduction or replace, all should be considered as belonging to the scope of patent protection that the utility model is determined by submitted to claims.

Claims

1. a built-in twin-lock deposits the high accuracy small area analysis LED drive chip of Display Technique, comprise 16 Bit Shift buffers, 16 bit scan GTG latchs, 16 constant current output drivers, 16 grayscale signal modulators and output current adjuster, it is characterized in that: described 16 bit scan GTG latchs comprise the one 16 bit scan GTG latch and the 2 16 bit scan GTG latch; Described 16 Bit Shift buffers are connected with described one 16 bit scan GTG latch, described one 16 bit scan GTG latch is connected with described 2 16 bit scan GTG latch, and described 2 16 bit scan GTG latch is connected with described 16 constant current output drivers;

2. a kind of built-in twin-lock according to claim 1 deposits the high accuracy small area analysis LED drive chip of Display Technique, it is characterized in that: the high accuracy small area analysis LED drive chip that described built-in twin-lock deposits Display Technique is provided with control logic and drive current earth terminal (GND) and chip power supply section (VDD).

3. a kind of built-in twin-lock according to claim 1 deposits the high accuracy small area analysis LED drive chip of Display Technique, it is characterized in that: the high accuracy small area analysis LED drive chip that described built-in twin-lock deposits Display Technique adopts SSOP24 to encapsulate pattern or QFN24 encapsulation pattern.

4. a kind of built-in twin-lock according to claim 1 deposits the high accuracy small area analysis LED drive chip of Display Technique, it is characterized in that: the constant current output end (OUT) of described 16 constant current output drivers is provided with 16.