CN204696946U - High pressure self-powered circuit - Google Patents
High pressure self-powered circuit Download PDFInfo
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- CN204696946U CN204696946U CN201520460745.6U CN201520460745U CN204696946U CN 204696946 U CN204696946 U CN 204696946U CN 201520460745 U CN201520460745 U CN 201520460745U CN 204696946 U CN204696946 U CN 204696946U
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Abstract
The utility model provides a kind of high pressure self-powered circuit, and described high pressure self-powered circuit comprises: JFET Correctional tube, current-limiting resistance, the first switching tube, second switch pipe, electric capacity of voltage regulation, control circuit and power MOS pipe.The utility model is compared with traditional high-voltage power supply circuit, and have employed a kind of high pressure self-powered circuit structure and method of novelty, chip eliminates VCC energization pins, peripheral circuit is more simplified, save high voltage startup resistance and electric capacity of voltage regulation, system cost is low, and volume is little.Inside circuit eliminates clamp diode and modulation circuit, and circuit structure is simple, and reliability is high, and chip area significantly reduces, and chip cost and system cost reduce greatly.Further, with the high pressure self-powered circuit of current limiting function, in system process of establishing, charging current is restricted, and current value can keep constant, vdd voltage linearly rises, and effectively prevent the overshoot phenomenon in power up and the excessive damage caused device of electric current.
Description
Technical field
The utility model belongs to integrated circuit (IC) design field, particularly relates to a kind of high pressure self-powered circuit.
Background technology
In LED drive circuit, usually can use high-voltage power supply circuit, busbar voltage is converted to after treatment the level for internal circuit.Traditional method be by busbar voltage after starting resistance current limliting by clamp diode voltage stabilizing, then obtain required level by after the modulation circuit process of chip internal.This method power pins is absolutely necessary, but also needs the peripheral components such as starting resistance, feedback resistance, clamp diode and electric capacity of voltage regulation, and system cost is high, and volume is large.
Traditional high-voltage power supply circuit as shown in Figure 1, AC-input voltage forms busbar voltage after bridge heap rectification and electric capacity C1 filtering, busbar voltage is for electric capacity C2 charges after starting resistance Rstart current limliting, and VCC voltage rises gradually, is finally stabilized in the voltage stabilizing value of clamp diode D1.Because VCC voltage affects by the factor such as technique, temperature, precision is lower, and therefore VCC voltage need produce inner level VDD accurately after inner modulation circuit Regulator modulates, and is other module for power supply of chip internal.
This high-voltage power supply circuit is owing to using high voltage startup resistance, and internal circuit needs integrated clamp diode, and needs modulation circuit, and therefore circuit is comparatively complicated, and chip VCC pin is also essential, and system cost is high, and volume is large.
Utility model content
The shortcoming of prior art in view of the above, the purpose of this utility model is to provide a kind of high pressure self-powered circuit, and for solving, circuit in prior art is comparatively complicated, high, the bulky problem of system cost.
For achieving the above object, the utility model provides a kind of high pressure self-powered circuit, described high pressure self-powered circuit comprises: JFET Correctional tube, current-limiting resistance, the first switching tube, second switch pipe, electric capacity of voltage regulation, control circuit and power MOS pipe, wherein: the grid of described JFET Correctional tube and Substrate ground, drain electrode connects the second pole of power MOS pipe, and source electrode connects the first end of current-limiting resistance and the second pole of second switch pipe; Second pole of the second termination first switching tube of described current-limiting resistance and the grid of second switch pipe; The grid of described first switching tube is controlled by control circuit, the first pole and Substrate ground; Second pole of described second switch pipe and substrate for connecing vdd voltage, and connect the first pole plate of electric capacity of voltage regulation; Second pole plate ground connection of described electric capacity of voltage regulation; Described control circuit is powered by VDD, and modulates by system loop, and its first output is for controlling the operating state of power MOS pipe, and described control circuit detects vdd voltage value simultaneously, and its second output is for controlling the operating state of the first switching tube; The grid of described power MOS pipe connects the first output of described control circuit, and the second pole is connected with the drain electrode of JFET Correctional tube, the first pole and Substrate ground.
As a kind of preferred version of high pressure self-powered circuit of the present utility model, the second pole of described power MOS pipe is as chip output mouth, and the external inductance of sheet and Schottky diode, simultaneously as the power input of self-powered circuit.
As a kind of preferred version of high pressure self-powered circuit of the present utility model, described first switching tube, second switch pipe are NMOS tube, and its first very source electrode, second very drains.
As a kind of preferred version of high pressure self-powered circuit of the present utility model, described power MOS pipe is power NMOS tube, and its first very source electrode, second very drains.
As a kind of preferred version of high pressure self-powered circuit of the present utility model, also comprise current limliting and detect resistance and Current limited Control pipe, wherein: the first end that described current limliting detects resistance is connected with the first pole of second switch pipe, the grid of Current limited Control pipe, and the second end is connected with vdd voltage; Second pole of described Current limited Control pipe is extremely connected with second of the first switching tube with the grid of the second end of current-limiting resistance, second switch pipe, grid is connected with the second end that current limliting detects resistance with the first pole of second switch pipe, and the first pole is connected with vdd voltage with substrate.
Further, described Current limited Control pipe is NMOS tube, and its first very source electrode, second very drains.
As mentioned above, high pressure self-powered circuit of the present utility model, there is following beneficial effect: compared with traditional high-voltage power supply circuit, the utility model have employed a kind of high pressure self-powered circuit structure, chip eliminates VCC energization pins, and peripheral circuit is more simplified, and saves high voltage startup resistance and electric capacity of voltage regulation, system cost is low, and volume is little.Inside circuit eliminates clamp diode and modulation circuit, and circuit structure is simple, and reliability is high, and chip area significantly reduces, and chip cost and system cost reduce greatly.Further, with the high pressure self-powered circuit of current limiting function, in system process of establishing, charging current is restricted, and current value can keep constant, vdd voltage linearly rises, and effectively prevent the overshoot phenomenon in power up and the excessive damage caused device of electric current.
Accompanying drawing explanation
Fig. 1 is shown as the electrical block diagram of a kind of high-voltage power supply circuit of the prior art.
Fig. 2 is shown as the electrical block diagram of high pressure self-powered circuit of the present utility model.
Fig. 3 is shown as the sequential chart of high pressure self-powered circuit of the present utility model.
Fig. 4 is shown as the electrical block diagram of the high pressure self-powered circuit of band current-limiting function of the present utility model.
Fig. 5 is shown as of the present utility model without current limliting and the electric current and voltage sequential chart being with current limliting high pressure self-powered circuit.
Element numbers explanation
J1 JFET Correctional tube
R1 current-limiting resistance
NM1 first switching tube
NM2 second switch pipe
C3 electric capacity of voltage regulation
Control control circuit
NM0 power MOS pipe
R2 current limliting detects resistance
NM3 Current limited Control pipe
Embodiment
Below by way of specific instantiation, execution mode of the present utility model is described, those skilled in the art the content disclosed by this specification can understand other advantages of the present utility model and effect easily.The utility model can also be implemented or be applied by embodiments different in addition, and the every details in this specification also can based on different viewpoints and application, carries out various modification or change not deviating under spirit of the present utility model.
Refer to Fig. 2 ~ Fig. 5.It should be noted that, the diagram provided in the present embodiment only illustrates basic conception of the present utility model in a schematic way, then only the assembly relevant with the utility model is shown in graphic but not component count, shape and size when implementing according to reality is drawn, it is actual when implementing, and the kenel of each assembly, quantity and ratio can be a kind of change arbitrarily, and its assembly layout kenel also may be more complicated.
Embodiment 1
As shown in Figure 2, the present embodiment provides a kind of high pressure self-powered circuit, described high pressure self-powered circuit comprises: JFET Correctional tube J1, current-limiting resistance R1, the first switching tube NM1, second switch pipe NM2, electric capacity of voltage regulation C3, control circuit Control and power MOS pipe NM0, wherein: the grid of described JFET Correctional tube J1 and Substrate ground, drain electrode connects second pole of power MOS pipe NM0, and source electrode connects the first end of current-limiting resistance R1 and second pole of second switch pipe NM2; Second pole of the second termination first switching tube NM1 of described current-limiting resistance R1 and the grid of second switch pipe NM2; The grid of described first switching tube NM1 is controlled by control circuit Control, the first pole and Substrate ground; Second pole of described second switch pipe NM2 and substrate for connecing vdd voltage, and connect first pole plate of electric capacity of voltage regulation C3; The second pole plate ground connection of described electric capacity of voltage regulation C3; Described control circuit Control is powered by VDD, and modulate by system loop, its first output is for controlling the operating state of power MOS pipe NM0, and described control circuit Control detects vdd voltage value simultaneously, and its second output is for controlling the operating state of the first switching tube NM1; The grid of described power MOS pipe NM0 connects first output of described control circuit Control, second pole is connected with the drain electrode of JFET Correctional tube J1, first pole and Substrate ground, second pole of described power MOS pipe NM0 is as chip output mouth, the external inductance of sheet and Schottky diode, simultaneously as the power input of self-powered circuit.
In the present embodiment, described first switching tube NM1, second switch pipe NM2 are NMOS tube, its first very source electrode, and second very drains, and described power MOS pipe NM0 is power NMOS tube, and its first very source electrode, second very drains.
Particularly, as shown in Figure 2, described high pressure self-powered circuit comprises:
The JFET Correctional tube be made up of JFET device J1, its grid and substrate electric potential are GND, and drain electrode meets the drain electrode SW of power MOS pipe NM0, and source electrode connects the drain electrode of current-limiting resistance R1 and second switch pipe NM2;
The current-limiting resistance be made up of R1, the source electrode of a termination JFET Correctional tube J1 and the drain electrode of second switch pipe NM2, the drain electrode of another termination first switching tube NM1 and the grid of NM2;
The first switching tube be made up of NM1, its grid is controlled by control circuit Control, and drain electrode connects the grid of current-limiting resistance R1 and D second switch pipe NM2, source electrode and Substrate ground GND;
The second switch pipe be made up of NM2, grid connects the drain electrode of current-limiting resistance R1 and the first switching tube NM1, and drain electrode connects the current-limiting resistance R1 other end and JFET Correctional tube J1 source electrode, and source electrode and substrate are vdd voltage, and connect the top crown of electric capacity of voltage regulation C3;
The electric capacity of voltage regulation be made up of C3, top crown is VDD, connects source electrode and the substrate of second switch pipe NM2, bottom crown ground connection GND;
By the control circuit of Control module composition, powered by VDD, modulate by system loop, its first output DRV is for controlling the operating state of power MOS pipe NM0, Control module detects vdd voltage value simultaneously, and its second output VDD_OK is for controlling the operating state of the first switching tube NM1;
The power MOS pipe NM0 be made up of NM0, its grid is controlled by the first output DRV of control circuit Control, drain as chip SW holds, the external inductance of sheet and Schottky diode, simultaneously as the power input of self-powered circuit, drain with JFET Correctional tube J1 and be connected, its source electrode and Substrate ground GND.
Generally speaking, the high pressure self-powered circuit of the present embodiment is primarily of JFET Correctional tube J1, current-limiting resistance R1, the first switching tube NM1, second switch pipe NM2, electric capacity of voltage regulation C3, control circuit Control and power MOS pipe NM0, power supply is held by power MOS pipe drain electrode SW, controlled module Control output VDD_OK controls, the vdd voltage produced exports after filter capacitor C3 voltage stabilizing, is other module for power supply of chip internal.SW terminal voltage is that busbar voltage access chip after LED and inductance step-down obtains, and modulates by power MOS pipe NM0.
Shown in the high pressure self-powered circuit operation principle of the present embodiment and the circuit diagram shown in execution mode composition graphs 2 and Fig. 3, sequential chart is described in detail.
In the T0 moment, chip powers on, and starts to start, and now inner level VDD is 0V, and because Control module is powered by VDD, therefore now its output signal DRV and VDD_OK is 0V, and now power MOS pipe NM0 and the first switching tube NM1 all turns off.Busbar voltage access chip SW after LED and inductance L 1 step-down holds, and draining with JFET Correctional tube J1 as the power supply of self-powered circuit is connected.Because power MOS pipe NM0 turns off, therefore now SW end is high level.Because the first switching tube NM1 turns off, second switch pipe NM2 grid is connected with voltage regulation resistance R1 with drain electrode, and current potential is equal, therefore second switch pipe NM2 conducting, because now vdd voltage is 0V, therefore JFET Correctional tube J1 source voltage is low level, JFET Correctional tube J1 conducting.SW is that electric capacity of voltage regulation C3 charges by JFET Correctional tube J1, second switch pipe NM2, and VDD current potential raises gradually, only reaches set point.
In the T1 moment, VDD reaches set point, and chip starts normal work.When Control module detects that outputing signal VDD_OK upset after VDD reaches set point is high level, now the first switching tube NM1 conducting, the grid voltage of second switch pipe NM2 is pulled down to GND, therefore second switch pipe NM2 turns off.Now SW cannot be that electric capacity of voltage regulation C3 charges by JFET Correctional tube J1 and second switch pipe NM2 again, and the electric charge that vdd voltage is stored by electric capacity of voltage regulation C3 maintains, and due to the consumption of chip internal module quiescent current, vdd voltage declines gradually.After chip starts normal work, Control module can detect SW voltage and inductive current, is in alternate conduction off state, and then realizes the current constant control of LED current after system loop modulation by DRV signal controlling power tube.
The T2 moment, VDD level drops to set point lower limit, after Control module detects, output signal VDD_OK upset is low level, and the first switching tube NM1 turns off, second switch pipe NM2 grid is connected by current-limiting resistance R1 with drain electrode, current potential is equal, therefore second switch pipe NM2 conducting, and SW is that electric capacity of voltage regulation C3 charges by JFET Correctional tube J1, second switch pipe NM2, VDD current potential raises gradually, until reach set point.
In the T3 moment, VDD reaches set point, and this high pressure self-powered circuit operating state is identical with the T1 moment, and therefore after system stability, circuit working state and pattern circulated in T1 to the T3 moment.
After chip starts normal work, modulate by system loop, DRV signal can control power tube alternate conduction and turn off.The power MOS pipe NM0 conducting when DRV is high level, now SW current potential is 0V; When DRV is low level, power MOS pipe NM0 turns off, and now SW is high level, possesses charging ability.Therefore Control inside modules logic setting, only have when DRV signal is low level, after detecting that VDD level drops to set point lower limit, VDD_OK signal just can overturn as low level.
The above, the high pressure self-powered circuit structure of a kind of novelty adopted for the utility model and method, by power tube drain electrode SW be circuit supply, chip eliminates VCC energization pins, therefore peripheral circuit is more simplified, save high voltage startup resistance and electric capacity of voltage regulation, system cost is low, and volume is little.Inside circuit, owing to adopting JFET as Correctional tube, eliminates clamp diode and modulation circuit, and circuit structure is simple, and reliability is high, and chip area significantly reduces, and chip cost and system cost reduce greatly.
Embodiment 2
As shown in Figure 4, the present embodiment provides a kind of high pressure self-powered circuit with current-limiting function, its basic structure is as embodiment 1, wherein, the high pressure self-powered circuit of the band current-limiting function of the present embodiment also comprises current limliting and detects resistance R2 and Current limited Control pipe NM3, the first end that described current limliting detects resistance R2 is connected with first pole of second switch pipe NM2, the grid of Current limited Control pipe NM3, and the second end is connected with vdd voltage; Second pole of described Current limited Control pipe NM3 is extremely connected with second of the first switching tube NM1 with the grid of second end of current-limiting resistance R1, second switch pipe NM2, grid is connected with the second end that current limliting detects resistance R2 with first pole of second switch pipe NM2, and the first pole is connected with vdd voltage with substrate.In the present embodiment, described Current limited Control pipe NM3 is NMOS tube, and its first very source electrode, second very drains.
Particularly, in traditional power supply circuits, because system peripherals employs starting resistance, while charging for electric capacity of voltage regulation, also serve the effect of current limliting.In the circuit structure shown in the utility model, owing to saving high voltage startup resistance, in inner level VDD uphill process, the charging current of electric capacity of voltage regulation C3 carries out current limliting by additive method, namely on above-mentioned high pressure self-powered circuit architecture basics, derived the high pressure self-powered circuit structure of band current limiting function, its circuit diagram as shown in Figure 4, comprising:
High pressure self-powered circuit basis increases the current limliting be made up of R2 and detects resistance, one end is connected with second switch pipe NM2 source electrode, Current limited Control pipe NM3 grid, and the other end is vdd terminal, and
The Current limited Control pipe be made up of NM3, its drain electrode is connected with the drain electrode of the first switching tube NM1 with the grid of current-limiting resistance R1, second switch pipe NM2, and its grid detects resistance R2 with the source electrode of NM2 with current limliting and is connected, and its source electrode and substrate are vdd terminal.
High pressure self-powered circuit operation principle and the vdd voltage control mode of the band current-limiting function of the present embodiment are similar to Example 1, below in conjunction with the two kinds of circuit vdd voltage electric current sequential chart in the course of the work without current-limiting function and band current limiting function shown in circuit diagram and Fig. 5 shown in Fig. 4, emphasis sets forth the circuit working principle of current-limiting function and control method.
The high pressure self-powered circuit without current-limiting function in embodiment 1 vdd voltage in the course of the work and charging current IVDD change oscillogram in time as shown in VDD1 and IVDD1 in Fig. 5:
The T0 moment is chip initial state, and now chip not yet works, and vdd voltage is zero, charging current IVDD is zero.
In the T1 moment, chip is started working, and vdd voltage starts to raise, and specific works principle as described in Example 1, repeats no more.Now because vdd voltage is lower, JFET Correctional tube J1 source voltage is lower, and now IVDD charging current is very large, and vdd voltage rises fast.Along with vdd voltage raises gradually, JFET Correctional tube J1 source voltage raises gradually, and charging current IVDD declines gradually.Now the vdd voltage rate of rise reduces gradually.
In the T2 moment, vdd voltage reaches set point, and second switch pipe NM2 turns off afterwards, and charging current IVDD reduces to zero.In vdd voltage uphill process, charging current IVDD raises with vdd voltage and reduces, and by second switch pipe NM2 and JFET Correctional tube J1 technique and equipment parameters affect, but owing to not having current-limiting circuit, concrete current value is difficult to control.
The high pressure self-powered circuit of the band current-limiting function of the present embodiment vdd voltage in the course of the work and charging current IVDD change oscillogram in time as shown in VDD2 and IVDD2 in Fig. 5:
The T0 moment is chip initial state, and now chip not yet works, and vdd voltage is zero, charging current IVDD is zero.
The T1 moment, chip is started working, control signal VDD_OK upset is low level, and now because charging current IVDD is zero, the pressure drop that current limliting detects on resistance R2 is zero, Current limited Control pipe NM3 turns off, the grid voltage of second switch pipe NM2 is drawn high by current-limiting resistance R1, second switch pipe NM2 conducting, and charging current IVDD increases, and start as electric capacity of voltage regulation C3 charges, vdd voltage raises gradually.Along with charging current IVDD increases, the pressure drop that current limliting detects on resistance R2 increases gradually, and namely the gate source voltage of Current limited Control pipe NM3 increases.After charging current IVDD increases to a certain current value, the pressure drop that current limliting detects on resistance R2 can cause Current limited Control pipe NM3 conducting, and second switch pipe NM2 grid voltage is dragged down, the gate source voltage of second switch pipe NM2 reduces, charging current no longer increases, and IVDD electric current is now the cut-off current of charging current.Now in circuit, current-limiting resistance R1, current limliting detect resistance R2, second switch pipe NM2 and Current limited Control pipe NM3 and form negative-feedback circuit, system loop controls charge current stabilizes on cut-off current, and with this continuing current flow for VDD electric capacity of voltage regulation C3 charges, vdd voltage linearly raises.The cut-off current of charging current is determined by the gate source voltage of Current limited Control pipe NM3 and the resistance of current limliting detection resistance R2, that is:
I
VDD＝V
GS_NM3/R2，
It can thus be appreciated that, regulate current limliting to detect the resistance of resistance R2, the cut-off current of charging current can be set easily.
In the T3 moment, vdd voltage reaches set point, and control signal VDD_OK upset is high level, and second switch pipe NM2 grid voltage also drags down by the first switching tube NM1 conducting, and second switch pipe NM2 turns off, and charging current IVDD reduces to zero.
In this circuit, because in vdd voltage process of establishing, charging current is restricted, therefore charging current can keep constant, and vdd voltage linearly rises, and effectively prevent the overshoot phenomenon in power up and the excessive damage caused device of electric current.
As mentioned above, the utility model provides a kind of high pressure self-powered circuit, described high pressure self-powered circuit comprises: JFET Correctional tube J1, current-limiting resistance R1, the first switching tube NM1, second switch pipe NM2, electric capacity of voltage regulation C3, control circuit Control and power MOS pipe NM0, wherein: the grid of described JFET Correctional tube J1 and Substrate ground, drain electrode connects second pole of power MOS pipe NM0, and source electrode connects the first end of current-limiting resistance R1 and second pole of second switch pipe NM2; Second pole of the second termination first switching tube NM1 of described current-limiting resistance R1 and the grid of second switch pipe NM2; The grid of described first switching tube NM1 is controlled by control circuit Control, the first pole and Substrate ground; Second pole of described second switch pipe NM2 and substrate for connecing vdd voltage, and connect first pole plate of electric capacity of voltage regulation C3; The second pole plate ground connection of described electric capacity of voltage regulation C3; Described control circuit Control is powered by VDD, and modulate by system loop, its first output is for controlling the operating state of power MOS pipe NM0, and described control circuit Control detects vdd voltage value simultaneously, and its second output is for controlling the operating state of the first switching tube NM1; The grid of described power MOS pipe NM0 connects first output of described control circuit Control, second pole is connected with the drain electrode of JFET Correctional tube J1, first pole and Substrate ground, second pole of described power MOS pipe NM0 is as chip output mouth, the external inductance of sheet and Schottky diode, simultaneously as the power input of self-powered circuit.The utility model is compared with traditional high-voltage power supply circuit, and have employed a kind of high pressure self-powered circuit structure and method of novelty, chip eliminates VCC energization pins, peripheral circuit is more simplified, save high voltage startup resistance and electric capacity of voltage regulation, system cost is low, and volume is little.Inside circuit eliminates clamp diode and modulation circuit, and circuit structure is simple, and reliability is high, and chip area significantly reduces, and chip cost and system cost reduce greatly.Further, with the high pressure self-powered circuit of current limiting function, in system process of establishing, charging current is restricted, and current value can keep constant, vdd voltage linearly rises, and effectively prevent the overshoot phenomenon in power up and the excessive damage caused device of electric current.So the utility model effectively overcomes various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present utility model and effect thereof only, but not for limiting the utility model.Any person skilled in the art scholar all without prejudice under spirit of the present utility model and category, can modify above-described embodiment or changes.Therefore, such as have in art and usually know that the knowledgeable modifies or changes not departing from all equivalences completed under the spirit and technological thought that the utility model discloses, must be contained by claim of the present utility model.
Claims (6)
1. a high pressure self-powered circuit, is characterized in that, described high pressure self-powered circuit comprises: JFET Correctional tube, current-limiting resistance, the first switching tube, second switch pipe, electric capacity of voltage regulation, control circuit and power MOS pipe, wherein:
The grid of described JFET Correctional tube and Substrate ground, drain electrode connects the second pole of power MOS pipe, and source electrode connects the first end of current-limiting resistance and the second pole of second switch pipe; Second pole of the second termination first switching tube of described current-limiting resistance and the grid of second switch pipe; The grid of described first switching tube is controlled by control circuit, the first pole and Substrate ground; Second pole of described second switch pipe and substrate for connecing vdd voltage, and connect the first pole plate of electric capacity of voltage regulation; Second pole plate ground connection of described electric capacity of voltage regulation; Described control circuit is powered by VDD, and modulates by system loop, and its first output is for controlling the operating state of power MOS pipe, and described control circuit detects vdd voltage value simultaneously, and its second output is for controlling the operating state of the first switching tube; The grid of described power MOS pipe connects the first output of described control circuit, and the second pole is connected with the drain electrode of JFET Correctional tube, the first pole and Substrate ground.
2. high pressure self-powered circuit according to claim 1, is characterized in that: the second pole of described power MOS pipe is as chip output mouth, and the external inductance of sheet and Schottky diode, simultaneously as the power input of self-powered circuit.
3. high pressure self-powered circuit according to claim 1, is characterized in that: described first switching tube, second switch pipe are NMOS tube, and its first very source electrode, second very drains.
4. high pressure self-powered circuit according to claim 1, is characterized in that: described power MOS pipe is power NMOS tube, and its first very source electrode, second very drains.
5. high pressure self-powered circuit according to claim 1, it is characterized in that, also comprise current limliting and detect resistance and Current limited Control pipe, wherein: the first end that described current limliting detects resistance is connected with the first pole of second switch pipe, the grid of Current limited Control pipe, and the second end is connected with vdd voltage; Second pole of described Current limited Control pipe is extremely connected with second of the first switching tube with the grid of the second end of current-limiting resistance, second switch pipe, grid is connected with the second end that current limliting detects resistance with the first pole of second switch pipe, and the first pole is connected with vdd voltage with substrate.
6. high pressure self-powered circuit according to claim 5, is characterized in that: described Current limited Control pipe is NMOS tube, and its first very source electrode, second very drains.
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| CN201520460745.6U CN204696946U (en) | 2015-06-30 | 2015-06-30 | High pressure self-powered circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105656294A (en) * | 2016-03-26 | 2016-06-08 | 泰州亚芯微电子科技有限公司 | Step-down circuit in medium voltage and high voltage integrated circuit |
| CN105932890A (en) * | 2016-07-06 | 2016-09-07 | 电子科技大学 | Self-powered circuit applied to switching circuit |
| CN106300962A (en) * | 2016-08-08 | 2017-01-04 | 杰华特微电子（杭州）有限公司 | A kind of self-powered control circuit |
| CN106329959A (en) * | 2015-06-30 | 2017-01-11 | 华润矽威科技（上海）有限公司 | High-voltage self-powered circuit |
| CN106655747A (en) * | 2016-11-22 | 2017-05-10 | 上海晶丰明源半导体股份有限公司 | Power supply circuit, switching power supply system and power supply method of switching power supply system |
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2015
- 2015-06-30 CN CN201520460745.6U patent/CN204696946U/en not_active Withdrawn - After Issue
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| CN106329959A (en) * | 2015-06-30 | 2017-01-11 | 华润矽威科技（上海）有限公司 | High-voltage self-powered circuit |
| CN106329959B (en) * | 2015-06-30 | 2019-04-26 | 华润矽威科技（上海）有限公司 | High pressure self-powered circuit |
| CN105656294A (en) * | 2016-03-26 | 2016-06-08 | 泰州亚芯微电子科技有限公司 | Step-down circuit in medium voltage and high voltage integrated circuit |
| CN105932890A (en) * | 2016-07-06 | 2016-09-07 | 电子科技大学 | Self-powered circuit applied to switching circuit |
| CN105932890B (en) * | 2016-07-06 | 2018-06-19 | 电子科技大学 | A kind of self-powered circuit for switching circuit |
| CN106300962A (en) * | 2016-08-08 | 2017-01-04 | 杰华特微电子（杭州）有限公司 | A kind of self-powered control circuit |
| CN106300962B (en) * | 2016-08-08 | 2019-06-11 | 杰华特微电子（杭州）有限公司 | A kind of self-powered control circuit |
| CN106655747A (en) * | 2016-11-22 | 2017-05-10 | 上海晶丰明源半导体股份有限公司 | Power supply circuit, switching power supply system and power supply method of switching power supply system |
| CN106655747B (en) * | 2016-11-22 | 2024-03-08 | 上海晶丰明源半导体股份有限公司 | Power supply circuit, switching power supply system and power supply method thereof |
| CN108124344A (en) * | 2016-11-30 | 2018-06-05 | 无锡华润矽科微电子有限公司 | Constant current led drive circuit |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20151007 Effective date of abandoning: 20190426 |
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| AV01 | Patent right actively abandoned |