CN203933647U - Signal magnitude detector and comprise the wireless receiver of this signal magnitude detector - Google Patents
Signal magnitude detector and comprise the wireless receiver of this signal magnitude detector Download PDFInfo
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- CN203933647U CN203933647U CN201420358554.4U CN201420358554U CN203933647U CN 203933647 U CN203933647 U CN 203933647U CN 201420358554 U CN201420358554 U CN 201420358554U CN 203933647 U CN203933647 U CN 203933647U
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Abstract
The utility model provides a kind of signal magnitude detector and comprises the wireless receiver of this signal magnitude detector, and signal magnitude detector comprises the first MOS transistor, the second MOS transistor, the 3rd MOS transistor, the 4th MOS transistor, resistance R 1 and capacitor C 1.The first link of the first MOS transistor, the second MOS transistor, the 3rd MOS transistor and the 4th MOS transistor is all connected with the first power end; The second link interconnection of the first MOS transistor, the second MOS transistor, the 3rd MOS transistor, the 4th MOS transistor, its interconnective node is interconnecting nodes; Resistance R 1 is connected between interconnecting nodes and second source end, and capacitor C 1 is connected between interconnecting nodes and second source end, and interconnecting nodes is connected with the output of signal magnitude detector.Compared with prior art, the utility model can I signal and Q signal based on obtaining after receiver demodulation carry out amplitude detection, with the amplitude detection signal of the orthogonal signalling energy that obtains more accurately reflecting that wireless receiver obtains, thereby adjust more accurately the gain of receiver.
Description
[technical field]
The utility model relates to wireless transmission and reception technique field, particularly signal magnitude detector and comprise the wireless receiver of this signal magnitude detector.
[background technology]
Signal amplitude detection in wireless receiver (or radio receiver) is mainly used in regulating the gain of radio receiver, and when the reception signal energy that receives being detected hour, receiver can be heightened gain accordingly; On the contrary, when the reception signal energy receiving if detect increases, receiver can reduce gain accordingly, like this, just can guarantee to enter the amplitude substantially constant of the signal of ADC (Analog-to-Digital Converter, analog to digital converter), thereby guarantee the optimization of received signal to noise ratio.
Wireless receiver is carrying out before amplitude detection to received signal, can first carry out to received signal demodulation, conventionally receives signal and can be demodulated into pair of orthogonal signal (I, Q).In prior art, the signal amplitude detection of radio receiver is at I signal (in-phase signal, homophase) and Q (Quadrature signal, orthogonal signalling) in signal, select a road signal to carry out amplitude detection, and output amplitude detection signal, the gain based on this amplitude detection Signal Regulation wireless receiver.But existing sort signal amplitude detection mode can not record the signal amplitude of orthogonal signalling very accurately, can cause like this gain of receiver to adjust inaccuracy.
Therefore, be necessary to provide a kind of improved technical scheme to overcome the problems referred to above.
[utility model content]
The wireless receiver that the purpose of this utility model is to provide a kind of signal magnitude detector and comprises this signal magnitude detector, it can obtain an amplitude detection signal that more accurately reflects the energy of the orthogonal signalling that wireless receiver obtains.
In order to address the above problem, according to an aspect of the present utility model, the utility model provides the signal magnitude detector in a kind of wireless receiver, and it comprises the first MOS transistor, the second MOS transistor, the 3rd MOS transistor, the 4th MOS transistor, resistance R 1 and capacitor C 1.The first link of the first MOS transistor, the second MOS transistor, the 3rd MOS transistor and the 4th MOS transistor is all connected with the first power end; The second link interconnection of the first MOS transistor, the second MOS transistor, the 3rd MOS transistor, the 4th MOS transistor, its interconnective node is interconnecting nodes; Resistance R 1 is connected between interconnecting nodes and second source end, and capacitor C 1 is connected between interconnecting nodes and second source end, and interconnecting nodes is connected with the output of described signal magnitude detector.
Further, a pair of differential signal that the grid of the grid of the first MOS transistor and the second MOS transistor generates to receive the I signal that obtains based on described wireless receiver as a pair of input of described signal magnitude detector; The grid of the grid of the 3rd MOS transistor and the 4th MOS transistor as described signal magnitude detector another to input with receive that the Q signal obtain based on described wireless receiver generates another to differential signal.
Further, phase phasic difference 180 degree between a pair of differential signal that the described I signal obtaining based on described wireless receiver generates; Another of the described Q signal generation obtaining based on described wireless receiver is to phase phasic difference 180 degree between differential signal.
Further, described MOS transistor is nmos pass transistor, and described the first link is drain electrode, and described the second link is source electrode.
Further see that described MOS transistor is PMOS transistor, described the first link is source electrode, and described the second link is drain electrode.
Further, the mean value of the amplitude detection signal of the output of signal magnitude detector output or DC component are the I signal that obtains of described wireless receiver and the signal amplitude of Q signal.
According to another aspect of the present utility model, the utility model provides a kind of wireless receiver, and it comprises: the antenna of received RF signal, to antenna reception to the radiofrequency signal gain amplifier that gains and amplify, the first frequency mixer, it obtains I signal by the first local clock and the radiofrequency signal mixing of amplifying through gain, the second frequency mixer, it obtains Q signal by the second local clock and the radiofrequency signal mixing of amplifying through gain, and wherein the first local clock is spent with the phase phasic difference 90 of the second local clock, the first low pass filter, carries out low-pass filtering for the I signal that mixing is obtained, the second low pass filter, carries out low-pass filtering for the Q signal that mixing is obtained, signal magnitude detector, the grid of the grid of the first MOS transistor and the second MOS transistor is as a pair of input a pair of differential signal that the I signal based on after low-pass filtering generates with reception of signal magnitude detector, the grid of the grid of the 3rd MOS transistor and the 4th MOS transistor as another of signal magnitude detector, input is generated with the Q signal receiving based on after low-pass filtering another to differential signal, based on described signal magnitude detector, detect the gain that the amplitude detection signal obtaining is adjusted described gain amplifier, so that detecting the amplitude detection signal obtaining, signal magnitude detector falls into predetermined amplitude range.
Compared with prior art, the utility model can I signal and Q signal based on obtaining after receiver demodulation carry out amplitude detection, with the amplitude detection signal of the orthogonal signalling energy that obtains more accurately reflecting that wireless receiver obtains, thereby can adjust more accurately the gain of receiver.
[accompanying drawing explanation]
In order to be illustrated more clearly in the technical scheme of the utility model embodiment, below the accompanying drawing of required use during embodiment is described is briefly described, apparently, accompanying drawing in the following describes is only embodiment more of the present utility model, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.Wherein:
Fig. 1 is the circuit diagram of the signal magnitude detector in wireless receiver in prior art;
Fig. 2 is first input end and the differential signal of the second input reception and the oscillogram of the amplitude detection signal that output is exported in Fig. 1;
Fig. 3 is the circuit diagram of the signal magnitude detector in the utility model wireless receiver in one embodiment;
Fig. 4 is the oscillogram of the amplitude detection signal of the signal A, the B that receive of four inputs of the signal magnitude detector in Fig. 3, C, D and output output.
[embodiment]
For above-mentioned purpose of the present utility model, feature and advantage can be become apparent more, below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.
Alleged " embodiment " or " embodiment " refers to special characteristic, structure or the characteristic that can be contained at least one implementation of the utility model herein.Different local in this manual " in one embodiment " that occur not all refer to same embodiment, neither be independent or the embodiment mutually exclusive with other embodiment optionally.Unless stated otherwise, the word that connection herein, the expression that is connected, joins are electrically connected all represents to be directly or indirectly electrical connected.Connection in literary composition, join, the word such as series connection can be understood as indirectly or directly and connects and join, connect.
Please refer to shown in Fig. 1, it is for realizing the circuit diagram of the signal magnitude detector of signal amplitude detection in wireless receiver in prior art, this signal magnitude detector comprises a NMOS (N-channel MetalOxide Semiconductor) transistor M1 ', the second nmos pass transistor M2 ', capacitor C 1 ' and resistance R 1 '.Wherein, the drain electrode of the drain electrode of the first nmos pass transistor M1 ' and the second nmos pass transistor M2 ' is all connected with the first power end VDD; The source electrode interconnection of the source electrode of the first nmos pass transistor M1 ' and the second nmos pass transistor M2 ', this node is called as interconnecting nodes; Resistance R 1 ' is connected between interconnecting nodes and ground node GND; Capacitor C 1 ' is connected between described interconnecting nodes and ground node GND, the grid of the first nmos pass transistor M1 ' is the first input end of this signal magnitude detector, the grid of the second nmos pass transistor M2 ' is the second input of this signal magnitude detector, and interconnecting nodes is connected in the output VO ' of this signal magnitude detector.
This signal magnitude detector is carried out signal amplitude detection for wireless receiver quadrature demodulation being received to I signal or the Q signal of the orthogonal signalling that obtain after signal.In one embodiment, can carry out signal amplitude detection to I signal, now first need to produce a pair of differential signal based on I signal, this is to phase phasic difference 180 degree between differential signal, as differential signal A ' and the B ' in Fig. 2.In one embodiment, I signal is through forming a pair of equal and opposite in direction and opposite polarity differential signal after phase inverter and buffer, wherein a road differential signal A ' is connected with the grid of the first nmos pass transistor M1 ', another road differential signal B ' is connected with the grid of the second nmos pass transistor M2 ', output VO ' the output amplitude detection signal of this signal magnitude detector.Please refer to shown in Fig. 2, it is the oscillogram of the amplitude detection signal of the first input end of the signal magnitude detector in Fig. 1 and the differential signal A ' of the second input reception and B ' and output VO ' output.The mean value of this amplitude detection signal VO ' or DC (direct current, direct current) component are corresponding is the energy of the orthogonal signalling that obtain of wireless receiver.But this amplitude detection signal is except the DC component of needs, and the ripple on it is 2 frequency-doubled signals that amplitude is very high, this can affect the precision that amplitude detection signal reflects the energy of the orthogonal signalling that wireless receiver obtains.
The utility model improves the circuit structure of the signal magnitude detector in Fig. 1, so that the signal magnitude detector in the utility model can be carried out signal amplitude detection based on I signal and Q signal, thereby make the amplitude detection signal of its generation can reflect more accurately the energy of orthogonal signalling I and Q.
Please refer to shown in Fig. 3, it is the circuit diagram of the signal magnitude detector in the utility model wireless receiver in one embodiment.This signal magnitude detector comprises the first MOS transistor M1, the second MOS transistor M2, the 3rd MOS transistor M3, the 4th MOS transistor M4, resistance R 1 and capacitor C 1.Wherein, the first link of the first MOS transistor M1, the second MOS transistor M2, the 3rd MOS transistor M3 and the 4th MOS transistor M4 is all connected with the first power end VDD; The second link interconnection of the first MOS transistor M1, the second MOS transistor M2, the 3rd MOS transistor M3, the 4th MOS transistor M4, its interconnective node is interconnecting nodes; Resistance R 1 is connected between interconnecting nodes and ground node GND (or being called second source end), and capacitor C 1 is connected between interconnecting nodes and ground node GND, and interconnecting nodes is connected with the output VO of this signal magnitude detector.
In the embodiment shown in fig. 3, MOS transistor is all nmos pass transistor, and its first link is drain electrode, and the second link is source electrode.The grid of the grid of the first nmos pass transistor M1 and the second nmos pass transistor M2 as a pair of input of signal magnitude detector to receive a pair of differential signal A and the B generating based on I signal, the grid of the grid of the 3rd nmos pass transistor M3 and the 4th nmos pass transistor M4 as signal magnitude detector another to input with receive based on Q signal, generate another to differential signal C and D, like this, signal A, B, C, D differs and is respectively 0 °, 180 °, 90 °, 270 °, output VO output amplitude detection signal, please refer to shown in Fig. 4, it is the signal A of the input signal amplitude detector in Fig. 3, B, C, the oscillogram of the amplitude detection signal of D and output VO output.The mean value of this amplitude detection signal or DC component are corresponding to the amplitude I2+Q2 of orthogonal signalling (I, Q), and the ripple on the amplitude detection signal simultaneously obtaining is 4 times of frequencies, the amplitude of its amplitude during much smaller than 2 frequency multiplication amplitude detection signal in Fig. 2.Like this, by detect I signal and Q signal simultaneously, just can obtain the amplitude detection signal cleaner compared with the amplitude detection signal in Fig. 2, the amplitude detection signal in Fig. 4 can reflect the orthogonal signalling energy that wireless receiver obtains more accurately.Nmos pass transistor M1, M2, M3 and M4 in Fig. 3 used as source class follower, can obtain at output VO the mean value of signal A, B, C, D like this, and resistance R 1 and capacitor C 1 form a low pass filter, thereby filters out the harmonic wave of 4 overtones bands.
It should be noted that, four metal-oxide-semiconductors in Fig. 3 can be also all PMOS transistor, and wherein, the first link of MOS transistor is source electrode, and the second link is drain electrode.
According to another aspect of the present utility model, the utility model also provides a kind of wireless receiver, and it comprises: the antenna of received RF signal, to antenna reception to radiofrequency signal gain amplifier, the first frequency mixer, the second frequency mixer, the first low pass filter, the second low pass filter, the signal magnitude detector of carrying out adjustable gain amplification.The first frequency mixer obtains I signal based on the first local clock and the radiofrequency signal of amplifying through gain, the second frequency mixer obtains Q signal based on the second local clock and the radiofrequency signal of amplifying through gain, the first local clock and the second local clock phase phasic difference 90 degree.The first low pass filter carries out low-pass filtering for the I signal that mixing is obtained, and the second low pass filter carries out low-pass filtering for the Q signal that mixing is obtained.Described signal magnitude detector can be the structure shown in Fig. 3, the a pair of differential signal that wherein grid of the grid of the first MOS transistor M1 and the second MOS transistor M2 generates with the I signal receiving based on after low-pass filtering as a pair of input of signal magnitude detector, the grid of the grid of the 3rd MOS transistor M3 and the 4th MOS transistor M4 as another of signal magnitude detector, input is generated with the Q signal receiving based on after low-pass filtering another to differential signal.Based on described signal magnitude detector, detect the gain that the amplitude detection signal obtaining is adjusted described gain amplifier, so that signal magnitude detector detects the amplitude detection signal obtaining, fall into predetermined amplitude range.
In sum, signal magnitude detector in the utility model is carried out amplitude detection to the I signal based on obtaining after demodulation and Q signal simultaneously, just can obtain more accurately reflecting the amplitude detection signal of energy of the orthogonal signalling of output, thereby can adjust more accurately the gain of the gain amplifier of receiver.
It is pointed out that being familiar with any change that person skilled in art does embodiment of the present utility model does not all depart from the scope of claims of the present utility model.Correspondingly, the scope of claim of the present utility model is also not limited only to previous embodiment.
Claims (7)
1. the signal magnitude detector in wireless receiver, is characterized in that, it comprises the first MOS transistor, the second MOS transistor, the 3rd MOS transistor, the 4th MOS transistor, resistance R 1 and capacitor C 1,
The first link of the first MOS transistor, the second MOS transistor, the 3rd MOS transistor and the 4th MOS transistor is all connected with the first power end; The second link interconnection of the first MOS transistor, the second MOS transistor, the 3rd MOS transistor, the 4th MOS transistor, its interconnective node is interconnecting nodes; Resistance R 1 is connected between interconnecting nodes and second source end, and capacitor C 1 is connected between interconnecting nodes and second source end, and interconnecting nodes is connected with the output of described signal magnitude detector.
2. signal magnitude detector according to claim 1, it is characterized in that a pair of differential signal that the grid of the grid of the first MOS transistor and the second MOS transistor generates to receive the I signal that obtains based on described wireless receiver as a pair of input of described signal magnitude detector; The grid of the grid of the 3rd MOS transistor and the 4th MOS transistor as described signal magnitude detector another to input with receive that the Q signal obtain based on described wireless receiver generates another to differential signal.
3. signal magnitude detector according to claim 2, is characterized in that, phase phasic difference 180 degree between a pair of differential signal that the described I signal obtaining based on described wireless receiver generates; Another of the described Q signal generation obtaining based on described wireless receiver is to phase phasic difference 180 degree between differential signal.
4. signal magnitude detector according to claim 1, is characterized in that, described MOS transistor is nmos pass transistor, and described the first link is drain electrode, and described the second link is source electrode.
5. signal magnitude detector according to claim 1, is characterized in that, described MOS transistor is PMOS transistor, and described the first link is source electrode, and described the second link is drain electrode.
6. signal magnitude detector according to claim 1, is characterized in that, the mean value of the amplitude detection signal of the output of signal magnitude detector output or DC component are the I signal that obtains of described wireless receiver and the signal amplitude of Q signal.
7. a wireless receiver, is characterized in that, it comprises:
The antenna of received RF signal;
To antenna reception to the radiofrequency signal gain amplifier that gains and amplify;
The first frequency mixer, it obtains I signal by the first local clock and the radiofrequency signal mixing of amplifying through gain;
The second frequency mixer, it obtains Q signal by the second local clock and the radiofrequency signal mixing of amplifying through gain, and wherein the first local clock is spent with the phase phasic difference 90 of the second local clock;
The first low pass filter, carries out low-pass filtering for the I signal that mixing is obtained;
The second low pass filter, carries out low-pass filtering for the Q signal that mixing is obtained;
Signal magnitude detector as described in as arbitrary in claim 2-6, the grid of the grid of the first MOS transistor and the second MOS transistor is as a pair of input a pair of differential signal that the I signal based on after low-pass filtering generates with reception of signal magnitude detector, the grid of the grid of the 3rd MOS transistor and the 4th MOS transistor as another of signal magnitude detector, input is generated with the Q signal receiving based on after low-pass filtering another to differential signal, based on described signal magnitude detector, detect the gain that the amplitude detection signal obtaining is adjusted described gain amplifier, so that detecting the amplitude detection signal obtaining, signal magnitude detector falls into predetermined amplitude range.
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| CN201420358554.4U CN203933647U (en) | 2014-06-30 | 2014-06-30 | Signal magnitude detector and comprise the wireless receiver of this signal magnitude detector |
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| CN201420358554.4U CN203933647U (en) | 2014-06-30 | 2014-06-30 | Signal magnitude detector and comprise the wireless receiver of this signal magnitude detector |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104065428A (en) * | 2014-06-30 | 2014-09-24 | 无锡中星微电子有限公司 | Signal amplitude detector and wireless receiver comprising the same |
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- 2014-06-30 CN CN201420358554.4U patent/CN203933647U/en not_active Withdrawn - After Issue
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104065428A (en) * | 2014-06-30 | 2014-09-24 | 无锡中星微电子有限公司 | Signal amplitude detector and wireless receiver comprising the same |
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| CP03 | Change of name, title or address |
Address after: 214028 Jiangsu Province, Wuxi City District Qingyuan Road No. 18 Taihu International Science Park sensor network university science and Technology Park 530 building A1001 Patentee after: WUXI ZHONGGAN MICROELECTRONIC CO., LTD. Address before: A 530 Taihu international science and Technology Park building 214028 Qingyuan Road in Jiangsu province Wuxi City District 10 layer Patentee before: Wuxi Vimicro Co., Ltd. |
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| AV01 | Patent right actively abandoned |
Granted publication date: 20141105 Effective date of abandoning: 20160330 |
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| C25 | Abandonment of patent right or utility model to avoid double patenting |