CN103457623A - Zero intermediate frequency direct current compensation circuit and method - Google Patents
Zero intermediate frequency direct current compensation circuit and method Download PDFInfo
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- CN103457623A CN103457623A CN2013103551887A CN201310355188A CN103457623A CN 103457623 A CN103457623 A CN 103457623A CN 2013103551887 A CN2013103551887 A CN 2013103551887A CN 201310355188 A CN201310355188 A CN 201310355188A CN 103457623 A CN103457623 A CN 103457623A
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Abstract
The invention belongs to the technical field of analog signal processing, and particularly relates to a circuit and method which can conduct direct current compensation on the intermediate frequency end of a zero intermediate frequency receiver to remove direct current components generated during frequency mixing in real time. According to the zero intermediate frequency direct current compensation circuit and method, only alternating current components are left in intermediate frequency signals by removing the direct current components generated by continuous wave frequency conversion in real time, accordingly, sufficient gain can be provided, and the zero intermediate frequency signals are amplified to be within a scope suitable for A/D converter collection.
Description
Technical field
The invention belongs to the analog signal processing technology field, be specifically related to a kind ofly zero intermediate frequency reciver is carried out to direct current at the intermediate frequency end offset, the circuit of the DC component produced while removing mixing in real time and method.
Background technology
The basic functional principle of zero intermediate frequency reciver is: radiofrequency signal and the local oscillator identical with its carrier frequency to zero intermediate frequency, then extract the useful signal in zero intermediate frequency signals through amplification and low-pass filtering through a down-conversion Direct Conversion.
With traditional superheterodyne receiver, compare, the radiofrequency signal of zero intermediate frequency reciver does not have image frequency, does not need image-reject filter.Fundamental frequency signal after frequency conversion is at low frequency (generally lower than 10kHz), and amplifying circuit uses common operational amplifier to get final product, and the design of filter is also simpler, and the precision of ADC and the requirement of sample rate are also decreased.Greatly reduce like this requirement of Receiver Design, volume and power consumption also significantly reduce simultaneously.
Outside these advantages, there is a problem that must solve in zero intermediate frequency reciver.In the process of down-conversion, if radiofrequency signal is identical with the frequency of local oscillator, directly be converted to direct current.The signal that the zero intermediate frequency reciver frequency conversion produces is the stack of the entrained useful signal of DC component and radiofrequency signal (alternating current component of vanishing intermediate frequency after down-conversion), and these DC component can make amplifying circuit saturated, cause useful signal to be exaggerated.Therefore, the elimination of DC component is the key of zero intermediate frequency reciver.
The main source of DC component problem comprises: the target reflection echo that receiver receives, local oscillator leakage and local oscillator are at the Multi reflection of mixer, with band interference signal etc.
At present main direct current cancellation techniques comprise that radio frequency offsets, digital canceller, AC coupled etc.It is to introduce a road extra at receive path that radio frequency offsets, and its phase place is contrary with the space leakage signal, and amplitude is substantially equal, when 2 signals are superimposed, makes leakage signal power reduce.Digital canceller is to gather intermediate-freuqncy signal with ADC, and the DC component of intermediate frequency is added up, and obtains deducting corresponding DC component after DC component.AC coupled is to add capacitance at the intermediate frequency end to remove direct current.Radio frequency offsets the radio-frequency component that needs to consider multiple source, complex structure.Digital canceller needs before the ADC image data to consider that DC component amplifies saturated problem, and enough gains can't be provided.Interchange has offseted significant limitation, is only applicable to the intermediate-freuqncy signal frequency higher, because the characteristic of electric capacity is " resistance direct current, the logical interchange ", direct current signal can't pass through capacitance, and the useful signal frequency is lower, larger by the loss of signal after capacitance.
Summary of the invention
Deficiency for background technology, the invention provides and a kind ofly at the intermediate frequency end, carry out method and the circuit that direct current offsets, eliminate in real time the DC component produced after the continuous wave frequency conversion, make only surplus alternating current component of intermediate-freuqncy signal, thereby enough gains can be provided, zero intermediate frequency signals is amplified to and is applicable to the scope that A/D converter gathers.
Technical scheme of the present invention is:
A kind of method that zero intermediate frequency direct current offsets, its feature comprises the steps:
Step 1: will receive signal frequency conversion to zero intermediate frequency;
Step 2: zero intermediate frequency signals is raised level through adder, then merit is divided into two-way, one tunnel detects DC component through effective value converter and delivers to differential amplifier, differential amplifier is directly delivered on another road, two paths of signals is exported difference through differential amplifier, obtains the zero intermediate frequency signals after the cancellation DC component.
The method that zero intermediate frequency direct current as above offsets is characterized in that: in described step 2, the concrete grammar of adder is: setting up adder circuit based on operational amplifier, is the DC component of zero intermediate frequency signals increase 0.7V.Its beneficial effect is: avoid zero intermediate frequency signals negative voltage to occur.
The method that zero intermediate frequency direct current as above offsets, it is characterized in that: in described step 2, the concrete grammar of differential amplifier is: use operational amplifier to set up differential amplifier, the employing precision resister is built the balanced bridge of differential amplifier to reduce error, and multiplication factor is 1.
The circuit that a kind of zero intermediate frequency direct current offsets, comprise voltage follower I, adder, voltage follower II, voltage follower III, RMS-DC converter circuit, differential amplifier.Zero intermediate frequency signals following by inputting voltages device I.The input of adder is connected with the output of voltage follower I, and output is connected with the voltage follower III with the voltage follower II.The output of voltage follower II is connected with the in-phase input end of differential amplifier.The output of voltage follower III is connected with the input of RMS-DC converter circuit, and the output of RMS-DC converter circuit is connected with the inverting input of differential amplifier.
The invention has the beneficial effects as follows: eliminate in real time all DC component that produce after down-conversion, make only surplus alternating current component of zero intermediate frequency signals, the alternating current component that can be zero intermediate frequency signals by post-amplifier like this provides enough gains, amplifier saturation while avoiding DC component to cause amplifying.
The accompanying drawing explanation
Fig. 1 is the theory diagram that zero intermediate frequency direct current of the present invention offsets;
Fig. 2 is application continuous-wave radar system composition frame chart of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is further described in detail.
Be illustrated in figure 1 the theory diagram of zero intermediate frequency direct current cancellation techniques of the present invention.The direct following by inputting voltages device of the zero intermediate frequency signals produced after down-conversion I, then raise the about 0.7V of level of zero intermediate frequency by adder, merit is divided into two-way again, and differential amplifier is directly delivered on a road, and another road is delivered to effective value converter and converted direct current to and deliver to differential amplifier.Two paths of signals carries out subtraction through differential amplifier, obtains the alternating current component of zero intermediate frequency signals, i.e. useful signal.
The input of voltage follower I directly connects the medium frequency output end mouth of down-conversion mixer, because the input impedance of voltage follower can be considered infinitely great, can make the intermediate frequency end output signal of frequency mixer at utmost transfer to rear class.
The input of adder connects the output of voltage follower I, and its effect is for zero intermediate frequency signals adds a DC component, raises the zero intermediate frequency signals level, avoids zero intermediate frequency signals negative voltage to occur.According to test, during the about 0.7V of voltage effective value, the precision of effective value converter is the highest, so DC component is got about 0.7V.
After adder, signal is divided into two-way, and each is cushioned through a voltage follower, and such benefit is to reduce influencing each other between two paths of signals.One road signal after the voltage follower II, through effective value converter, the input difference amplifier.Another road signal after the voltage follower III, direct input difference amplifier.
Effective value converter is used for changing out the effective value of signal.For sinusoidal wave and DC stacked signal, while there is no negative voltage, the effective value of signal equals the magnitude of voltage of direct current.Therefore, the magnitude of voltage of effective value converter output is the DC component of zero intermediate frequency signals.The present invention program selects LTC1966, and its transformed error is lower than 0.25%,
Use operational amplifier to set up differential amplifier circuit, its balanced bridge adopts precision resister (being not less than 1% precision) to reduce error.Multiplication factor is set to 1, and such benefit is that each resistance value that balanced bridge is used equates, is easy to coupling.
After differential amplifier, what output signal was two paths of signals is poor.Due to effective value converter output be the DC component on another road, through differential amplifier, output do not contain the intermediate-freuqncy signal of DC component.
A kind of zero intermediate frequency direct current cancellation techniques, be applicable to the zero intermediate frequency radar system that needs are removed the DC component of down-conversion generation.
Be illustrated in figure 2 the continuous-wave radar system composition frame chart of application direct current cancellation techniques of the present invention, formed by transmitting antenna, reception antenna, frequency synthesizer, receiver, signal processing, monitor terminal.Frequency synthesizer provides rf excitation signal by transmission antennas transmit, and is coupled out a road signal delivers to receiver as local oscillator after phase shifter.The signal that reception antenna receives is delivered to receiver, and the alternating current component of output zero intermediate frequency signals is delivered to signal and processed.The alternating current component that signal is processed gathering is carried out analysis and calculation, obtains target information, by monitor terminal, is shown.
Claims (4)
1. the method that the zero intermediate frequency direct current offsets, its feature comprises the steps:
Step 1: will receive signal frequency conversion to zero intermediate frequency;
Step 2: zero intermediate frequency signals is raised level through adder, then merit is divided into two-way, one tunnel detects DC component through effective value converter and delivers to differential amplifier, differential amplifier is directly delivered on another road, two paths of signals is exported difference through differential amplifier, obtains the zero intermediate frequency signals after the cancellation DC component.
2. the method that zero intermediate frequency direct current as claimed in claim 1 offsets, it is characterized in that: in described step 2, the concrete grammar of adder is: based on operational amplifier, set up adder circuit, for the DC component of zero intermediate frequency signals increase 0.7V, its beneficial effect is: avoid zero intermediate frequency signals negative voltage to occur.
3. the method that zero intermediate frequency direct current as claimed in claim 1 or 2 offsets, it is characterized in that: in described step 2, the concrete grammar of differential amplifier is: use operational amplifier to set up differential amplifier, the employing precision resister is built the balanced bridge of differential amplifier to reduce error, and multiplication factor is 1.
4. the circuit that the zero intermediate frequency direct current offsets, comprise the voltage follower I, adder, the voltage follower II, the voltage follower III, the RMS-DC converter circuit, differential amplifier, zero intermediate frequency signals following by inputting voltages device I, the input of adder is connected with the output of voltage follower I, output is connected with the voltage follower III with the voltage follower II, it is characterized in that: the output of voltage follower II is connected with the in-phase input end of differential amplifier, the output of voltage follower III is connected with the input of RMS-DC converter circuit, the output of RMS-DC converter circuit is connected with the inverting input of differential amplifier,
The direct following by inputting voltages device of described zero intermediate frequency signals I, then input summer, be divided into two-way from adder, differential amplifier is delivered in one tunnel after voltage follower II buffering, another road is delivered to effective value converter and is obtained effective value and deliver to differential amplifier again after voltage follower III buffering, two paths of signals carries out subtraction through differential amplifier, obtains the alternating current component of zero intermediate frequency signals.
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| CN201310355188.7A CN103457623B (en) | 2013-08-15 | 2013-08-15 | A kind of circuit of Zero intermediate frequency direct current compensation and method |
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| CN201310355188.7A CN103457623B (en) | 2013-08-15 | 2013-08-15 | A kind of circuit of Zero intermediate frequency direct current compensation and method |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107659326A (en) * | 2017-08-30 | 2018-02-02 | 南京理工大学 | Novel millimeter wave receiver output signal dynamic expansion device |
| CN108768910A (en) * | 2018-07-05 | 2018-11-06 | 上海晟矽微电子股份有限公司 | frequency deviation determining device and method |
| CN109283494A (en) * | 2017-12-13 | 2019-01-29 | 武汉滨湖电子有限责任公司 | The high-power transmitting leakage of bistatic continuous wave radar inhibits device and suppressing method |
| CN110031647A (en) * | 2019-05-07 | 2019-07-19 | 清华大学 | A kind of ASIC interface for capacitance-grid type angular displacement sensor |
| CN114337699A (en) * | 2021-12-14 | 2022-04-12 | 中国电子科技集团公司第三十八研究所 | Self-adaptive carrier cancellation device and method of zero-intermediate-frequency transmitter |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1917380A (en) * | 2006-08-01 | 2007-02-21 | 华为技术有限公司 | Method for eliminating dc bias for receiver and signal process module |
| CN101068104A (en) * | 2007-03-23 | 2007-11-07 | 鼎芯通讯（上海）有限公司 | DC deviation eliminating device and method |
| US20120033766A1 (en) * | 2010-07-28 | 2012-02-09 | Panasonic Corporation | Receiver circuit and receiver apparatus including the same |
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2013
- 2013-08-15 CN CN201310355188.7A patent/CN103457623B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1917380A (en) * | 2006-08-01 | 2007-02-21 | 华为技术有限公司 | Method for eliminating dc bias for receiver and signal process module |
| CN101068104A (en) * | 2007-03-23 | 2007-11-07 | 鼎芯通讯（上海）有限公司 | DC deviation eliminating device and method |
| US20120033766A1 (en) * | 2010-07-28 | 2012-02-09 | Panasonic Corporation | Receiver circuit and receiver apparatus including the same |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107659326A (en) * | 2017-08-30 | 2018-02-02 | 南京理工大学 | Novel millimeter wave receiver output signal dynamic expansion device |
| CN109283494A (en) * | 2017-12-13 | 2019-01-29 | 武汉滨湖电子有限责任公司 | The high-power transmitting leakage of bistatic continuous wave radar inhibits device and suppressing method |
| CN108768910A (en) * | 2018-07-05 | 2018-11-06 | 上海晟矽微电子股份有限公司 | frequency deviation determining device and method |
| CN108768910B (en) * | 2018-07-05 | 2023-05-23 | 上海晟矽微电子股份有限公司 | Frequency offset determining device and method |
| CN110031647A (en) * | 2019-05-07 | 2019-07-19 | 清华大学 | A kind of ASIC interface for capacitance-grid type angular displacement sensor |
| CN114337699A (en) * | 2021-12-14 | 2022-04-12 | 中国电子科技集团公司第三十八研究所 | Self-adaptive carrier cancellation device and method of zero-intermediate-frequency transmitter |
| CN114337699B (en) * | 2021-12-14 | 2023-05-09 | 中国电子科技集团公司第三十八研究所 | Self-adaptive carrier cancellation device and method for zero intermediate frequency transmitter |
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| CN103457623B (en) | 2015-09-23 |
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