CN203632550U - Switch mode power supply and control circuit thereof - Google Patents

Switch mode power supply and control circuit thereof Download PDF

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CN203632550U
CN203632550U CN201320787980.5U CN201320787980U CN203632550U CN 203632550 U CN203632550 U CN 203632550U CN 201320787980 U CN201320787980 U CN 201320787980U CN 203632550 U CN203632550 U CN 203632550U
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circuit
output
input
couples
signal
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欧阳茜
袁伟
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Chengdu Monolithic Power Systems Co Ltd
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Chengdu Monolithic Power Systems Co Ltd
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Abstract

The utility model discloses a switched mode power supply and control circuit thereof. The switch mode power supply comprises a switch circuit, a voltage feedback circuit, a current feedback circuit, a control circuit and a drive circuit; the input end of the voltage feedback circuit is coupled with the power supply output end of the switch circuit; the input end of the current feedback circuit is coupled with the switch of the switch circuit; the first input end of the addition circuit is coupled with the output end of the voltage feedback circuit, and the second input end of the addition circuit is coupled with the output end of the current feedback circuit; the first input end of the comparison circuit is coupled with the output end of the addition circuit, and the second input end of the comparison circuit receives a reference signal; the input end of the logic circuit is coupled with the output end of the comparison circuit; and the input end of the driving circuit is coupled with the output end of the logic circuit, and the output end of the driving circuit is coupled with the control end of the switch. According to the utility model discloses a switch mode power and control circuit that the embodiment provided have that control circuit is simple, and control is stable and transient response advantage such as quick.

Description

A kind of switched-mode power supply and control circuit thereof
Technical field
The utility model relates to switch electronic circuit, concrete but be not limited to relate to switched-mode power supply and transient response control circuit.
Background technology
DC-DC switch mode power (SMPS) is widely used in field of power electronics, for being realized and converted a DC input voitage VD conventionally with predetermined value to by the turn-on and turn-off of control switch.The fixed-frequency control of switch is the conventional control mode for switched-mode power supply, and it adopts fixed clock signal frequently to trigger rising edge or the trailing edge of the switching signal of control switch, makes switching signal have fixing frequency.Fixed-frequency control can be for reducing electromagnetic interference (EMI) effect, thereby has a wide range of applications, as the power supply of the system to electromagnetic interference sensitivity for data communication field etc.In addition, in the time of load variations, because response has certain hysteresis, the fluctuation that output voltage can be for some time.And some application scenarios have higher requirement to the stable rapidly of output voltage, therefore need control circuit to there is response speed faster.
Utility model content
In order to solve a previously described problem or multiple problem, the utility model proposes a kind of switched-mode power supply and corresponding control circuit.
According to a kind of execution mode of the present utility model, a kind of switched-mode power supply (SMPS) comprises switching circuit, voltage feedback circuit, current feedback circuit, control circuit and drive circuit, wherein switching circuit has power input and power output end, wherein power input couples input voltage, power output end couples load, and switching circuit comprises switch; Voltage feedback circuit has input and output, and wherein the input of voltage feedback circuit couples power output end; Current feedback circuit has input and output, and wherein the input of current feedback circuit couples the switch of switching circuit; Control circuit comprises add circuit, comparison circuit and logical circuit, wherein: add circuit has first input end, the second input and output, wherein the first input end of add circuit couples the output of voltage feedback circuit, and the second input of add circuit couples the output of current feedback circuit; Comparison circuit has first input end, the second input and output, and wherein the first input end of comparison circuit couples the output of add circuit, and the second input of comparison circuit receives reference signal; Logical circuit has input and output, and wherein the input of logical circuit couples the output of comparison circuit; And drive circuit has input and output, wherein the input of drive circuit couples the output of logical circuit, and the output of drive circuit couples the control end of switch.In one embodiment, control circuit further comprises direct current correcting circuit, wherein: direct current correcting circuit has input and output, wherein the input of direct current correcting circuit couples the output of voltage feedback circuit, and the output of direct current correcting circuit provides reference signal; Ramp signal circuit for generating output ramp signal; And add circuit further has the 3rd input that couples ramp signal.In one embodiment, direct current correcting circuit comprises: transconductance type error amplifying circuit, there is first input end, the second input and output, wherein the first input end of transconductance type error amplifying circuit couples the output of voltage feedback circuit, and the second input of transconductance type error amplifying circuit couples reference voltage; And compensating circuit, comprise electric capacity and the resistance of series connection, the electric capacity of series connection and resistance one end couple with reference to ground, and the electric capacity of series connection and the resistance other end couple the output of transconductance type error amplifying circuit, and wherein the output of transconductance type error amplifying circuit provides reference signal.In one embodiment, reference signal is direct current signal.In one embodiment, control circuit further comprises: direct current correcting circuit, there is input and output, and the input of direct current correcting circuit couples the output of voltage feedback circuit; And second add circuit, there is first input end, the second input and output, wherein the first input end of the second add circuit couples the output of direct current correcting circuit, and the second input of the second add circuit couples ramp signal, and the output of the second add circuit provides reference signal.In one embodiment, logical circuit comprises: clock generating circuit, and output provides clock signal; And rest-set flip-flop, there is first input end, the second input and output, wherein the first input end of rest-set flip-flop couples the output of clock generating circuit, the second input of rest-set flip-flop couples the output of comparison circuit, and the output of rest-set flip-flop couples the input of drive circuit.In one embodiment, control circuit further comprises ramp signal circuit for generating, ramp signal circuit for generating output ramp signal, and wherein ramp signal has the frequency identical with clock signal.In one embodiment, voltage feedback circuit comprises: the first resistance, there is first end and the second end, and wherein the first end of the first resistance couples power output end; And second resistance, there is first end and the second end, wherein the first end of the second resistance couples the second end of the first resistance, and the second end of the second resistance couples with reference to ground, and wherein the second end of the first resistance provides output voltage feedback signal.In one embodiment, switching circuit comprises: switch, there is first end, the second end and control end, and wherein the first end of switch couples power input, and the second end of switch couples switching node, and the control end of switch couples the output of drive circuit; Rectifying tube, has first end and the second end, and wherein the first end of rectifying tube couples switching node, and the second end of rectifying tube couples with reference to ground; Outputting inductance, has first end and the second end, and wherein the first end of outputting inductance couples switching node; And output capacitance, there is first end and the second end, wherein the first end of output capacitance couples the second end of outputting inductance, and the second end of output capacitance couples with reference to ground, and wherein the first end of output capacitance provides output voltage.
According to another kind of execution mode of the present utility model, a kind of control circuit for control switch circuit comprises above-mentioned control circuit.In one embodiment, control circuit comprises: voltage detecting circuit, there is input and output, and wherein the input of voltage detecting circuit couples the power output end of switching circuit; Current detection circuit, has input and output, and wherein the input of current detection circuit couples the switch of switching circuit; Add circuit, has first input end, the second input and output, and wherein first input end couples the output of voltage feedback circuit, and the second input couples the output of current feedback circuit, and the output of add circuit provides compound feedback signal; Comparison circuit, has first input end, the second input and output, and wherein the first input end of comparison circuit couples the output of add circuit, and the second input of comparison circuit receives reference signal; Logical circuit, has input and output, and wherein the input of logical circuit couples the output of comparison circuit, and the output of logical circuit couples the control end of switch.In one embodiment, control circuit further comprises direct current correcting circuit, wherein direct current correcting circuit comprises: transconductance type error amplifying circuit, there is first input end, the second input and output, wherein first input end couples the output of voltage feedback circuit, and the second input of transconductance type error amplifying circuit couples reference voltage; And compensating circuit, comprising that electric capacity and the resistance of series connection, the electric capacity of series connection and one end of resistance couple with reference to ground, the electric capacity of series connection and the other end of resistance couple the output of transconductance type error amplifying circuit and reference signal are provided.
The switched-mode power supply providing according to embodiment of the present utility model and control circuit, have control circuit simple, controls the advantages such as stable and transient response is quick.
Accompanying drawing explanation
In order better to understand the utility model, will be described in detail the utility model according to the following drawings:
Fig. 1 shows according to the SMPS schematic block diagram of the utility model one embodiment;
Fig. 2 shows according to the SMPS schematic block diagram of an embodiment of the utility model;
Fig. 3 shows the SMPS schematic block diagram according to the another embodiment of the utility model;
Fig. 4 shows according to the utility model SMPS schematic block diagram of an embodiment again;
Fig. 5 shows according to the schematic diagram of the SMPS of the utility model one specific embodiment;
Fig. 6 shows according to the waveform schematic diagram of multiple signals in the SMPS of the utility model one embodiment;
Transient response waveform figure when load is risen under transient response waveform figure when Fig. 7 shows according to the load rising of the utility model one embodiment and traditional control method;
Transient response waveform figure when Fig. 8 shows the load decline under transient response waveform figure and the traditional control method while decline according to the load of the utility model one embodiment.
Describe below with reference to the accompanying drawings embodiment of the present utility model in detail.Run through institute's identical Reference numeral of drawings attached and represent identical or similar parts or feature.
Embodiment
To describe specific embodiment of the utility model below in detail, it should be noted that the embodiments described herein, only for illustrating, is not limited to the utility model.To in detailed description of the present utility model, in order to understand better the utility model, a large amount of details is described below.But, it will be understood by those skilled in the art that and there is no these details, the utility model can be implemented equally.Set forth the utility model for clear, simplified the detailed description of some concrete structures and function herein.In addition, the similar 26S Proteasome Structure and Function of having described in detail in certain embodiments, repeats no more in other embodiments.Although every term of the present utility model is to describe one by one in conjunction with concrete example embodiment, these terms should not be construed as the demonstration execution mode that is confined to set forth here.
Above-mentioned specification of the present utility model and enforcement are only illustrated the utility model in an exemplary fashion, and these embodiment are not completely detailed, and are not used in the scope of the present utility model that limits.It is all possible changing and revise for disclosed embodiment, the selectivity embodiment that other are feasible and can being understood by those skilled in the art the equivalent variations of element in embodiment.Other variations of embodiment disclosed in the utility model and modification do not exceed spirit of the present utility model and protection range.
" coupling " of mentioning in specification of the present utility model can refer to directly connect or by the connection of indirect thing, and as by the connection of conductor, this conductor has resistance, also can have parasitic parameter, as has inductance value and capacitance, and as by the connection of diode." circuit " that specification of the present utility model is mentioned can show as integrated circuit, also can show as device, circuit printing plate module, system and other form.
Fig. 1 shows according to the SMPS100 schematic block diagram of the utility model one embodiment.SMPS100 comprises switching circuit 10, add circuit 12, comparison circuit 14(CMP), logical circuit 15(LGC) and drive circuit 16(DRV).Switching circuit 10 has power input and power output end, and wherein power input couples input voltage vin, and power output end provides output voltage V out to be used to load LD power supply.Mark Vin and Vout also can be used for characterizing power input Vin and power output end Vout hereinafter.Switching circuit 10 comprises switch Q1, and switching circuit 10 converts input voltage vin to output voltage V out under the turn-on and turn-off action of switch Q1.In one embodiment, switching circuit 10 comprises dc-dc boost change-over circuit (buck), and the output voltage V out of output is lower than input voltage vin.Add circuit 12 has first input end, the second input and output, and wherein first input end couples power output end Vout for receiving the output voltage feedback signal FB that characterizes output voltage V out.In one embodiment, output voltage feedback signal FB equals output voltage V out.In another embodiment, SMPS100 further comprises voltage feedback circuit, detect output voltage V out and obtain output voltage feedback signal FB, wherein the input of voltage feedback circuit couples power output end Vout, and the output of voltage feedback circuit provides voltage feedback signal FB.The second input of add circuit 12 is for the output current feedback signal CS of receiving key circuit 10, and wherein output current feedback signal CS characterizes the current value that flows through switch Q1 or other node.In one embodiment, SMPS100 comprises output current feedback circuit, and the input of output current feedback circuit couples switching circuit 10 crosses the electric current of switch for senses flow, and the output of output current feedback circuit provides output current feedback signal.In one embodiment, output current feedback signal CS detects by current detection circuit the voltage signal that flows through the sign output current that the electric current of switch Q1 obtains.Add circuit 12 at least superposes to output voltage feedback signal FB and output current feedback signal CS, obtains compound feedback signal FB2.Comparison circuit 14 has first input end, the second input and output, the output that wherein first input end of comparison circuit 14 couples add circuit 12 is for receiving compound feedback signal FB2, the second input of comparison circuit 14 receives a reference signal V1, and comparison circuit 14 compares and export comparison signal CP by compound feedback signal FB2 and reference signal V1.SMPS100 controls switching circuit 10 according to the comparison signal CP of comparison circuit 14.In one embodiment, reference signal V1 is the signal that output voltage feedback signal FB is carried out to integration and filtering, as shown in Figure 2, reference signal V1 is output voltage correction signal, produced by direct current correcting circuit 23, direct current correcting circuit 23 has low frequency filtering performance, and output voltage correction signal V1 is changed slowly.In another embodiment, reference signal V1 is a direct current signal, as shown in Figure 4.SMPS100 can further adopt slope-compensation, one ramp signal SLP is superposeed into any input of comparison circuit 12, as a ramp signal SLP and output voltage feedback signal FB and output current feedback signal CS stack are obtained to compound feedback signal FB2, as shown in Figure 2; Or ramp signal SLP is superposeed if one end of comparison circuit 14 is to obtain reference signal V1, as shown in Figure 3.Ramp signal SLP has ramp waveform at least one time period in one-period, as having ramp waveform at output current ascent stage.In one embodiment, ramp signal SLP is sawtooth waveforms.
Continue the explanation of Fig. 1, logical circuit 15 has input and output, and the output that wherein input of logical circuit couples comparison circuit 14 is for receiving comparison signal CP, and the output of logical circuit 15 couples the input of drive circuit 16.Comparison signal CP output pulse width modulation (PWM) signal that logical circuit 15 provides according to comparison circuit 14.Drive circuit 16 converts the voltage signal that is applicable to driving switch Q1 to for the pwm signal that logical circuit 15 is exported.The output of drive circuit 16 couples the switch Q1 of switching circuit 10 for the turn-on and turn-off of control switch Q1.In one embodiment, SMPS100 comprises switching circuit 10 and control circuit 11.Wherein control circuit 11 comprises add circuit 12, comparison circuit 14, logical circuit 15 and drive circuit 16.In another embodiment, SMPS100 comprises switching circuit 10, control circuit and drive circuit 16, and wherein control circuit comprises add circuit 12, comparison circuit 14 and logical circuit 15.In one embodiment, control circuit is produced in an integrated circuit.
Fig. 2 shows according to the SMPS200 schematic block diagram of an embodiment of the utility model.Compared with the SMPS100 of Fig. 1, SMPS200 further comprises a direct current correcting circuit 23, and add circuit 22 superposes output voltage feedback signal FB, output current feedback signal CS and ramp signal SLP to obtain compound feedback signal FB2.In order to make description simply clear, will no longer repeat parts identical with SMPS100 in SMPS200 and connection.Direct current correcting circuit 23 has input and output, wherein the input of direct current correcting circuit 23 couples power output end Vout for receiving output voltage feedback signal FB, output provides reference signal V1, and wherein reference signal V1 is the output voltage correction signal of output voltage V out at least being carried out to integration.In one embodiment, reference signal V1 carries out integration and carries out the signal obtaining after low-pass filtering for the time output voltage V out.In another embodiment, reference signal V1 is direct current signal.Add circuit 22 receives the first input end of output voltage feedback signal FB and receives the second input of output current feedback signal CS except having, also further there is the 3rd input, wherein the 3rd input receives ramp signal SLP, the compound feedback signal FB2 that the output of add circuit 22 is provided is the superposed signal of output voltage feedback signal FB, output current feedback signal CS and ramp signal SLP, i.e. FB2=FB+CS+SLP.Comparison circuit 14 further compares FB2 and output voltage correction signal V1, obtains comparison signal CP.Control circuit 21 conducting or the shutoff of switch Q1 in signal CP control switch circuit 10 based on the comparison.
Fig. 3 shows according to the schematic block diagram of the SMPS300 of the another embodiment of the utility model.Compared with the SMPS100 of Fig. 1, SMPS300 further comprises direct current correcting circuit 23 and the second add circuit 32.Compared with SMPS200 in Fig. 2, SMPS300 in Fig. 3 superposes to obtain reference signal V1 by ramp signal SLP and output voltage correction signal Vh, and SMPS200 in Fig. 2 superposes to obtain compound feedback signal FB2 by ramp signal SLP and output voltage feedback signal FB and output current feedback signal CS.Be in order to make description simply clear, will no longer repeat parts identical with SMPS100 in SMPS300 and connection.Wherein direct current correcting circuit 23 is for providing output voltage correction signal Vh, and output voltage correction signal Vh can be the signal that output voltage V out is carried out to integration and filtering.The second add circuit 32 has first input end, the second input and output, wherein first input end couples direct current correcting circuit 23 for receiving output voltage correction signal Vh, the second input receives ramp signal SLP, and output provides reference signal V1 to be coupled to comparison circuit 14.Like this, the first input end of comparison circuit 14 receives the compound feedback signal FB2 that output voltage feedback signal FB and output current feedback signal CS are superposeed, i.e. FB2=FB+CS; And the second input of comparison circuit 14 receives the reference signal V1 that output voltage correction signal Vh and ramp signal SLP are superposeed, i.e. V1=Vh+SLP; Compound feedback signal FB2 and reference signal V1 are compared acquisition comparison signal CP, the turn-on and turn-off of control circuit 31 based on switch Q1 in this comparison signal CP control switch circuit 10 by comparison circuit 14.
Fig. 4 shows according to the utility model schematic block diagram of the SMPS400 of an embodiment again.Compared with SMPS100 in Fig. 1, SMPS400 superposes ramp signal SLP and output voltage feedback signal FB and output current feedback signal CS to obtain compound feedback signal FB2, and the reference signal V1 of SMPS400 is a direct current signal simultaneously.Be in order to make description simply clear, will no longer repeat parts identical with SMPS100 in SMPS400 and connection.DC reference signal V1 can produce by DC reference voltage circuit for generating.Like this, comparison circuit is by compound feedback signal FB2(FB2=FB+CS+SLP) compare to obtain comparison signal CP with the reference signal DC of direct current.The turn-on and turn-off of control circuit 41 based on switch Q1 in this comparison signal CP control switch circuit 10.
Fig. 5 shows according to the schematic diagram of the SMPS500 of the utility model one specific embodiment.SMPS500 comprises switching circuit 50 and control circuit 51.Wherein control circuit 51 comprises add circuit 52, ramp signal circuit for generating 521, direct current correcting circuit 53, comparison circuit 54, logical circuit 55, drive circuit 56 and voltage feedback circuit 57.In one embodiment, control circuit 51 is integrated in an electronic packing body.In another embodiment, control circuit 51 is integrated in semi-conductive substrate and can only comprises partial circuit and the parts among add circuit 52, ramp signal circuit for generating 521, direct current correcting circuit 53, comparison circuit 54, logical circuit 55, drive circuit 56 and voltage feedback circuit 57.
Switching circuit 50 is buck type switching circuit.Switching circuit 50 comprises switch Q1, synchronous rectifier Q2, outputting inductance L and output capacitance Co.Wherein the first end of switch Q1 couples power input for receiving input voltage vin, and the second end of switch Q1 couples switching node SW, and the control end of switch Q1 couples drive circuit 56.The first end of synchronous rectifier Q2 couples switching node SW, and the second end of synchronous rectifier Q2 couples with reference to ground GND, and the control end of synchronous rectifier Q2 couples drive circuit 56.In another embodiment, synchronous rectifier Q2 is replaced as diode by an asynchronous rectifying tube.Switch Q1 and synchronous rectifier Q2 comprise mos field effect transistor (MOSFET).MOSFET pipe can comprise enhancement mode N-channel mosfet.In another embodiment, switch and synchronous rectifier are P-channel mosfet.In other embodiments, switch and synchronous rectifier can comprise the device of other types, as junction field effect transistor (JFET) or bipolar junction transistor (BJT).The first end of outputting inductance L couples switching node SW, and the second end of outputting inductance couples output capacitance Co.The first end of output capacitance Co couples outputting inductance L, and the second end of outputting inductance Co couples with reference to ground GND.The first end of outputting inductance Co directly couples power output end for output voltage V out is provided.Switching circuit 50 can further comprise that input capacitance Cin is for carrying out filtering by input voltage vin.Switching circuit 50 receives the power input of input voltage vin and provides the power output end of output voltage V out except having, also there is the first control signal input that receives the first control signal HS and the second control signal input that receives the second control signal LS, wherein the first control signal input couples the control end of switch Q1, and the second control signal input couples the control end of synchronous rectifier Q2.In the time of switch Q1 conducting, synchronous rectifier Q2 turn-offs, and the voltage on switching node SW rises to input voltage vin, and output current flows to power output end through outputting inductance L from switching node SW, and load current Io rises.Now output capacitance Co can be charged, and output voltage V out can rise.Then, switch Q1 turn-offs, synchronous rectifier Q2 conducting, and output current flows to reference to ground GND from power output end through outputting inductance L and synchronous rectifier Q2.Now output capacitance Co can discharge, and output voltage V out can decline.The voltage at switching node SW place is modulated by pwm signal, and waveform closely can be similar to PWM waveform.Switching node SW place voltage is converted into direct voltage Vout through the filtering of outputting inductance L and output capacitance Co.This direct voltage Vout is subject to the impact of load LD size and fluctuates.For example, in the time that load LD raises, as load LD impedance reduces, output voltage V out declines.In the time that load LD reduces, output voltage V out raises.In addition due to the existence of output capacitance Co equivalent resistance, output voltage V out has the ripple close with the pwm signal cycle.In further embodiments, switching circuit can comprise the switching circuit of booster type (boost) change-over circuit or other type.
Add circuit 52 superposes output current feedback signal CS, output voltage feedback signal FB and ramp signal SLP, generates compound feedback signal FB2.In one embodiment, add circuit 52 superposes output current feedback signal CS, output voltage feedback signal FB and ramp signal SLP with the ratio of 1:1:1.In a further embodiment, add circuit 52 can superpose output current feedback signal CS, output voltage feedback signal FB and ramp signal SLP with other ratio arbitrarily.Output current feedback signal CS can flow through by detection the electric current acquisition of switch Q1, and the electric current that wherein flows through switch Q1 can reflect the variation of output current at ascent stage.In another embodiment, the electric current that output current feedback signal CS flows through outputting inductance L by detection obtains.Output current feedback signal can obtain by the current detection circuit of arbitrary form and electric current detecting method.
Ramp signal SLP is generated and is exported by ramp signal circuit for generating 521.In one embodiment, ramp signal SLP has the frequency identical with clock signal clk, and at least has slope at output current ascent stage.
Direct current correcting circuit 53 comprises transconductance type error amplifying circuit 531 and compensating circuit 532.Transconductance type error amplifying circuit 531 has and couples power output end for receiving the first input end of output voltage feedback signal FB, couples the second input and the output of reference voltage Vref.In illustrated embodiment, the in-phase input end of transconductance type error amplifying circuit 531 couples reference voltage Vref, and end of oppisite phase couples output voltage feedback signal FB.Transconductance type error amplifying circuit 531 is for carrying out integration amplification by the difference of output voltage feedback signal FB and reference voltage Vref, and output current signal, this current signal provides output voltage correction signal V1 through the conversion of compensating circuit 532 at the output of transconductance type error amplifying circuit 531.Compensating circuit 532 comprises capacitor C c and the resistance R c of series connection, and the capacitor C c of series connection and resistance R c one end couple with reference to ground GND, and the other end couples the output of transconductance type error amplifying circuit 531.Wherein capacitor C c couples with reference to ground, and resistance R c couples the output of transconductance type error amplifying circuit 531.Compensating circuit 532 can arrange has low-pass filtering function, makes output voltage correction signal V1 have very low frequency, and output voltage correction signal V1 is comparatively smooth.In the time that load is risen, output voltage feedback signal FB declines, and output voltage correction signal V1 can rise gently.In another embodiment, in the time that load is risen, output voltage V out declines, and output voltage feedback signal can be rising, and the correspondingly in-phase end of output voltage feedback signal input transconductance type error amplifying circuit, also rises output voltage correction signal gently.
The in-phase end of comparison circuit 54 receives compound feedback signal FB2, it is output voltage correction signal V1 that the end of oppisite phase of comparison circuit 54 receives in this embodiment of reference signal V1(), the output output comparison signal CP of comparison circuit 54 is to conducting or the shutoff of logical circuit 55 for control switch Q1.In the time that compound feedback signal FB2 is greater than output voltage correction signal V1, comparison signal CP is high level, triggers the pwm signal of logical circuit 55 output low levels for stopcock Q1.But in another embodiment, the in-phase end of comparison circuit and end of oppisite phase receive signal can be contrary.
Logical circuit 55 comprises clock generating circuit 551 and rest-set flip-flop 552.Wherein clock generating circuit 551 clocking CLK.As shown in the figure, there is a high level pulse in clock signal clk in the time that each cycle starts, thereby for pwm signal being set high to actuating switch Q1 in each cycle.Rest-set flip-flop 552 has set input S, the RESET input R and output Q, wherein set input S couples clock generating circuit 551 for receive clock signal CLK, the RESET input R couples the output of comparison circuit 54 for receiving comparison signal CP, and output Q output pwm signal is for the turn-on and turn-off of control switch Q1.In the time that clock signal clk is high level, rest-set flip-flop 552 is exported the pwm signal of high level.Pwm signal sets high always, until in the time that comparison signal CP is high level, pwm signal sets low.In the time that next clock high level pulse arrives, pwm signal sets high again.In another embodiment, the set input of rest-set flip-flop 552 receives comparison signal, and the RESET input receive clock signal, and switch Q1 conducting in the time that pwm signal is low level.
Drive circuit 56 converts the first control signal HS that is suitable for driving switch Q1 and the second control signal LS that is suitable for controlling synchronous rectifier Q2 to for the pwm signal of logic level that logical circuit 55 is exported.In another embodiment, switching circuit 50 does not comprise synchronous rectifier, the first control signal HS of 56 output control switch of drive circuit.
Control circuit 51 can further comprise voltage feedback circuit 57, converts output voltage V out to output voltage feedback signal FB for the power output end that couples switching circuit 50.Voltage feedback circuit 57 comprises resistor voltage divider circuit, comprise the first resistance R 1 and the second resistance R 2, wherein the first end of the first resistance R 1 couples the power output end Vout of switching circuit 50 as the input of voltage feedback circuit 57, the second end of the first resistance R 1 couples the second resistance R 2, the other end of the second resistance R 2 couples with reference to ground GND, and the common node of the first resistance and the second resistance i.e. the second end of the first resistance R 1 provides output voltage feedback signal FB as output.Like this, output voltage feedback signal FB is proportional to output voltage V out, i.e. FB=R2/ (R1+R2) * Vout.In further embodiments, voltage feedback circuit 57 can comprise the circuit of other type, or has the detection part of other type.
Fig. 6 shows according to the waveform schematic diagram of multiple signals in the SMPS of the utility model one embodiment.This schematic diagram represents respectively reference signal V1 from top to bottom, compound feedback signal FB2, output current feedback signal CS, output voltage feedback signal FB, load current Io, pwm signal and clock signal clk.Set forth the mode of SMPS work below in conjunction with the waveform schematic diagram in Fig. 5 and Fig. 6.As shown in Figure 5, because compensating circuit 532 adopts low frequency filtering, output voltage correction signal V1 is very smooth, and be direct voltage within a short period of time substantially.This circuit does not need compensating circuit to carry out complicated correction.In another embodiment, reference signal V1 is DC reference signal.Output voltage feedback signal FB has periodic ripple, is subject to the impact of load variations simultaneously.At time t3, load increases, and load current Io increases, and output voltage feedback signal FB follows output voltage V out and declines and decline.Output current feedback signal CS is the output electric current measure signal that flows through switch Q1, rises, at switch Q1 blocking interval (pwm signal is low) no current in switch Q1 conduction period (pwm signal is high).Compound feedback signal FB2 is the superposed signal of output current feedback signal CS, output voltage feedback signal FB and ramp signal SLP, i.e. compound feedback signal FB2=CS+FB+SLP.Ramp signal SLP, for slope-compensation, makes the compound feedback signal FB2 more stably variation of trigger switch Q1 more rapidly, reduces false triggering, improves reliability.In the time that output voltage feedback signal FB is larger, the rising initial value of compound feedback signal FB2 signal is also larger; In the time that output voltage feedback signal FB is lower, the rising initial value of compound feedback signal FB2 is also lower, thus the variation of responsive load better.
At time t1, there is high level pulse in clock signal clk, and rest-set flip-flop 552 is set, and output Q provides the pwm signal of high level, switch Q1 conducting, and output current feedback signal CS rises.Compound feedback signal FB2 also rises.At time t2, in the time that compound feedback signal FB2 rises to higher than reference signal V1, the comparison signal CP that comparison circuit 24 is exported high level resets rest-set flip-flop 552, and the pwm signal of rest-set flip-flop 552 output Q is converted to low level, and switch Q1 turn-offs.In the time that the high level pulse of next clock signal clk arrives, pwm signal sets high again with actuating switch Q1.
At time t3, load is risen, and load current Io rises, and output voltage feedback signal FB declines.Now pwm signal is low, and switch Q1 is in off state.At time t4, the high level pulse of clock signal clk arrives, and pwm signal is converted to high level, switch Q1 conducting.Because the output voltage feedback signal FB when output voltage feedback signal FB in the time of time t4 compares at time t1 is low, the initial value of compound feedback signal FB2 is lower, therefore need the time of more growing that compound feedback signal FB2 is risen to higher than output voltage correction signal V1, this directly causes improving in this cycle pwm signal duty ratio, has therefore responded well the variation that load is risen.From scheming, the response time that SMPS changes load transient is Td, is less than a clock cycle.This quick response that load transient is changed makes system reduce the adjusting importance of load transient response output voltage correction signal V1, does not therefore need compensating circuit to carry out complicated adjusting, makes control circuit and controls simply, controls stable.
Transient response waveform figure when load is risen under transient response waveform figure when Fig. 7 shows according to the load rising of the utility model one embodiment and traditional control method.Wherein signal HS has represented according to the pwm control signal oscillogram of the utility model one embodiment.Signal FB has represented according to the output voltage feedback signal oscillogram of the utility model one embodiment.HS-A has represented the pwm control signal oscillogram under the employing compensating network adjustment control method of traditional control method.FB-A has represented the output voltage feedback signal oscillogram under traditional control method.Wherein other condition is as consistent in above-mentioned two examples in input voltage, output voltage predetermined value, loading condition etc.Can see, in the time that load is risen, output voltage feedback signal declines.Near output voltage feedback signal is returned to predetermined value time, compare traditional control method, can adapt in time this variation according to the pwm signal of the utility model one embodiment, there is at short notice the duty ratio larger than traditional control method, and the overshoot of output voltage feedback signal FB is smaller with fluctuation.And output voltage feedback signal FB-A in traditional control method has larger overshoot and fluctuation.Visible have better more fast transient response and more stable control according to the SMPS of the utility model one embodiment and control method in the time that load is risen.
Transient response waveform figure when Fig. 8 shows the load decline under transient response waveform figure and the traditional control method while decline according to the load of the utility model one embodiment.Wherein HS has represented according to the pwm control signal oscillogram of the utility model one embodiment.FB has represented according to the output voltage feedback signal oscillogram of the utility model one embodiment.HS-A has represented the pwm control signal oscillogram under the employing compensating network adjustment control method of traditional control method.FB-A has represented the output voltage feedback signal oscillogram under traditional control method.Wherein other condition is as consistent in above-mentioned two examples in input voltage, output voltage predetermined value, loading condition etc.Can see, in the time that load declines, output voltage feedback signal rises.Near output voltage feedback signal is returned to predetermined value time, compare traditional control method, can adapt in time this variation according to the pwm signal of the utility model one embodiment, have at short notice the duty ratio less than traditional control method, the overshoot of output voltage feedback signal FB and fluctuation are smaller.And output voltage feedback signal FB-A in traditional control method has larger overshoot and fluctuation.Visible have better more fast transient response and more stable control according to the SMPS of the utility model one embodiment and control method in the time that load declines.
Some above-mentioned specific embodiments only describe the utility model in an exemplary fashion, and these embodiment are not completely detailed, and are not used in the scope of the present utility model that limits.It is all possible changing and revise for disclosed embodiment, the selectivity embodiment that other are feasible and can being understood by those skilled in the art the equivalent variations of element in embodiment.Other variations of embodiment disclosed in the utility model and modification do not exceed spirit of the present utility model and protection range.

Claims (10)

1. a switched-mode power supply (SMPS), comprising:
Switching circuit, has power input and power output end, and wherein power input couples input voltage, and power output end couples load, and switching circuit comprises switch;
Voltage feedback circuit, has input and output, and wherein the input of voltage feedback circuit couples power output end;
Current feedback circuit, has input and output, and wherein the input of current feedback circuit couples the switch of switching circuit;
Control circuit; And
Drive circuit;
It is characterized in that, control circuit comprises:
Add circuit, has first input end, the second input and output, and wherein the first input end of add circuit couples the output of voltage feedback circuit, and the second input of add circuit couples the output of current feedback circuit;
Comparison circuit, has first input end, the second input and output, and wherein the first input end of comparison circuit couples the output of add circuit, and the second input of comparison circuit receives reference signal; And
Logical circuit, has input and output, and wherein the input of logical circuit couples the output of comparison circuit;
Wherein drive circuit has input and output, and wherein the input of drive circuit couples the output of logical circuit, and the output of drive circuit couples the control end of switch.
2. SMPS as claimed in claim 1, is characterized in that, control circuit further comprises direct current correcting circuit, wherein:
Direct current correcting circuit has input and output, and the input of direct current correcting circuit couples the output of voltage feedback circuit, and the output of direct current correcting circuit provides reference signal;
Ramp signal circuit for generating output ramp signal; And
Add circuit further has the 3rd input that couples ramp signal.
3. SMPS as claimed in claim 2, is characterized in that, direct current correcting circuit comprises:
Transconductance type error amplifying circuit, has first input end, the second input and output, and wherein the first input end of transconductance type error amplifying circuit couples the output of voltage feedback circuit, and the second input of transconductance type error amplifying circuit couples reference voltage; And
Compensating circuit, comprises that electric capacity and the resistance of series connection, the electric capacity of series connection and resistance one end couple with reference to ground, and the electric capacity of series connection and the resistance other end couple the output of transconductance type error amplifying circuit, and wherein the output of transconductance type error amplifying circuit provides reference signal.
4. SMPS as claimed in claim 1, is characterized in that, reference signal is direct current signal.
5. SMPS as claimed in claim 1, is characterized in that, control circuit further comprises:
Direct current correcting circuit, has input and output, and the input of direct current correcting circuit couples the output of voltage feedback circuit; And
The second add circuit, there is first input end, the second input and output, wherein the first input end of the second add circuit couples the output of direct current correcting circuit, and the second input of the second add circuit couples ramp signal, and the output of the second add circuit provides reference signal.
6. SMPS as claimed in claim 1, is characterized in that, logical circuit comprises:
Clock generating circuit, output provides clock signal; And
Rest-set flip-flop, there is first input end, the second input and output, wherein the first input end of rest-set flip-flop couples the output of clock generating circuit, and the second input of rest-set flip-flop couples the output of comparison circuit, and the output of rest-set flip-flop couples the input of drive circuit.
7. SMPS as claimed in claim 6, is characterized in that, control circuit further comprises ramp signal circuit for generating, ramp signal circuit for generating output ramp signal, and wherein ramp signal has the frequency identical with clock signal.
8. SMPS as claimed in claim 1, is characterized in that, voltage feedback circuit comprises:
The first resistance, has first end and the second end, and wherein the first end of the first resistance couples power output end; And
The second resistance, has first end and the second end, and wherein the first end of the second resistance couples the second end of the first resistance, and the second end of the second resistance couples with reference to ground, and wherein the second end of the first resistance provides output voltage feedback signal.
9. SMPS as claimed in claim 1, is characterized in that, switching circuit comprises:
Switch, has first end, the second end and control end, and wherein the first end of switch couples power input, and the second end of switch couples switching node, and the control end of switch couples the output of drive circuit;
Rectifying tube, has first end and the second end, and wherein the first end of rectifying tube couples switching node,
The second end of rectifying tube couples with reference to ground;
Outputting inductance, has first end and the second end, and wherein the first end of outputting inductance couples switching node; And
Output capacitance, has first end and the second end, and wherein the first end of output capacitance couples the second end of outputting inductance, and the second end of output capacitance couples with reference to ground, and wherein the first end of output capacitance provides output voltage.
10. for a control circuit for control switch circuit, it is characterized in that comprising the control circuit described in any one in claim 1-7.
CN201320787980.5U 2013-12-03 2013-12-03 Switch mode power supply and control circuit thereof Expired - Fee Related CN203632550U (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106575128A (en) * 2014-09-09 2017-04-19 Bsh家用电器有限公司 Switching device for switching an energy supply for an electronic control unit, domestic appliance and method for this
CN106026653B (en) * 2016-05-26 2018-11-13 成都芯源***有限公司 Buck-boost converter with slope compensation and controller and control method thereof
CN111817562A (en) * 2020-07-08 2020-10-23 无锡力芯微电子股份有限公司 Buck type DC-DC converter
CN112005480A (en) * 2018-10-04 2020-11-27 富士电机株式会社 Power supply control device and power supply control method
CN117543972A (en) * 2024-01-10 2024-02-09 深圳市微源半导体股份有限公司 Fast dynamic response switching converter circuit, switching power supply and electronic device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106575128A (en) * 2014-09-09 2017-04-19 Bsh家用电器有限公司 Switching device for switching an energy supply for an electronic control unit, domestic appliance and method for this
CN106575128B (en) * 2014-09-09 2018-03-30 Bsh家用电器有限公司 For switching switching device, home appliances and corresponding method to the energy resource supply of electronic control unit
CN106026653B (en) * 2016-05-26 2018-11-13 成都芯源***有限公司 Buck-boost converter with slope compensation and controller and control method thereof
CN112005480A (en) * 2018-10-04 2020-11-27 富士电机株式会社 Power supply control device and power supply control method
CN111817562A (en) * 2020-07-08 2020-10-23 无锡力芯微电子股份有限公司 Buck type DC-DC converter
CN111817562B (en) * 2020-07-08 2021-06-22 无锡力芯微电子股份有限公司 Buck type DC-DC converter
CN117543972A (en) * 2024-01-10 2024-02-09 深圳市微源半导体股份有限公司 Fast dynamic response switching converter circuit, switching power supply and electronic device
CN117543972B (en) * 2024-01-10 2024-03-26 深圳市微源半导体股份有限公司 Fast dynamic response switching converter circuit, switching power supply and electronic device

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