CN203504497U - Low power consumption, low jittering, and wide work range crystal oscillator circuit - Google Patents

Abstract

The utility model discloses a low power consumption, low jittering, and wide work range crystal oscillator circuit. The low power consumption, low jittering, and wide work range crystal oscillator circuit comprises a crystal resonator circuit for generating an oscillation signal, an inverted amplifying circuit, a bias circuit and a peak detection circuit, a first amplifier input terminal is coupled to an oscillator to receive the oscillation signal, an inverted amplifier outputs an inverted amplification output signal, the bias circuit comprises a bias circuit input terminal and a bias circuit output terminal, the bias circuit output terminal generates a bias circuit output signal controlled by the bias circuit input terminal, the bias circuit output signal is coupled to a second amplifier input terminal, the peak detection circuit compares the inverted amplification output signal and a reference signal, adjusts a peak detector output signal and sends the peak detector output signal to the input terminal of the bias circuit, and the bias circuit comprises a self-adjusting circuit for isolating a power supply and a second input terminal of the inverted amplifier. In an embodiment, the self-adjuster isolates power supply noise, therefore, the crystal oscillator circuit is advantaged by excellent power supply noise reduction capability.

Description

The crystal-oscillator circuit of a kind of low-power consumption, low jitter, wide operating range

Technical field

The utility model relates to crystal oscillator, relates in particular to and has the crystal oscillator that peak detector amplitude is controlled, to adapt to wider dynamic frequency scope and wider crystal indication range.

Background technology

Oscillator is the vital parts of modern electronic equipment performance.During numeral, meter, computer, video camera, TV, mobile phone, panel computer, communication equipment etc. all use crystal oscillator to produce required clock signal.

Fig. 1 has illustrated a kind of crystal-oscillator circuit of routine.This pierce circuit comprises the inverting amplifier part consisting of PMOS transistor M2, resistance R 13 and nmos pass transistor M1 and the feedback network consisting of such as quartz crystal, capacitor C p, resistance R e etc.Feedback network, to the input output feedback signal of inverting amplifier, forms a closed loop feedback system thus.

Fig. 2 has illustrated a kind of pierce circuit with peak detector.This pierce circuit comprises a peak detector, for peak value and the reference voltage of the output signal of comparison oscillator.When pierce circuit starts, the amplitude of the output signal of oscillator is lower, the voltage signal that peak detector output is higher, this voltage signal is by transistor M12 conducting, and the current mirroring circuit consisting of M11 and M3 partly applies larger bias current to inverting amplifier, promotes the work of oscillator.When pierce circuit is comparatively stablized, peak detector detects the oscillator output voltage signal uprising, thereby applies less bias current, makes the oscillator output voltage after stablizing maintain lower level.This circuit has advantages of quick startup and avoids stablizing post consumption excessive power.But this circuit exists the shortcoming that noise is large and shake is large.

Summary of the invention

The utility model provides a kind of crystal-oscillator circuit, comprising: crystal resonator circuit, produces the oscillator signal that has predetermined oscillation frequency; Inverting amplifier, has the first amplifier in, the second amplifier in and inverting amplifier output, and the first amplifier in is coupled to oscillator and receives oscillator signal; Wherein, inverting amplifier is exported anti-phase amplification output signal; Biasing circuit, has biasing circuit input and biasing circuit output, and biasing circuit output produces the biasing circuit output signal of being controlled by biasing circuit input, and biasing circuit output signal is coupled to the second amplifier in; Peak detector, more anti-phase amplification output signal and reference signal and regulate peak detector output signal, and peak detector output signal is sent into the input of biasing circuit; Wherein said biasing circuit comprises self-adjusting circuit, for the second input of insulating power supply and inverting amplifier.

Preferably, peak detector comprises the low pass filter that the first resistance and the first electric capacity form.

Preferably, inverting amplifier circuit comprises the first nmos pass transistor, the 2nd PMOS transistor and the second resistance, wherein one end of the grid of the first nmos pass transistor, the transistorized grid of the 2nd PMOS and the second resistance is connected to the output of inverting amplifier circuit, the drain electrode of the first nmos pass transistor, the transistorized source electrode of the 2nd PMOS are connected with the other end of the second resistance, and the transistorized drain electrode of the 2nd PMOS is connected to the second input of inverting amplifier; The source ground of the first nmos pass transistor.

Preferably, the second resistance consists of nmos pass transistor.

Preferably, biasing circuit comprises 12NMOS transistor, the first current source and the second current source, the transistorized grid of 12NMOS is connected to the input of biasing circuit, the transistorized drain electrode of 12NMOS is connected on the first branch road of the first current source, the second branch road of the first current source is connected on the first branch road of the second current source, and the second branch road of the second current source is connected to the output of biasing circuit.

Preferably, the first current source and/or the second current source consist of transistor.

Preferably, the first branch road of the second current source is the mirror image of the second branch road of the second current mirror, forms thus self-adjusting circuit.

Preferably, biasing circuit comprises the narrow band filter being connected between biasing circuit input and output, carries out low-pass filtering under the first frequency lower than oscillator frequency of oscillation; Biasing circuit also comprises frequency detector, oscillator frequency do not reach stable in by-pass switch capacitive filter.Preferably, narrow band filter adopts switching capacity filter.Further preferably, crystal-oscillator circuit comprises the low pass filter that the 3rd resistance and the 3rd electric capacity form.

Preferably, crystal-oscillator circuit comprises frequency divider, produces the described first frequency lower than oscillator frequency of oscillation.

In the above-described embodiments, Self-Tuning Regulator has been isolated power supply noise, and therefore, crystal-oscillator circuit has very good power supply noise to suppress ability.

Accompanying drawing explanation

Fig. 1 has illustrated a kind of crystal-oscillator circuit of routine;

Fig. 2 has illustrated a kind of pierce circuit with peak detector;

Fig. 3 has illustrated according to the crystal-oscillator circuit of the utility model embodiment;

Fig. 4 is the crystal-oscillator circuit schematic diagram of the another embodiment of the utility model;

Fig. 5 has illustrated a kind of structural representation of switching capacity filter 40;

Fig. 6 (a) and Fig. 6 (b) have illustrated the analog result of crystal oscillator.

Embodiment

Below by drawings and Examples, the technical solution of the utility model is described in further detail.

Fig. 3 has illustrated according to the crystal-oscillator circuit of the utility model embodiment.As shown in Figure 3, crystal-oscillator circuit comprises see-saw circuit 310, crystal resonator circuit 320, peak detection circuit 330, biasing circuit 340.Biasing circuit also comprises self-adjusting circuit 350.

See-saw circuit 310 comprises PMOS transistor M2, nmos pass transistor M1 and nmos pass transistor M13.The drain electrode of the drain electrode of M1, the source electrode of M2 and M13 links together, and forms the first input end of see-saw circuit 310, for receiving oscillator signal; The source electrode of the grid of M1, the grid of M2 and M13 links together, and forms the output of see-saw circuit 310, for exporting anti-phase amplification output signal; The drain electrode of M2 forms the second input of see-saw circuit 300, and it receives the output offset electric current of biasing circuit 340.Certainly, those skilled in the art will recognize that, the structure of above-mentioned see-saw circuit 310 only belongs to for example, and other substituting see-saw circuit also can be used, and does not depart from spirit of the present utility model and category.For example, M13 can replace with a resistance with regulation resistance; Again for example, M1 and M2 can be substituted by a transistor.

Crystal resonator circuit 320 comprises crystal 30, can adopt various types of crystal.One end of crystal 30 is connected to the output of see-saw circuit 310 through resistance R e1, the other end is through being connected to the first input end of see-saw circuit 310 with the resistance R e2 of the equal resistance of resistance R e1.Capacitor C p1, capacitor C p2 are connected between the two ends and ground of crystal 30.Crystal resonator circuit produces the oscillator signal that has predetermined oscillation frequency.

Output voltage and the reference voltage V ref of 330 pairs of pierce circuits of peak detection circuit compare, and the signal after is relatively sent to biasing circuit 340.In an example, peak detection circuit 330 comprises the low pass filter that a resistance R 1 and C1 form, and the value of C1 is generally at several pF, the value of R1 generally at a few K ohm to tens these magnitudes of K ohm.HFS after low pass filter filtering relatively in signal.

Biasing circuit 340 comprises nmos pass transistor M12, and the grid of M12 plays a part biasing circuit input, receive peak detector 320 outputs relatively after signal; Under the control of this signal, M12 is at the current signal of drain electrode output and this signal respective amplitude.Biasing circuit part 340 also comprises the first current mirror consisting of PMOS transistor M11 and M7, and M11 place branch road is connected in the drain electrode of M12.The electric current of M11 place branch road with the current replication of identical or equal proportion to M7 place branch road.Biasing circuit part 340 also comprises the second current mirror that nmos pass transistor M8 and nmos pass transistor M3 form, the source-drain electrode of transistor M8 is connected to M7 place branch road, the drain electrode of M3 is connected to power vd D above and its source electrode is connected on second input (drain electrode of M2 in this example) of inverting amplifier part.Thus, biasing circuit part 340 by from peak detector part 330 relatively after signal be converted to bias current, inject the second input of inverting amplifier part 310.

Self-adjusting circuit 350 comprises nmos pass transistor M8 and M3, M10 and PMOS pipe M9.M8 and M3 form current mirror.NMOS pipe M9 and M10 are positioned on this current mirror on the branch road of M8 place, and copy NMOS pipe M1 and the M2 being positioned on another branch road, make thus the source electrode direct voltage of M8 and M3 keep equating, are not subject to the interference of mains fluctuations.Certainly, those skilled in the art will recognize that, number of transistors and the type of two branch roads of the second current mirror can change, as long as guarantee that the source electrode direct voltage of M8 and M3 keeps equating, forms self-adjusting circuit thus.

In work, when initial, peak detector part 330 is passed through biasing circuit 340 to the second input Injection Current of inverting amplifier 310, and crystal oscillator is started working thus.Bias current when initial must be enough large, makes the gain of inverting amplifier 310 be enough to overcome the loss that crystal 30 is introduced.The bias current that biasing circuit 340 produces causes producing at the grid of transistor M1 (being the output of inverting amplifier 310) oscillator signal of an anti-phase amplification.The oscillator signal of the amplification that peak detector part 330 is more anti-phase and reference signal, increase along with the amplitude of oscillator signal, peak detector part 330 will impel the bias current of biasing circuit part 340 to reduce, and the amplitude stabilization of oscillator signal is in needed level the most at last.

In the above-described embodiments, Self-Tuning Regulator has been isolated power supply noise, and therefore, crystal-oscillator circuit has very good power supply noise to suppress ability.

Biasing circuit 340 can also comprise the 3rd branch road in the first current mirror, and this branch road comprises PMOS transistor M4 and nmos pass transistor M5 and M6.The effect of M5 and M6 is to regulate the grid voltage of M13 in inverting amplifier circuit 310, thereby adjusts the resistance that M13 presents.

It may be noted that in Fig. 3, M13 plays DC balance resistance, and its gate voltage is used for realizing resistance R.

R=1/β(Vgs-Vth)

Here, β=μ C _oxw/L, W/L is the size of M13.Can see, Vgs is relevant with current mirror M5-M13 and M4-M11, and current mirror is controlled by the output current (I0) of peak detector.The relation of Io and Vgs is followed

$\mathrm{Vgs}=\mathrm{Vth}+\sqrt{\frac{\mathrm{<figure-callout\; id="0"\; label="I"\; filenames="HDA0000373800070000041.png"\; state="\{\{state\}\}">I</figure-callout>}0}{\mathrm{\&beta;}}}$

Like this, R will be controlled by Io.Fosc is lower, and Io is lower, and R is larger; Fosc is higher, and Io is higher, and R is less.

Fig. 4 is the crystal-oscillator circuit schematic diagram of the another embodiment of the utility model.Crystal-oscillator circuit shown in Fig. 4 has increased a narrow band filter on the basis of the crystal-oscillator circuit of Fig. 3.This filter is arranged in biasing circuit, comprises at the input of circuit of biasing and the switching capacity LPF(low pass filter between output) 40, frequency detector 42 and Fractional-N frequency device 44.

Switching capacity filter 40 and resistance R 2 are connected in series between M8 and the grid of M3.The grid of M3 is also by capacitor C 2 ground connection.Switching capacity filter 40 alternately switches on and off electric capacity under the control of switching frequency fc, plays low pass filter, and it is equivalent to resistance is 1/fcC _lresistance, C wherein _lcapacitance for switching capacity.The value of C2 is generally at several pF, the value of R2 generally at a few K ohm to tens these magnitudes of K ohm.Therefore, switching capacity filter 40, R2 and C2 play low pass filter.

Fractional-N frequency device 44 is made Fractional-N frequency by the output frequency signal of crystal oscillator, and the signal after Fractional-N frequency is as the operating frequency of switching capacity filter 40.

Frequency detector 42 detects the output frequency signal of crystal oscillator.When crystal oscillator enters into stable state, when required frequency signal being detected, frequency detector 42 output useful signal Fosc_ready, open switch 46, thereby make to act on the grid of transistor M3 by switching capacity filter 40 from the voltage signal of transistor M8.

When oscillator starting, switching capacity filter 40 is bypassed.Enable switch capacitive filter 40 when frequency detector 42 is ready for having stablized at oscillator.So, the double effects of low jitter in the time of can reaching quick startup vibration and vibrational stabilization.

Fig. 5 has illustrated a kind of structural representation of switching capacity filter 40.Suppose that, in switching capacity filter 40, the switching frequency of switch is by F _oscfractional-N frequency, i.e. F _div=F _osc/ N.If suppose that the frequency of input signal Vin is much smaller than F _div, have

$\frac{\mathrm{Vout}\left(s\right)}{\mathrm{Vin}\left(s\right)}=\frac{1}{1+s\frac{T}{C1}\mathrm{<figure-callout\; id="2"\; label="C"\; filenames="HDA0000373800070000022.png"\; state="\{\{state\}\}">C</figure-callout>}2}$

Wherein, T=1/F _div.

The bandwidth f of switching capacity filter _3dB=C1/ (2* π * T*C2).

If make C2=1000C1, N=1000, so f _3dB=F _osc/ (1000,000*2* π).

In the case, switching capacity filter bandwidth will be F _osc1,000,000/, this is by enough low to by nearly all noise filtering from Vin.

Above-mentioned narrow band filter has significantly improved jitter performance, and this is that only the noise of filter self can limit the jitter level of oscillator because come all noises of Self-Tuning Regulator, peak detector, current mirror all by filtering.

In an example, for the ease of being completely integrated on chip, narrow band filter is realized by switched-capacitor circuit, and its clock is from the frequency division output of pierce circuit.Those skilled in the art will recognize that, can adopt the narrow band filter of other type, and not depart from scope of the present utility model.

Fig. 6 (a) and Fig. 6 (b) have illustrated the analog result of crystal oscillator.From Fig. 6 (a), oscillating current i startup stage larger, reach 3.5 milliamperes, and be 500 microamperes (Fig. 6 (b)) at stabilization sub stage current drain.And the output voltage V of Self-Tuning Regulator (ckl) is always comparatively stable.Fig. 6 (b) is near the enlarged drawing of the voltage current waveform of 800 microseconds of Fig. 6 (a), and as seen from the figure, output voltage has more consistent duty ratio and frequency, and the shake of voltage is very little.

Above-described embodiment; the purpose of this utility model, technical scheme and beneficial effect are further described; institute is understood that; the foregoing is only embodiment of the present utility model; and be not used in and limit protection range of the present utility model; all within spirit of the present utility model and principle, any modification of making, be equal to replacement, improvement etc., within all should being included in protection range of the present utility model.

Claims (11)

1. a crystal-oscillator circuit, comprising:

Crystal resonator circuit, produces the oscillator signal that has predetermined oscillation frequency;

See-saw circuit, has the first amplifier in, the second amplifier in and inverting amplifier output, and the first amplifier in is coupled to oscillator and receives oscillator signal; Wherein, inverting amplifier is exported anti-phase amplification output signal;

Biasing circuit, has biasing circuit input and biasing circuit output, and biasing circuit output produces the biasing circuit output signal of being controlled by biasing circuit input, and biasing circuit output signal is coupled to the second amplifier in;

Peak detection circuit, more anti-phase amplification output signal and reference signal and regulate peak detector output signal, and peak detector output signal is sent into the input of biasing circuit;

Wherein, described biasing circuit comprises self-adjusting circuit, for the second input of insulating power supply and inverting amplifier.

2. crystal-oscillator circuit as claimed in claim 1, wherein peak detection circuit comprises the low pass filter that the first resistance (R1) and the first electric capacity (C1) form.

3. crystal-oscillator circuit as claimed in claim 1, wherein see-saw circuit comprises the first nmos pass transistor (M1), the 2nd PMOS transistor (M2) and the second resistance (M13), wherein one end of the grid of the first nmos pass transistor, the transistorized grid of the 2nd PMOS and the second resistance is connected to the output of inverting amplifier circuit, the drain electrode of the first nmos pass transistor, the transistorized source electrode of the 2nd PMOS are connected with the other end of the second resistance, and the transistorized drain electrode of the 2nd PMOS is connected to the second input of inverting amplifier; The source ground of the first nmos pass transistor.

4. crystal-oscillator circuit as claimed in claim 3, wherein the second resistance consists of nmos pass transistor.

5. crystal-oscillator circuit as claimed in claim 1, wherein biasing circuit comprises 12NMOS transistor (M12), the first current source (M11 and M7) and the second current source (M8 and M3), the transistorized grid of 12NMOS is connected to the input of biasing circuit, the transistorized drain electrode of 12NMOS is connected on first branch road (M11) of the first current source, second branch road (M7) of the first current source is connected on first branch road (M8) of the second current source, and second branch road (M3) of the second current source is connected to the output of biasing circuit.

6. crystal-oscillator circuit as claimed in claim 5, wherein the first current source and/or the second current source consist of transistor.

7. crystal-oscillator circuit as claimed in claim 6, wherein the first branch road of the second current source is the mirror image of the second branch road of the second current mirror, forms thus self-adjusting circuit.

8. crystal-oscillator circuit as claimed in claim 1, wherein biasing circuit comprises the narrow band filter being connected between biasing circuit input and output, carries out low-pass filtering under the first frequency lower than oscillator frequency of oscillation; Biasing circuit also comprises frequency detector, oscillator frequency do not reach stable in by-pass switch capacitive filter.

9. crystal-oscillator circuit as claimed in claim 1, wherein narrow band filter is switching capacity filter.

10. crystal-oscillator circuit as claimed in claim 8, comprises the low pass filter that the 3rd resistance (R2) and the 3rd electric capacity (C2) form.

11. crystal-oscillator circuits as claimed in claim 8, comprise frequency divider, produce the described first frequency lower than oscillator frequency of oscillation.

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