CN203447298U

CN203447298U - Human body reaction speed testing system

Info

Publication number: CN203447298U
Application number: CN201320572994.5U
Authority: CN
Inventors: 刘保垣; 姜光远; 丛昉琦; 王志军
Original assignee: Changchun Normal University
Current assignee: Changchun Normal University
Priority date: 2013-09-16
Filing date: 2013-09-16
Publication date: 2014-02-26
Anticipated expiration: 2023-09-16

Abstract

The utility model relates to a human body reaction speed testing system. The system comprises a computer with a PCI (peripheral component interconnect) bus, a PCI interface device connected to the PCI bus of the computer, and a testing terminal used for testing human body reaction capacity, wherein the PCI interface device consists of five functional modules which are connected in sequence, namely a PCI-ISA (industry standard architecture) bus conversion bridge module, an address decoding and data latching module, a switching value input module, a switching value output module and a timing and calculation module; the testing terminal is formed by a testing platform, and 104 touch switches which are provided with lamps and arranged on the testing platform; power of the touch switches is supplied by a mainboard, and pins of the touch switches are connected with input and output DI/DO (data input/data output) pins on the PCI interface device. The system is low in cost, and good in stability and accuracy.

Description

Response speed of human body test macro

Technical field

This utility model relates to a kind of test macro, and a kind of being specifically designed to measured the also test macro of supplemental training human physiological reaction speed specifically.

Background technology

The current test for response speed of human body, the metering time method of extensive use is according to measuring the discharge time of electric capacity, this seems coarse and then lacks accuracy, and known normal person's respond is all in Millisecond level, this just requires data collection and analysis technology more accurately, one mentions the requirement to processing speed, we expect the disposal ability of CPU and the speed of bus transfer naturally, under certain CPU disposal ability, take certain advanced bussing technique can improve significantly speed and the accuracy of communication.Very advanced bus mechanism is exactly pci bus at present, so we attempt to develop a kind of data acquisition equipment based on pci bus, completes the test to human response's ability.

Summary of the invention

The purpose of this utility model is for the deficiencies in the prior art, and a kind of response speed of human body test macro based on pci bus is provided, that this system becomes is very low, stability and accuracy good.

The purpose of this utility model is to realize like this, this system comprises: with the computer of pci bus, connect the pci interface device on computer PCI bus, be used for the test terminal to human response's aptitude tests, described pci interface device is by the PCI-ISA bus Bridge module connecting successively, address decoding and data latch module, switching input module, switching value output module and timer counter module five functional module form, described test terminal consists of testboard and 104 band lamp soft-touch controls that are arranged on testboard, the power supply of described soft-touch control adopts the mode of main board power supply, the pin of soft-touch control is connected with the input and output DI/DO pin on pci interface device.

The utlity model has simple and reasonablely, become very low, stability and accuracy are good, simple operation and other advantages.Through great many of experiments, test shows: the operation of this utility model response speed of human body test macro is very stable, reaches designing requirement completely, and test data can correctly reflect objective circumstances substantially.

Accompanying drawing explanation

Fig. 1 is response speed of human body test macro overall structure schematic diagram.

Fig. 2 is this utility model test terminal structural representation.

Fig. 3 is this utility model pci interface circuit diagram.

The specific embodiment

As shown in Figure 1: this system comprises: with the computer 1 of pci bus 2, the pci interface device 3 that connects computer 1, the test terminal 4 that connects pci interface device 3, described pci interface device 3 is comprised of PCI-ISA bus Bridge module 5, address decoding and data latch module 6, switching input module 7, switching value output module 8 and timer counter module 9 five functional modules, described test terminal 4 consists of testboard 10 and 104 band lamp soft-touch controls 11 that are arranged on testboard 20

On described testboard 10, each digital output (DO0-DO63) that is directly connected on interface card with the anodal pin of lamp soft-touch control 11 is upper, by motherboard power supply, is powered, and output voltage is Transistor-Transistor Logic level (0～5V), and negative pole pin altogether.On each anodal pin, draw in addition two wires, one is connected to interface card digital quantity input (DI0-DI63) above, and the level while making a response in order to gathering testee changes, and requiring incoming level is also Transistor-Transistor Logic level (0～5V).Another is connected on interface card GATE0 pin through a multichannel or door as the chip selection signal to 8253, and the initialization in order to enumerator, provides and test accurately starting point.

Described computer 1, for executive utility, completes test, assessment and printing function; Pci bus in computer 1 is used for connecting pci interface device 3, by from test terminal 4 information exchanges that gather cross pci interface card 3 and be transported to computer 1, data acquisition; Pci interface device 3 is controlled for PCI-ISA bus associated modules, realizes the output of control signal, testee are judged to the collection of signal and the mensuration of time; Test terminal 4 is for completing the test to human response's ability;

As shown in Figure 2: described pci interface device 3 is comprised of five functional module, what this five functional module adopted is all prior aries, they comprise PCI-ISA bus Bridge module 5, address decoding and data latch module 6, switching input module 7, switching value output module 8 and timer counter module 9, wherein:

1., PCI-ISA bus Bridge module 5: be comprised of PCI9052 and EEPROM and 33MHz clock (being accelerated to obtain through PCI9052 by 8MHz clock), task is to convert pci bus signal to isa bus signal;

2. address decoding and data latch module 6: mainly by GAL16V8 chip, controlled.Effect is that address signal and control signal that PCI9052 is sent are carried out logical combination, produces the selection signal to other functional chip after decoding;

3., switching input module 7: effect is the sampling of being responsible for the input signal of control level, and 64 way switch amount input signals are inputted by 40 core IDC and 50 core IDC type joints, and input signal is Transistor-Transistor Logic level (0～5V).Input signal reads in computer through 74LS245 data buffer.Take 8 and read I/O port, while being input as high level, the value of reading in is " 1 "; While being input as low level, the value of reading in is " 0 ".While powering on, the value of reading in is " 0 ".

4., switching value output module 8: effect is the sampling of being responsible for the output signal of control level, and the digital signal of computer export is exported through two 40 core IDC joints by 8 74LS273 latch.Output signal is Transistor-Transistor Logic level (0～5V).Taking and write 8 I/O ports, during output " 1 ", is high level; While being output as " 0 ", it is low level.While powering on, output valve is low.

5., timer counter module 9: during design, adopt timer conter 8253, its 3 passages are set to respectively: passage 0 is for regularly using, CLK0 connects 1MHz crystal oscillator signal, OUT0 is connected on INTA0, as Interruption, use, passage 1 and passage 2 are for step-by-step counting use, and CLK1,2 signals are connected on 50 core IDC plugs.

Work process

The pci interface card of having tested is inserted on a certain PCI slot of computer motherboard, then start computer, in operating system, detect after this PnP device, device driver and the application program writing is in advance installed immediately, driver and the required dynamic link libraries file (DLL) of interapplication communications are copied in system folder simultaneously, during standby application program operation, use.Testee, selected after certain test pattern, corresponding programmed instruction transfers to test terminal by CPU by pci bus and pci interface card.Testee is seeing that lamp judges reaction (closing this lamp) after bright at once.The level that input circuit collects this lamp on test terminal changes, and control sequence sends the instruction of reading rolling counters forward value immediately, after conversion, deposits this time value in data base, writes down the number of times of testee's correct response simultaneously, in order to analysis and assessment, uses.Next group control program is carried out simultaneously, and process is same as described above, arrives after the regulation testing time, and in calling data storehouse, all results are assessed marking, and then testee is carried out to special training.

Claims

1. a response speed of human body test macro, it is characterized in that: this system comprises: with the computer (1) of pci bus (2), connect the pci interface device (3) in computer (1) pci bus (2), be used for the test terminal of human response's aptitude tests (4), described pci interface device (3) is by the PCI-ISA bus Bridge module (5) connecting successively, address decoding and data latch module (6), switching input module (7), switching value output module (8) and timer counter module (9) five functional module form, described test terminal (4) is by testboard (10) and be arranged on 104 band lamp soft-touch controls (11) formation on testboard (10), the power supply of described soft-touch control (11) adopts the mode of main board power supply, the pin of soft-touch control (11) is connected with the input and output DI/DO pin on pci interface device (3).