CN203406831U - Amplification circuit with zero correction circuit - Google Patents

Amplification circuit with zero correction circuit Download PDF

Info

Publication number
CN203406831U
CN203406831U CN201320411513.2U CN201320411513U CN203406831U CN 203406831 U CN203406831 U CN 203406831U CN 201320411513 U CN201320411513 U CN 201320411513U CN 203406831 U CN203406831 U CN 203406831U
Authority
CN
China
Prior art keywords
circuit
amplifying circuit
zero correction
resistance
instrument amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201320411513.2U
Other languages
Chinese (zh)
Inventor
柳翼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Changsha University of Science and Technology
Original Assignee
Changsha University of Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Changsha University of Science and Technology filed Critical Changsha University of Science and Technology
Priority to CN201320411513.2U priority Critical patent/CN203406831U/en
Application granted granted Critical
Publication of CN203406831U publication Critical patent/CN203406831U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Amplifiers (AREA)

Abstract

The utility model discloses an amplification circuit with a zero correction circuit. The input end of the amplification circuit is connected with a signal acquisition circuit, and the output end of the amplification circuit is connected with a microcontroller through an analog-digital conversion circuit. The amplification circuit comprises a first-level amplification circuit, a second-level amplification circuit, the zero correction circuit and a filter circuit. The first-level amplification circuit and the second-level amplification circuit are cascaded, the second-level amplification circuit is composed of an instrument amplifier and a peripheral circuit, the zero correction circuit is connected with the second-level amplification circuit, and the filter circuit is connected between the second-level amplification circuit and the analog-digital conversion circuit. When output signals of the signal acquisition circuit are amplified, noise, temperature excursion and other interferences are effectively restrained, stable and reliable analog signals are provided for subsequent data acquisition, and the amplification circuit has the advantages that input impedance is high, noise is low, linear errors are small, and offset drift is low, and also has the advantages of being simple in circuit structure, and easy to realize.

Description

Amplifying circuit with zero correction
Technical field
The utility model relates to a kind of amplifying circuit, especially relates to a kind of amplifying circuit with zero correction.
Background technology
Existing amplifying circuit is direct-coupling or the resistance-capacitance coupled amplifier that utilizes parametric compensation principle mostly.Yet direct coupled amplifier has also amplified temperature and has floated when amplifying useful direct current signal, although and resistance-capacitance coupled amplifier can suppress temperature and floats, can not be used for the signal that amplifies faint direct current signal or slowly change; And the noise being brought by amplifier is also inevitable.
Utility model content
The utility model proposes a kind of simple in structure, can effectively suppress the amplifying circuit with zero correction that disturbs, when providing amplification to signal, noise, temperature are floated etc. to interference provides effective inhibition.
The utility model adopts following technical scheme to realize: a kind of amplifying circuit with zero correction, the input of this amplifying circuit connects signal acquisition circuit, the output of this amplifying circuit connects microcontroller by analog to digital conversion circuit, this amplifying circuit comprises: one-level amplifying circuit and the second amplifying circuit of cascade, and second amplifying circuit is comprised of instrument amplifier and peripheral circuit; The zero correction circuit that connects second amplifying circuit; Be connected to the filter circuit between second amplifying circuit and analog to digital conversion circuit;
Wherein, the peripheral circuit of instrument amplifier comprises: be connected to the resistance R 1 between the output of one-level amplifying circuit and the positive input terminal of instrument amplifier; The resistance R 2 and the capacitor C 13 that between the negative input end that is connected to instrument amplifier and ground, are connected in series mutually, and resistance R 2 is connected zero correction circuit with the common port of capacitor C 13; Be connected to the resistance R 17 and the variable resistor VR1 that between two gain-adjusted ends of instrument amplifier, are connected in series mutually; The power circuit that connects the positive power source terminal of instrument amplifier; Be connected to the reference circuit of the reference edge of instrument amplifier.
Wherein, zero correction circuit comprises the operational amplifier U1 of output reference voltage, and the resistance R 4, variable resistor VR2 and the resistance R 3 that are connected in series successively, and the tap of variable resistor VR2 couples the negative input end of instrument amplifier U3 in second amplifying circuit.
Wherein, filter circuit is Order RC active filter circuit.
Compared with prior art, the utlity model has following beneficial effect:
The utility model is when providing amplification to the output signal of Acquisition Circuit, noise, temperature are floated etc. to interference effective inhibition is provided, can be follow-up data collection reliable and stable analog signal is provided, there is the features such as high input impedance, low noise, low linearity error, low offset drift, also have circuit structure simple, realize and be easy to advantage.
Accompanying drawing explanation
Fig. 1 is the structural representation of the utility model embodiment;
Fig. 2 is partial circuit schematic diagram of the present utility model.
Embodiment
As shown in Figure 1, embodiment of the utility model comprises: signal acquisition circuit 10, the signal amplification circuit 20 that is connected to signal acquisition circuit 10 outputs, the analog to digital conversion circuit 30 that is connected to signal amplification circuit 20 outputs and microcontroller 40.Wherein, signal amplification circuit 20 comprises: connected one-level amplifying circuit 21, second amplifying circuit 22 and filter circuit 23 successively, and the zero correction circuit 24 being connected with second amplifying circuit 22.
In general, signal acquisition circuit 10 is sensor circuit, such as pressure sensor, temperature sensor, etc.Collection signal from signal acquisition circuit 10 outputs, is carried out preposition amplification and noise is effectively suppressed by one-level amplifying circuit 21, and the output signal of 22 pairs of one-level amplifying circuits 21 of second amplifying circuit is done further to amplify, and multiplication factor is adjustable.23 of filter circuits allow the signal of assigned frequency section to pass through, and the signal of all the other frequency bands is suppressed.Zero correction circuit 24 provides zero correction function, and while there is no signal output with signal acquisition circuit, whole amplifying circuit output voltage is zero.The output signal of filter circuit 23 is sent to microcontroller 40 through analog to digital conversion circuit 30 and carries out Digital Signal Processing.
Figure 2 shows that the circuit diagram of second amplifying circuit 22 and zero correction circuit 24 in Fig. 1.Second amplifying circuit 22 is that the peripheral circuit by instrument amplifier U3 and instrument amplifier U3 forms.Zero correction circuit 24 is to consist of the peripheral circuit of operational amplifier U1, operational amplifier U1, resistance R 4, variable resistor VR2 and resistance R 3, and resistance R 4, variable resistor VR2 and resistance R 3 are connected in series successively.
Wherein, the peripheral circuit of instrument amplifier U3 comprises: be connected to the resistance R 1 between the output of one-level amplifying circuit 21 and the positive input terminal VIN+ of instrument amplifier U3; The resistance R 2 and the capacitor C 13 that between the negative input end VIN-that is connected to instrument amplifier U3 and ground, are connected in series, and resistance R 2 is connected the tap of variable resistor VR2 with the common port of capacitor C 13; Be connected to two gain-adjusted end RG1 of instrument amplifier U3 and resistance R 17 and the variable resistor VR1 between RG2, resistance R 17 serial connection variable resistor VR1, and the tap of variable resistor VR1 connects RG2 port, by regulating the resistance of variable resistor VR1 to carry out the gain of regulation meter amplifier U3; The positive power source terminal of instrument amplifier U3 connects power circuit, and this power circuit comprises resistance R 9 and inductance L 4 between the external power source of the positive power source terminal that is serially connected in instrument amplifier U3 and+10V, at the two ends of resistance R 9, passes through respectively capacitor C 11 and capacitor C 14 ground connection; The negative power end ground connection of instrument amplifier U3; The reference edge of instrument amplifier U3 connects reference circuit, this reference circuit comprise with external power source between contact resistance R10 and inductance L 5, between the two ends of resistance R 10 and ground, be connected capacitor C 12 and capacitor C 15; Voltage signal V2 after the output OUT output amplification point of instrument amplifier U3 is to filter circuit 23.
Wherein, the peripheral circuit of operational amplifier U1 comprises: the positive input terminal and the resistance R between ground 6 that are connected to operational amplifier U1; Be connected to negative input end and the resistance R between output 18 of operational amplifier U1, and the resistance R 16 and the capacitor C 8 that between the negative input end that is connected to operational amplifier U1 and ground, are connected in series mutually.
Operational amplifier U1 output-2.5V reference voltage, operational amplifier U1 forms zero correction circuit 24 with waiting device.When signal acquisition circuit 10 is when not having image data, output signal is non-vanishing, through one-level amplifying circuit 21, amplify, its output signal VI is also not equal to zero, by regulating the resistance of adjustable resistance VR2 on zero correction circuit 24, make voltage V1 on the negative input end of instrument amplifier U3 equal VI, the output voltage V 2 of the second amplifying circuit 22 forming through devices such as instrument amplifier U3 also just equals zero, and zero correction function has just realized.The general Order RC active filter circuit that adopts of filter circuit 23, rear filtering interfering is processed in circuit 23 filtering after filtering, just can provide stable, reliable analog signal to follow-up data collection.
The foregoing is only preferred embodiment of the present utility model; not in order to limit the utility model; all any modifications of doing within spirit of the present utility model and principle, be equal to and replace and improvement etc., within all should being included in protection range of the present utility model.

Claims (3)

1. the amplifying circuit with zero correction, the input of this amplifying circuit connects signal acquisition circuit, the output of this amplifying circuit connects microcontroller by analog to digital conversion circuit, it is characterized in that, this amplifying circuit comprises: one-level amplifying circuit and the second amplifying circuit of cascade, and second amplifying circuit is comprised of instrument amplifier and peripheral circuit; The zero correction circuit that connects second amplifying circuit; Be connected to the filter circuit between second amplifying circuit and analog to digital conversion circuit;
Wherein, the peripheral circuit of instrument amplifier comprises: be connected to the resistance R 1 between the output of one-level amplifying circuit and the positive input terminal of instrument amplifier; The resistance R 2 and the capacitor C 13 that between the negative input end that is connected to instrument amplifier and ground, are connected in series mutually, and resistance R 2 is connected zero correction circuit with the common port of capacitor C 13; Be connected to the resistance R 17 and the variable resistor VR1 that between two gain-adjusted ends of instrument amplifier, are connected in series mutually; The power circuit that connects the positive power source terminal of instrument amplifier; Be connected to the reference circuit of the reference edge of instrument amplifier.
2. according to claim 1 with the amplifying circuit of zero correction, it is characterized in that, zero correction circuit comprises the operational amplifier U1 of output reference voltage, and the resistance R 4, variable resistor VR2 and the resistance R 3 that are connected in series successively, and the tap of variable resistor VR2 couples the negative input end of instrument amplifier U3 in second amplifying circuit.
3. according to claim 2 with the amplifying circuit of zero correction, it is characterized in that, filter circuit is Order RC active filter circuit.
CN201320411513.2U 2013-07-11 2013-07-11 Amplification circuit with zero correction circuit Expired - Fee Related CN203406831U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201320411513.2U CN203406831U (en) 2013-07-11 2013-07-11 Amplification circuit with zero correction circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201320411513.2U CN203406831U (en) 2013-07-11 2013-07-11 Amplification circuit with zero correction circuit

Publications (1)

Publication Number Publication Date
CN203406831U true CN203406831U (en) 2014-01-22

Family

ID=49942750

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201320411513.2U Expired - Fee Related CN203406831U (en) 2013-07-11 2013-07-11 Amplification circuit with zero correction circuit

Country Status (1)

Country Link
CN (1) CN203406831U (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108055018A (en) * 2017-11-28 2018-05-18 东华理工大学 The filter circuit of digital signal
CN108377135A (en) * 2018-04-14 2018-08-07 芜湖拓达电子科技有限公司 A kind of signal acquiring system
CN108551334A (en) * 2018-04-14 2018-09-18 芜湖泰庆电子科技有限公司 A kind of signal acquiring system based on fortune amplifier circuit
CN108566170A (en) * 2018-04-14 2018-09-21 芜湖拓达电子科技有限公司 A kind of operation amplifier circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108055018A (en) * 2017-11-28 2018-05-18 东华理工大学 The filter circuit of digital signal
CN108377135A (en) * 2018-04-14 2018-08-07 芜湖拓达电子科技有限公司 A kind of signal acquiring system
CN108551334A (en) * 2018-04-14 2018-09-18 芜湖泰庆电子科技有限公司 A kind of signal acquiring system based on fortune amplifier circuit
CN108566170A (en) * 2018-04-14 2018-09-21 芜湖拓达电子科技有限公司 A kind of operation amplifier circuit

Similar Documents

Publication Publication Date Title
CN203406831U (en) Amplification circuit with zero correction circuit
CN103760943B (en) A kind of slew rate enhancing circuit being applied to LDO
CN104485897A (en) Correlated double sampling switch capacity amplifier with offset compensation
CN203537332U (en) Power source sampled signal amplifying circuit
CN208506122U (en) A kind of bidirectional current sample circuit
CN203416227U (en) Small signal amplification circuit
CN102355263B (en) Improved signal acquisition conditioning circuit
CN101414807B (en) Signal amplification circuit
CN209390021U (en) A kind of charge voltage converter amplifier circuit and electronic device
CN203000929U (en) No-coupling capacitance electrocardiosignal pre-amplification electric circuit
CN204089737U (en) Realize the high-precision amplifying structure of variable gain
CN107272810A (en) A kind of reference voltage source temperature drift compensation conditioned circuit
CN107219392B (en) Real-time current signal data processing system
CN104811181A (en) Current-to-voltage conversion circuit with input bias and active power filtering effects and current-to-voltage conversion method
CN204313869U (en) A kind of Collection device
CN204559542U (en) A kind of current-to-voltage converting circuit with inputting biased and active power filtering
CN103869863B (en) Sensor conditioning circuit
CN204334505U (en) Variable gain differential amplifier circuit
CN204633754U (en) A kind of conversion single-ended signal device
CN203632627U (en) Difference signal amplification circuit
CN203933538U (en) A kind of intelligent small voltage is measured amplifying circuit
CN201322804Y (en) CCD analog signal processing circuit of space multispectral remote sensor
CN203872147U (en) High-precision grouting data acquisition circuit
CN202059390U (en) Improved signal acquisition and conditioning circuit
CN103684298A (en) High-gain differential signal amplification circuit

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20140122

Termination date: 20140711

EXPY Termination of patent right or utility model