CN204313869U - A kind of Collection device - Google Patents
A kind of Collection device Download PDFInfo
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- CN204313869U CN204313869U CN201520021588.9U CN201520021588U CN204313869U CN 204313869 U CN204313869 U CN 204313869U CN 201520021588 U CN201520021588 U CN 201520021588U CN 204313869 U CN204313869 U CN 204313869U
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- 238000006243 chemical reaction Methods 0.000 claims abstract description 29
- 239000003990 capacitor Substances 0.000 claims abstract description 7
- 238000001914 filtration Methods 0.000 claims description 13
- 230000003321 amplification Effects 0.000 abstract description 11
- 238000000034 method Methods 0.000 abstract description 11
- 238000003199 nucleic acid amplification method Methods 0.000 abstract description 11
- 238000012423 maintenance Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 5
- 238000004891 communication Methods 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000005070 sampling Methods 0.000 description 2
- 101100156949 Arabidopsis thaliana XRN4 gene Proteins 0.000 description 1
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 description 1
- 101100215777 Schizosaccharomyces pombe (strain 972 / ATCC 24843) ain1 gene Proteins 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- 238000002474 experimental method Methods 0.000 description 1
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- 229910052744 lithium Inorganic materials 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
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Abstract
The utility model discloses a kind of Collection device, and it comprises: sensor; The current source be connected with sensor; The analog to digital conversion circuit be connected with the output terminal of sensor, two input ends of two input end of analog signal of this analog to digital conversion circuit series resistor R1 and resistance R2 connecting sensor respectively, meet filter capacitor C5 and filter capacitor C6 between these two input end of analog signal; The reference voltage circuit be connected with the reference voltage end of this analog to digital conversion circuit, and this reference voltage end is by electric capacity C7 ground connection; By the arm processor that SPI interface is connected with this analog to digital conversion circuit; The power circuit be connected with sensor, analog to digital conversion circuit and reference voltage circuit respectively.The utility model can be connected the amplification process and signals collecting that realize various small-signal with various sensor, have simple, the easy to maintenance and application prospect advantage widely of circuit structure.
Description
Technical field
The utility model relates to Signal Collection Technology, especially relates to a kind of Collection device.
Background technology
In the field such as observing and controlling, instrument, the collection of small-signal and transmission directly can affect the quality of signal quality.Such as in sensing detection circuit, Signal sampling and processing part is not carried out, and distortion or disturbed pollution will occur the data that so sensor provides in acquisition and processing process, and the deterioration of this signal is irreversible often.
Prior art adopts one or more levels amplifying circuit to carry out amplification process to small-signal mostly.Be illustrated in figure 1 the schematic diagram of existing a kind of cascade in-phase amplification circuit for low level signal amplification, adopt two-level operating amplifier to carry out amplification process to small-signal.
And for example, CN2012207492450 proposes a kind of tiny signal capture card, comprises function commutation circuit, current source circuit, signal conditioning circuit, current sampling circuit, signal acquisition processing circuit and communication interface circuit.This patent remains and adopts multistage amplifier circuit to amplify small-signal.
Because general amplifier is all the direct-coupling or the RG-coupling amplifier that utilize parametric compensation principle, direct-coupled amplifier is also exaggerated temperature drift while the useful direct current signal of amplification, and although RG-coupling amplifier can suppress temperature drift, but can not be used for amplifying faint direct current signal or the slow signal changed, and in small signal amplification circuit, the noise brought by amplifier is also inevitable.
Utility model content
In order to overcome the defect of prior art, the utility model proposes a kind of small-signal exported sensor and amplify and the Collection device of acquisition process, the small-signal realized various kinds of sensors exports detects accurately and gathers.
The utility model adopts following technical scheme to realize: a kind of Collection device, and it comprises: sensor; The current source be connected with sensor; The analog to digital conversion circuit be connected with the output terminal of sensor, two input ends of two input end of analog signal of this analog to digital conversion circuit series resistor R1 and resistance R2 connecting sensor respectively, meet two filter capacitor C5 and filter capacitor C6 between these two input end of analog signal; The reference voltage circuit be connected with the reference voltage end of this analog to digital conversion circuit, and this reference voltage end is by electric capacity C7 ground connection; By the arm processor that SPI interface is connected with this analog to digital conversion circuit; The power circuit be connected with sensor, analog to digital conversion circuit and reference voltage circuit respectively.
Wherein, this power circuit comprises: the input end be connected with input power Vin; The LC filtering circuit be connected with input end, the output terminal connecting sensor of this LC filtering circuit and reference voltage circuit; Connect the first mu balanced circuit and second mu balanced circuit of the output terminal of LC filtering circuit respectively, the output terminal of this first mu balanced circuit, the output terminal of the second mu balanced circuit connect analog power input end and the digital power input end of this analog to digital conversion circuit respectively.
Wherein, this reference voltage circuit comprises the reference voltage source chip U2 that output voltage is+2.5V, the input pin IN of this reference voltage source chip U2 connects the output terminal of LC filtering circuit by resistance R3, ground connection after this resistance R3 serial capacitance C13, the NR pin of this reference voltage source chip U2 is by electric capacity C14 ground connection, and the output pin OUT of this reference voltage source chip U2 is connected with the reference voltage end of this analog to digital conversion circuit.
Wherein, this arm processor at least comprises RS232 interface, RS485 interface or USB interface.
Wherein, the chip U1 of this analog to digital conversion circuit to be model be ADS1255, this chip U1 reads to prepare pin by clock pins SCLK, numerical data input pin DIN, data output pins DOUT and data
be connected with arm processor respectively.
Compared with prior art, the utility model has following beneficial effect:
The utility model adopts high precision and the ADS1255 chip of band automatic growth control realizes analog to digital conversion circuit, noise is little, precision is high, and there is high voltage resolution, and by arm processor and ADS1255 chip with the use of the process further expanded the small-signal collected and follow-up utilization, therefore, the utility model can be connected the amplification process and signals collecting that realize various small-signal completely with various sensor.In addition, the utility model also adopts modular circuit structure, has the advantages that circuit structure is simple, easy to maintenance, and can be widely used in the numerous areas such as sensing, detection, instrument and meter, application prospect is extensive.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of existing a kind of cascade in-phase amplification circuit for low level signal amplification.
Fig. 2 is circuit structure module diagram of the present utility model;
Fig. 3 is the circuit module schematic diagram of power circuit;
Fig. 4 is partial circuit schematic diagram of the present utility model.
Embodiment
As shown in Figure 2, the utility model proposes a kind of small-signal exported sensor and amplify and the Collection device of acquisition process, this Collection device comprises: sensor 1; The current source 2 be connected with sensor 1, this current source 2 provides bias current for sensor 1, makes the output terminal output difference sub-signal of sensor 1; The analog to digital conversion circuit 4 be connected with the output terminal of sensor 1, after amplify, filtering etc. processes, converts digital signal to and exports for the differential signal exported sensor 1; The reference voltage circuit 5 be connected with analog to digital conversion circuit 4, this reference voltage circuit 5 provides reference voltage Vref for analog to digital conversion circuit 4; Be connected to the arm processor 6 of this analog to digital conversion circuit 4 output terminal, this arm processor 6 can process (such as amplitude rectification, gain calibration etc.) by predetermined manner the digital signal that this analog to digital conversion circuit 4 exports further, and provides interface circuit (at least comprise RS232 interface, RS485 interface or USB interface at least one of them) and host computer to carry out data communication; The power circuit 3 be connected with sensor 1, analog to digital conversion circuit 4 and reference voltage circuit 5 respectively.
Wherein, the two ends able to programme current source that a kind of output current can set, model is LT3092 that current source 2 adopts LINEAR company to release.
Shown in composition graphs 3, power circuit 3 comprises: the input end be connected with input power Vin (input power Vin is and+12V direct supply or+12V lithium battery group); The LC filtering circuit 31 be connected with input end, the output terminal of this LC filtering circuit 31 is the first output terminal of power circuit 3, and its output voltage Vout1 is+12V; Connect the first mu balanced circuit 32 and the second mu balanced circuit 33 of the output terminal of LC filtering circuit 31 respectively, the output terminal of this first mu balanced circuit 32 is the second output terminal of power circuit 3, and its output voltage Vout2 is+5V; The output terminal of this second mu balanced circuit 33 is the 3rd output terminal of power circuit 3, and its output voltage Vout3 is+3.3V.Wherein, first mu balanced circuit 32 and the second mu balanced circuit 33 all adopt low pressure difference linear voltage regulator chip (adopting model TPS7A4901 chip in such as the first mu balanced circuit 32) to realize, this is the common practise of those skilled in the art, is not described in detail in this.
Wherein, the first output terminal of power circuit 3 provides working power for sensor 1 and reference voltage circuit 5.
Shown in composition graphs 4.This analog to digital conversion circuit 4 adopts Texas Instruments (TI) company to release for commercial Application, the model with industry peak performance to be the chip U1 of ADS1255, and it is added a programmable digital-filter again formed by analog multichannel switch (MUX), input buffer (BUF), programmable gain amplifier (PGA), quadravalence delta-sigma modulator.The analog power input end (pin AVDD) of this chip U1 connects the output terminal (i.e. Vout2) of the first mu balanced circuit 32, and pin AVDD is by electric capacity C2 ground connection, the digital power input end (pin DVDD) of this chip U1 connects the output terminal (i.e. Vout3) of the second mu balanced circuit 33, and pin DVDD is by electric capacity C1 ground connection, two output terminals of sensor 1 connect two input end of analog signal (i.e. pin AIN0 and pin AIN1) of this chip U1 respectively after series resistor R1 and resistance R2, and meet two filter capacitor C5 and C6 between two input end of analog signal of this chip U1, reference voltage circuit 5 comprises the reference voltage source chip that output voltage is+2.5V, such as model is the chip U2 of MAX6225, the input pin IN of this chip U2 connects the output terminal (i.e. Vout1) of LC filtering circuit 31 by resistance R3, and ground connection after resistance R3 serial capacitance C13, the NR pin of this chip U2 is by electric capacity C14 ground connection, and the output pin OUT of this chip U2 is connected with the reference voltage end (i.e. pin VREFP) of this chip U1, for chip U1 provides the reference voltage of+2.5V, and the reference voltage end of this chip U1 (pin VREFP) is by electric capacity C7 ground connection.In addition, this chip U1 carries out data communication by SPI interface with arm processor: the clock pins SCLK of this chip U1 is connected with the pin SCLK of arm processor, for realizing synchronous with between arm processor of chip U1; The numerical data input pin DIN of this chip U1 and numerical data output pin DOUT is connected with wherein two PORT COM of arm processor, realizes reception and the transmission of data, and the data of chip U1 are read to prepare pin
be connected with a GPIO pin of arm processor, pass through pin
arm processor is produced interrupt, read by the pin DIN of chip U1 and pin DOUT the digital signal (this digital signal corresponds to sensor 1 testing result) that this chip U1 exports.
Result shows by experiment, and the utility model has the voltage resolution up to 5 μ V, can be connected the amplification process and signals collecting that realize various small-signal completely with various sensor.Therefore the utility model can be widely used in the numerous areas such as sensing, detection, instrument and meter, application prospect is extensive.
The foregoing is only preferred embodiment of the present utility model; not in order to limit the utility model; all do within spirit of the present utility model and principle any amendment, equivalent to replace and improvement etc., all should be included within protection domain of the present utility model.
Claims (5)
1. a Collection device, is characterized in that, comprising: sensor; The current source be connected with sensor; The analog to digital conversion circuit be connected with the output terminal of sensor, two input ends of two input end of analog signal of this analog to digital conversion circuit series resistor R1 and resistance R2 connecting sensor respectively, meet two filter capacitor C5 and filter capacitor C6 between these two input end of analog signal; The reference voltage circuit be connected with the reference voltage end of this analog to digital conversion circuit, and this reference voltage end is by electric capacity C7 ground connection; By the arm processor that SPI interface is connected with this analog to digital conversion circuit; The power circuit be connected with sensor, analog to digital conversion circuit and reference voltage circuit respectively.
2. a kind of Collection device according to claim 1, it is characterized in that, this power circuit comprises: the input end be connected with input power Vin; The LC filtering circuit be connected with input end, the output terminal connecting sensor of this LC filtering circuit and reference voltage circuit; Connect the first mu balanced circuit and second mu balanced circuit of the output terminal of LC filtering circuit respectively, the output terminal of this first mu balanced circuit, the output terminal of the second mu balanced circuit connect analog power input end and the digital power input end of this analog to digital conversion circuit respectively.
3. a kind of Collection device according to claim 1, it is characterized in that, this reference voltage circuit comprises the reference voltage source chip U2 that output voltage is+2.5V, the input pin IN of this reference voltage source chip U2 connects the output terminal of LC filtering circuit by resistance R3, ground connection after this resistance R3 serial capacitance C13, the NR pin of this reference voltage source chip U2 is by electric capacity C14 ground connection, and the output pin OUT of this reference voltage source chip U2 is connected with the reference voltage end of this analog to digital conversion circuit.
4. a kind of Collection device according to claim 1, it is characterized in that, this arm processor at least comprises RS232 interface, RS485 interface or USB interface.
5. according to claim 1-4 a kind of Collection device described in any one, it is characterized in that, the chip U1 of this analog to digital conversion circuit to be model be ADS1255, this chip U1 reads to prepare pin by clock pins SCLK, numerical data input pin DIN, data output pins DOUT and data
be connected with arm processor respectively.
Priority Applications (1)
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CN201520021588.9U CN204313869U (en) | 2015-01-12 | 2015-01-12 | A kind of Collection device |
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CN201520021588.9U CN204313869U (en) | 2015-01-12 | 2015-01-12 | A kind of Collection device |
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CN201520021588.9U Expired - Fee Related CN204313869U (en) | 2015-01-12 | 2015-01-12 | A kind of Collection device |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109765153A (en) * | 2018-12-29 | 2019-05-17 | 河南鑫安利职业健康科技有限公司 | Atmospheric dust based on GPS monitors system |
CN112290948A (en) * | 2020-10-30 | 2021-01-29 | 中国兵器工业集团第二一四研究所苏州研发中心 | High-precision analog-to-digital conversion circuit based on ADS1278 |
-
2015
- 2015-01-12 CN CN201520021588.9U patent/CN204313869U/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109765153A (en) * | 2018-12-29 | 2019-05-17 | 河南鑫安利职业健康科技有限公司 | Atmospheric dust based on GPS monitors system |
CN112290948A (en) * | 2020-10-30 | 2021-01-29 | 中国兵器工业集团第二一四研究所苏州研发中心 | High-precision analog-to-digital conversion circuit based on ADS1278 |
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Granted publication date: 20150506 Termination date: 20160112 |