CN203367271U - Array substrate and display device - Google Patents

Abstract

An embodiment of the utility model discloses an array substrate and a display device, wherein the display device is provided with the array substrate. The array substrate and the display device belong to the technical field of display, and solve the technical problem that inverted angles with downward openings are formed at the edge of a GOA area in the prior art, so that stability of electrical connection between a source and drain electrode metal and a grid electrode metal is affected. The array substrate comprises a display area and a GOA area. In the GOA area, a grid electrode metal, a grid insulating layer, an active layer, a transition layer and a source and drain electrode metal are formed one by one from bottom to top, and a through hole is provided through the transition layer, the active layer, and the grid insulating layer. The source and drain electrode metal is in electrical connection with the grid electrode metal via the through hole. And the etching rate of the transition layer is greater than that of the active layer. The array substrate applies to display devices including OLED panels, LCD televisions, LCD displays, cellphones, and tablet PCs.

Description

Array base palte and display unit

Technical field

The utility model belongs to the Display Technique field, is specifically related to a kind of array base palte and is provided with the display unit of this array base palte.

Background technology

Along with the development of Display Technique, Thin Film Transistor-LCD (Thin Film Transistor Liquid Crystal Display is called for short TFT-LCD) has occupied leading position in the flat panel display field.The increasing capable driving of array base palte (the Gate driver On Array that adopts in present TFT-LCD, GOA) technology, divide the GOA zone at the edges of boards of array base palte, in the GOA zone, gate metal is electrically connected to by the via hole that runs through gate insulation layer and active layer with the source-drain electrode metal, a part as gate driver circuit, to realize higher pixel-intensive degree (Pixel Per Inch, PPI).Simultaneously, in order to save the access times of mask plate in the array base palte manufacture process, usually utilize a mask plate technique to form in the GOA zone via hole that runs through gate insulation layer and active layer.For example, at senior super Wei Chang conversion (Advanced super Dimension Switch, ADS) in the manufacture process of type array base palte, utilize a mask plate technique at GOA zone etching active layer and gate insulation layer, form via hole, just can only by six mask plate techniques, form array base palte.

The inventor finds in realizing process of the present utility model, at least there is following problem in prior art: as shown in Figure 1, in figure, the left-half of underlay substrate 1 is the GOA zone, be formed with gate metal 21, gate insulation layer 3 and active layer 4 on the underlay substrate 1 in GOA zone, wherein active layer 4 is actual is comprised of two-layer, i.e. the metal heavily doped layer on upper strata and the amorphous silicon layer of lower floor.At via hole, carve in 30 erosion processes, the etch rate of metal heavily doped layer is more a lot of slowly than the etch rate of amorphous silicon layer, so working as gate insulation layer 3 and active layer 4 etches away fully, while forming via hole, the edge of active layer 4 can form the chamfering under shed, this will cause the source-drain electrode metal below of subsequent deposition to have space, affect the stability be electrically connected between source-drain electrode metal and gate metal in the GOA zone.

The utility model content

The utility model embodiment provides a kind of array base palte and has been provided with the display unit of this array base palte, solve the edge in GOA zone in the prior art and can form the chamfering under shed, affected the technical problem of the stability be electrically connected between source-drain electrode metal and gate metal in the GOA zone.

For achieving the above object, embodiment of the present utility model adopts following technical scheme:

The utility model provides a kind of array base palte, comprise viewing area and GOA zone, in described GOA zone, be formed with successively from bottom to up gate metal, gate insulation layer, active layer, transition zone, source-drain electrode metal, and offer the via hole that runs through described transition zone, described active layer and described gate insulation layer, described source-drain electrode metal is electrically connected to described gate metal by described via hole;

Wherein, the etch rate of described transition zone is greater than the etch rate of described active layer.

Preferably, the material of described transition zone is silicon nitride.

Further, the thin-film transistor in described viewing area (TFT) zone, comprise grid, gate insulation layer, active layer, source electrode and drain electrode from bottom to up successively;

Described source electrode and described drain electrode lay respectively at the both sides of described active layer, and are connected with described active layer.

The utility model also provides a kind of display unit, comprises above-mentioned array base palte.

Compared with prior art, technique scheme provided by the utility model has following advantage: set up transition zone on active layer, when the etching via hole of GOA zone, need etching transition zone, active layer and gate insulation layer, because the etch rate of transition zone is greater than the etch rate of active layer, after so via etch is complete, than active layer, having more transition zone is etched away, thereby form the positive angle of upward opening at the edge of transition zone and active layer, improved the stability be electrically connected between source-drain electrode metal and gate metal in the GOA zone.

The accompanying drawing explanation

In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, below will the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described.

The schematic diagram that Fig. 1 is existing array base palte;

The schematic diagram of the array base palte that Fig. 2 provides for embodiment of the present utility model;

The manufacture process schematic diagram of the manufacture method of the array base palte that Fig. 3 a to Fig. 3 j provides for embodiment of the present utility model.

Embodiment

Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the utility model embodiment is carried out to clear, complete description.

As shown in Figure 2, the array base palte that the utility model embodiment provides, comprise viewing area and GOA zone.In the GOA zone, comprise successively from bottom to up the gate metal 21, gate insulation layer 3, active layer 4, transition zone 5, the source-drain electrode metal 61 that are formed on underlay substrate 1, and offer the via hole 30 that runs through transition zone, active layer and gate insulation layer, source-drain electrode metal 61 is electrically connected to gate metal 21 by via hole 30.Wherein, the etch rate of transition zone 5 is greater than the etch rate of active layer 4, and the material of transition zone 5 is preferably silicon nitride (SiN _x).

Set up transition zone 5 on active layer 4, when the etching via hole 30 of GOA zone, need etching transition zone 5, active layer 4 and gate insulation layer 3, because the etch rate of transition zone 5 is greater than the etch rate of active layer 4, so, after via hole 30 etchings are complete, than active layer 4, have more transition zone 5 and be etched away, thereby form the positive angle of upward opening at the edge of transition zone 5 and active layer 4, improved the stability be electrically connected between source-drain electrode metal 61 and gate metal 21 in the GOA zone.

TFT zone in the viewing area of this array base palte, comprise successively from bottom to up grid 22, gate insulation layer 3, active layer 4, the source electrode 62 be formed on underlay substrate 1 and drain 63, source electrode 62 and drain electrode 63 lay respectively at the both sides of active layer 4, and are connected with active layer 4.In addition, also comprise pixel electrode 7 in viewing area, above GOA zone and viewing area, also comprise protective layer 8.

The array base palte that the utility model embodiment provides is ADS type array base palte, therefore in viewing area, also comprises public electrode 9.Certainly, in other embodiments, this array base palte can be also the array base palte of the other types beyond ADS.

The utility model also provides the manufacture method of above-mentioned array base palte, comprising:

S1: as shown in Figure 3 a, form the gate metal 21 in GOA zone and grid line (not shown) and the grid 22 of viewing area on underlay substrate 1.

Utilize conventional method, deposit gate metal layer on underlay substrate, recycling mask plate technique, can form the gate metal 21 in GOA zone and grid line and the grid 22 of viewing area through development, etching.

S2: as shown in Fig. 3 b, deposit successively gate insulation layer 3, active layer 4, transition zone 5 on underlay substrate 1.Wherein, the etch rate of transition zone 5 is greater than the etch rate of active layer 4, and the material of transition zone 5 is preferably SiN _x.

S3: etch away transition zone, active layer, the gate insulation layer in GOA zone, and the transition zone in the TFT zone in viewing area and part active layer, make the GOA zone form via hole.

Specifically can comprise:

S31: as shown in Figure 3 c, apply one deck photoresist 10 on underlay substrate 1, and by gray tone masking process and cineration technics, photoresist 10 is formed and remove zone, part reserve area and complete reserve area fully, wherein, remove the zone at regional corresponding gate metal 21 places fully, the TFT zone in the corresponding viewing area of part reserve area, corresponding remaining zone of reserve area fully.

S32: as shown in Figure 3 d, etch away and remove regional transition zone 5, active layer 4, gate insulation layer 3 fully, in the GOA zone, form via hole 30.

Because the etch rate of transition zone 5 is greater than the etch rate of active layer 4, thus via hole 30 etchings complete after, than active layer 4, have more transition zone 5 and be etched away, thereby form the positive angle of upward opening at the edge of transition zone 5 and active layer 4.

S33: as shown in Figure 3 e, by cineration technics, remove the photoresist 10 of part reserve area.

S34: as shown in Fig. 3 f, etch away transition zone 5 and the part active layer 4 of part reserve area, form the active layer in TFT.

S35: as shown in Fig. 3 g, by cineration technics, remove the photoresist 10 of complete reserve area.

S4: as shown in Fig. 3 h, in the GOA zone, form source-drain electrode metal 61, form data wire (not shown), source electrode 62 simultaneously in viewing area and drain 63, wherein, source-drain electrode metal 61 is electrically connected to gate metal 21 by via hole 30.

Utilize conventional method, sedimentary origin drain metal layer on underlay substrate 1, recycling mask plate technique, through developing, data wire, the source electrode 62 of source-drain electrode metal 61 that etching can form the GOA zone and viewing area and drain 63.In addition, forming source-drain electrode metal 61, data wire, source electrode 62 and draining after 63, also continuing to etch away all the other and be exposed to outer transition zone 5 and active layer 4.

Owing in the GOA zone, having formed via hole 30 before, so source-drain electrode metal 61 just can form and be electrically connected to gate metal 21 by via hole 30.

The manufacture method of this array base palte further comprises:

S5: as shown in Fig. 3 i, form pixel electrode 7 on underlay substrate 1.

S6: as shown in Fig. 3 j, form protective layer 8 on underlay substrate 1.

The array base palte that the utility model embodiment provides is ADS type array base palte, so the manufacture method of this array base palte also comprises:

S7: form public electrode 9 on underlay substrate 1, can form the array base palte that the utility model embodiment provides, as shown in Figure 2.

Above-mentioned steps S5 to S7 all can realize by conventional method, no longer be elaborated.

In the manufacture method of the array base palte that the utility model embodiment provides, by set up transition zone on active layer, and the etch rate of transition zone is greater than the etch rate of active layer, thereby after via etch is complete, form the positive angle of upward opening at the edge of transition zone and active layer, improved the stability be electrically connected between source-drain electrode metal and gate metal in the GOA zone.

The utility model also provides a kind of display unit, can be any product or parts with Presentation Function such as liquid crystal panel, Electronic Paper, oled panel, LCD TV, liquid crystal display, DPF, mobile phone, panel computer.This display unit comprises the array base palte that above-mentioned the utility model embodiment provides.

The display unit provided due to the utility model embodiment has identical technical characterictic with the array base palte that above-mentioned the utility model embodiment provides, so also can produce identical technique effect, solves identical technical problem.

The above; it is only embodiment of the present utility model; but protection range of the present utility model is not limited to this; anyly be familiar with those skilled in the art in the technical scope that the utility model discloses; the variation that can expect easily or replacement, within all should being encompassed in protection range of the present utility model.Therefore, protection range of the present utility model should be as the criterion with the protection range of claim.

Claims (4)

1. an array base palte, comprise viewing area and GOA zone, it is characterized in that: in described GOA zone, be formed with successively from bottom to up gate metal, gate insulation layer, active layer, transition zone, source-drain electrode metal, and offer the via hole that runs through described transition zone, described active layer and described gate insulation layer, described source-drain electrode metal is electrically connected to described gate metal by described via hole;

Wherein, the etch rate of described transition zone is greater than the etch rate of described active layer.

2. array base palte according to claim 1, it is characterized in that: the material of described transition zone is silicon nitride.

3. array base palte according to claim 1 and 2, it is characterized in that: the TFT regions in described viewing area comprises grid, gate insulation layer, active layer, source electrode and drain electrode from bottom to up successively;

Described source electrode and described drain electrode lay respectively at the both sides of described active layer, and are connected with described active layer.

4. a display unit, is characterized in that: comprise the described array base palte of claims 1 to 3 any one.

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