CN203366059U - Precise time control SMV message controller based on FPGA - Google Patents

Abstract

The utility model relates to the field of the verification of an intelligent transformer station digitized metering system in an electric power system, and a precise time control SMV message controller based on FPGA. The controller includes a message control module, a message transmitting module, a message receiving module, and a time setting module, the message control module is formed by a main CPU and is connected with the message transmitting module, the message receiving module, and the time setting module, the message transmitting module is controlled by FPGA and transmits a 9-2 message to a digitlized electric meter, a digitlized electric meter check meter transmits the 9-2 message to the message receiving module after receiving the second pulse signal of the digitlized electric meter, and the time setting module receives the GPS signal of a GPS module via a synchronous fiber. The precise time control SMV message controller realizes the time characteristic of the quantified and accurate control of SMV messages, changes the time delay variation and time jitter, and detects the digitized metering system of the intelligent transformer station.

Description

A kind of chronometer time realized based on FPGA is controlled SMV message controller

Technical field

The utility model relates to intelligent substation of electric power system the digitized measurement system verification field, is specifically related to a kind of chronometer time realized based on FPGA and controls SMV message controller.

Background technology

At present, the development of intelligent substation and digital transformer substation has entered into the large tracts of land engineering application stage, along with the extensive application of electronic mutual inductor, merge cells and intelligent cell, digital quantity input watt-hour meter has also started in the electric system large-area applications.Issue along with the Q/GDW 441-2010 of State Grid Corporation of China " intelligent substation Protection Technology standard "; the merge cells that time-based is controlled is also widely applied in intelligent substation, and the time-delay characteristics and the SMV message time jitter characteristic that wherein are combined unit have all been made clearer and more definite standard.But home and abroad does not all have clear and definite technical indicator to retrain the variation of SMV message delay at present; the parameters such as SMV message time jitter on relay protection, metering outfit uniformly-spaced the variation of impact, especially these time responses of layer equipment will affect the degree of meter characteristic.Because the digital quantity sampling value message sends according to discrete point, so the time response of pure digital source is the maximum characteristics of digital quantity message, the precision of time response has determined the precision of digital power source.

So from current present situation, in the urgent need to a kind of time response of installing the quantitatively accurate SMV of control message, change time delay variation, time jitter, detect the digitized measurement system of intelligent substation.

The utility model content

The purpose of this utility model is to provide a kind of chronometer time realized based on FPGA to control SMV message controller; solve current control method or install the variation that can't retrain the SMV message delay; the parameters such as SMV message time jitter on relay protection, metering outfit uniformly-spaced the variation of impact, especially these time responses of layer equipment on the problem of the impact of meter characteristic.

For solving above-mentioned technical matters, the utility model by the following technical solutions: a kind of chronometer time realized based on FPGA is controlled SMV message controller, comprises

Message control module, consist of host CPU, be connected with message sending module, message receiver module to the time module;

The message sending module, controlled by FPGA, to the digitizing watt-hour meter, sends the 9-2 message;

The message receiver module, after digitizing watt-hour meter tester just receives the pps pulse per second signal of digitizing watt-hour meter, the 9-2 message sent to the message receiver module;

To the time module, receive the gps signal of GPS module by synchronous optical fiber.

Further technical scheme is, described message control module is connected with the host computer link block.

A kind of chronometer time control method realized based on FPGA comprises the following steps:

Step 1, message control module sends the 9-2 message by the message sending module to the digitizing watt-hour meter;

Step 2, the digitizing watt-hour meter sends pps pulse per second signal to digitizing watt-hour meter tester;

Step 3, the pulsimeter that digitizing watt-hour meter tester sends according to received electric energy meter is calculated the electric weight that the digitizing watt-hour meter is accumulated within a period of time, the electric weight of tester within calculating during this period of time simultaneously, electric weight more between the two, show that ammeter is at error code or packet loss, time delay changes, the error in the situations such as time response;

Step 4, digitizing watt-hour meter tester sends the 9-2 message to the message receiver module be connected with message control module;

Step 5; Message control module by the time module receive the temporal information that the GPS module sends, carry out the rate of change in control time according to absolute time.

Compared with prior art, the beneficial effects of the utility model are: can retrain the variation of SMV message delay, the parameters such as SMV message time jitter on relay protection, metering outfit uniformly-spaced the variation of impact, especially these time responses of layer equipment will affect the degree of meter characteristic; Realized quantitatively accurately controlling the time response of SMV message, changed time delay variation, time jitter, detected the digitized measurement system of intelligent substation.

The accompanying drawing explanation

Fig. 1 is the connection diagram that a kind of chronometer time realized based on FPGA of the utility model is controlled an embodiment of SMV message controller.

Embodiment

In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein is only in order to explain the utility model, and be not used in restriction the utility model.

Fig. 1 shows the embodiment that a kind of chronometer time realized based on FPGA of the utility model is controlled SMV message controller: a kind of chronometer time realized based on FPGA is controlled SMV message controller, comprises

Message control module, consist of host CPU, be connected with message sending module, message receiver module to the time module;

The message sending module, controlled by FPGA, to the digitizing watt-hour meter, sends the 9-2 message;

The message receiver module, after digitizing watt-hour meter tester just receives the pps pulse per second signal of digitizing watt-hour meter, the 9-2 message sent to the message receiver module;

To the time module, receive the gps signal of GPS module by synchronous optical fiber.

Control another embodiment of SMV message controller according to a kind of chronometer time realized based on FPGA of the utility model, described message control module is connected with the host computer link block.

The utility model also shows an a kind of embodiment of the chronometer time control method realized based on FPGA: a kind of chronometer time control method realized based on FPGA comprises the following steps:

Step 1, message control module sends the 9-2 message by the message sending module to the digitizing watt-hour meter;

Step 2, the digitizing watt-hour meter sends pps pulse per second signal to digitizing watt-hour meter tester;

Step 3, the pulsimeter that digitizing watt-hour meter tester sends according to received electric energy meter is calculated the electric weight that the digitizing watt-hour meter is accumulated within a period of time, the electric weight of tester within calculating during this period of time simultaneously, electric weight more between the two, show that ammeter is at error code or packet loss, time delay changes, the error in the situations such as time response;

Step 4, digitizing watt-hour meter tester sends the 9-2 message to the message receiver module be connected with message control module;

Step 5; Message control module by the time module receive the temporal information that the GPS module sends, carry out the rate of change in control time according to absolute time.

In addition, man-machine interface realizes on computers, software employing labview programming, and the interface close friend, simple to operate, the checking procedure full-automation, without artificial participation, directly send test result on the mode with form.

Adopt ethernet communication between host computer and controller.Be connected by multimode ST-ST optical fiber between controller and digital quantity watt-hour meter tester, also connect by identical multimode ST-ST optical fiber between message sending module and tested digital quantity watt-hour meter.。

The host CPU that described message control module adopts can be the POWER PC MPC8247 of a new generation of Motorola, make stability and the arithmetic speed of device obtain Reliable guarantee, the message receiver module adopts the light receiving element of Agilent (Agilent) company, message controller and digital quantity input watt-hour meter, and and digital quantity input watt-hour meter tester between Ethernet control, fpga chip by XILEX company is realized, with the discreteness precision control of guaranteeing that the IEC61850-9 agreement sends, scope can be as accurate as 100ns.To the time module be used for obtaining the precise time parameter, interface adopts ST, fiber optic wavelength adopts 1310nm.Synchronizing signal adopts the High Accuracy Constant Temperature crystal oscillator, to guarantee in the situation that do not have external source of synchronising signal can complete test yet.Message sending module and message receiver module adopt double FPGA to realize, to guarantee the confidence level of digital source.The demonstration of man-machine interface realizes by computer, interface software employing labview programming realization.Pass through ethernet communication between computer and message control module.

Receive the analog data from the fiber optic Ethernet IEC61850-9 agreement transmission of digital quantity input electrical energy meter calibration instrument by the fiber optic Ethernet mouth, by after Background control, data being transmitted to tested digital quantity watt-hour meter by fiber optic Ethernet, then by pulse, sending the electricity after calculating back to tester and carry out the electric degree verification

Claims (2)

1. the chronometer time realized based on FPGA is controlled SMV message controller, it is characterized in that: comprise

Message control module, consist of host CPU, be connected with message sending module, message receiver module to the time module;

The message sending module, controlled by FPGA, to the digitizing watt-hour meter, sends the 9-2 message;

The message receiver module, after digitizing watt-hour meter tester just receives the pps pulse per second signal of digitizing watt-hour meter, the 9-2 message sent to the message receiver module;

To the time module, receive the gps signal of GPS module by synchronous optical fiber.

2. a kind of chronometer time realized based on FPGA according to claim 1 is controlled SMV message controller, and it is characterized in that: described message control module is connected with the host computer link block.

Images