CN203086419U - Double-output large dynamic wide-band amplifier circuit - Google Patents
Double-output large dynamic wide-band amplifier circuit Download PDFInfo
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- CN203086419U CN203086419U CN 201320066991 CN201320066991U CN203086419U CN 203086419 U CN203086419 U CN 203086419U CN 201320066991 CN201320066991 CN 201320066991 CN 201320066991 U CN201320066991 U CN 201320066991U CN 203086419 U CN203086419 U CN 203086419U
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- triode
- resistance
- amplifier circuit
- differential amplifier
- emitter
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Abstract
The utility model discloses a double-output large dynamic wide-band amplifier circuit. A positive input end to a positive output end and a reverse input end to a reverse output end are symmetrically arranged, so that the reverse symmetric input is realized; and besides, a first-level differential amplifying circuit, a second-level differential amplifying circuit, a third-level differential amplifying circuit and a fourth-level differential amplifying circuit are arranged, so that the high-magnification high-efficiency amplification is realized.
Description
Technical field
The utility model relates to a kind of amplifier, is specifically related to the big dynamically wide-band amplifier circuit of a kind of dual output.
Background technology
Amplifier is to have the very circuit unit of high-amplification-factor, in side circuit, forms certain functional module jointly in conjunction with feedback network usually.Owing to be applied in the simulation computer in early days, in order to realize mathematical operation, so gain the name " operational amplifier ".Amplifier is a circuit unit from the view of function name, can be realized by discrete device, also can be implemented in the middle of the semiconductor chip.Along with development of semiconductor, most amplifier is that the form with single-chip exists.Amplifier of a great variety is widely used in the middle of the electron trade.
And the current amplifier that is present in the amplifier of industry for high-amplification-factor is difficult to realize fully symmetrical anti-phase dual output.
The utility model content
At the problem that prior art exists, the purpose of this utility model is to provide a kind of dual output big dynamically wide-band amplifier circuit, and it can realize the anti-phase dual output of high-amplification-factor symmetry.
The big dynamically wide-band amplifier circuit of a kind of dual output that the utility model provides, it comprises input circuit, middle amplifying circuit and output driving circuit, wherein,
Described input circuit comprises positive input, reverse input end and first order differential amplifier circuit, wherein, described first order differential amplifier circuit comprises and is symmetrically arranged first triode (T1) and second triode (T2), and first resistance (R1), second resistance (R2), the 3rd resistance (R3), the 4th resistance (R4), the 5th resistance (R5) and the 6th resistance (R6), wherein, described first resistance (R1), described the 3rd resistance (R3), described the 4th resistance (R4) and described second resistance (R2) are located between the emitter of described first triode (T1) and described second triode (T2) in turn
Described the 5th resistance (R5) and described the 6th resistance (R6) are located between the collector electrode of described first triode (T1) and described second triode (T2) in turn;
Amplifying circuit comprises second level differential amplifier circuit and third level differential amplifier circuit in the middle of described, described second level differential amplifier circuit comprises and is symmetrically arranged the 3rd triode (T3) and the 4th triode (T4), and the tenth resistance (R10) and the 11 resistance (R11) that connect the emitter of described the 3rd triode (T3) and described the 4th triode (T4), described three differential amplifier circuits comprise and are symmetrically arranged the 5th triode (T5) and the 6th triode (T6), and the 8th resistance (R8) and the 9th resistance (R9) that connect the collector electrode of described the 5th triode (T5) and described the 6th triode (T6), the 12 resistance (R12) and the 13 resistance (R13) with the emitter that is connected described the 5th triode (T5) and described the 6th triode (T6), the base stage of described the 3rd triode (T3) directly is connected with the collector electrode of described first triode (T1), the base stage of described the 4th triode (T4) directly is connected with the collector electrode of described second triode (T2), the base stage of described the 5th triode (T5) directly is connected with the emitter of described the 3rd triode (T3), and the base stage of described the 6th triode (T6) directly is connected with the emitter of described the 4th triode (T4);
Described output driving circuit comprises the positive voltage terminals, the forward output, inverse output terminal, earth terminal, negative voltage terminals and fourth stage differential amplifier circuit, described fourth stage differential amplifier circuit comprises and is symmetrically arranged the 7th triode (T7) and the 8th triode (T8), and the 14 resistance (R14) and the 15 resistance (R15) of the emitter of connection described the 7th triode (T7) and described the 8th triode (T8), the base stage of described the 7th triode (T7) directly is connected with the collector electrode of described the 5th triode (T5), the base stage of described the 8th triode (T8) directly is connected with the collector electrode of described the 6th triode (T6), described forward output is connected with the emitter of described the 7th triode (T7), described inverse output terminal is connected with the emitter of described the 8th triode (T8), and described earth terminal is connected with the common port of described the 14 resistance (R14) and described the 15 resistance (R15).
Based on disclosing of above technical scheme, the utility model possesses following beneficial effect:
In the big dynamically wide-band amplifier circuit of a kind of dual output that the utility model provides, described positive input is to described forward output and described reverse input end to described inverse output terminal and is symmetrical arranged, thereby, the input of realization reverse symmetry, in addition, be provided with described first order differential amplifier circuit, described second level differential amplifier circuit, described third level differential amplifier circuit and described fourth stage differential amplifier circuit, and realize the amplification of high-amplification-factor high efficiency.
Description of drawings
The big dynamically structure chart of wide-band amplifier circuit of a kind of dual output that Fig. 1 provides for the utility model.The drawing reference numeral explanation
Input circuit 100
Middle amplifying circuit 200
Reverse input end 2
Forward output 4
Inverse output terminal 5
Earth terminal 6
Negative voltage terminals 7
Embodiment
Further specify the technical solution of the utility model below in conjunction with accompanying drawing and by embodiment:
At the problem that prior art exists, the purpose of this utility model is to provide a kind of dual output big dynamically wide-band amplifier circuit, and it can realize the anti-phase dual output of high-amplification-factor symmetry.
The big dynamically wide-band amplifier circuit of a kind of dual output that the utility model provides, it comprises input circuit 100, middle amplifying circuit 200 and output driving circuit 300.
See also Fig. 1, described input circuit 100 comprises positive input 1, reverse input end 2 and first order differential amplifier circuit (not label), wherein, described first order differential amplifier circuit comprises and is the symmetrically arranged first triode T1 and the second triode T2, and first resistance R 1, second resistance R 2, the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5 and the 6th resistance R 6, wherein, described first resistance R 1, described the 3rd resistance R 3, described the 4th resistance R 4 and described second resistance R 2 are located between the emitter of described first triode T1 and the described second triode T2 in turn, and described the 5th resistance R 5 and described the 6th resistance R 6 are located between the collector electrode of described first triode T1 and the described second triode T2 in turn.
See also Fig. 1, amplifying circuit 200 comprises second level differential amplifier circuit (not label) and third level differential amplifier circuit (not label) in the middle of described, described second level differential amplifier circuit comprises and is symmetrically arranged the 3rd triode T3 and the 4th triode T4, and the tenth resistance R 10 and the 11 resistance R 11 that connect the emitter of described the 3rd triode T3 and described the 4th triode T4, described three differential amplifier circuits comprise and are symmetrically arranged the 5th triode T5 and described the 6th triode T6, and the 8th resistance R 8 and the 9th resistance R 9 that connect the collector electrode of described the 5th triode T5 and described the 6th triode T6, the 12 resistance R 12 and the 13 resistance R 13 with the emitter that is connected described the 5th triode T5 and the 6th triode T6, the base stage of described the 3rd triode T3 directly is connected with the collector electrode of the described first triode T1, the base stage of described the 4th triode T4 directly is connected with the collector electrode of the described second triode T2, the base stage of described the 5th triode T5 directly is connected with the emitter of described the 3rd triode T3, and the base stage of described the 6th triode T6 directly is connected with the emitter of described the 4th triode T4.
See also Fig. 1, described output driving circuit 300 comprises positive voltage terminals 3, forward output 4, inverse output terminal 5, earth terminal 6, negative voltage terminals 7 and fourth stage differential amplifier circuit (not label), described fourth stage differential amplifier circuit comprises and is symmetrically arranged the 7th triode T7 and the 8th triode T8, and the 14 resistance R 14 and the 15 resistance R 15 of the emitter of described the 7th triode T7 of connection and described the 8th triode T8, the base stage of described the 7th triode T7 directly is connected with the collector electrode of described the 5th triode T5, the base stage of described the 8th triode T8 directly is connected with the collector electrode of described the 6th triode T6, described forward output 4 is connected with the emitter of described the 7th triode T7, described inverse output terminal 5 is connected with the emitter of described the 8th triode T8, and described earth terminal 6 is connected with the common port of described the 14 resistance R 14 and described the 15 resistance R 15.
Based on disclosing of above technical scheme, the utility model possesses following beneficial effect:
In the big dynamically wide-band amplifier circuit of a kind of dual output that the utility model provides, described positive input 1 to described forward output 4 and described reverse input end 2 is to described inverse output terminal 5 and is symmetrical arranged, thereby, the output of realization reverse symmetry, in addition, be provided with described first order differential amplifier circuit, described second level differential amplifier circuit, described third level differential amplifier circuit and described fourth stage differential amplifier circuit, and realization high-amplification-factor high efficiency is amplified, in summary, the purpose of this utility model is to provide a kind of dual output big dynamically wide-band amplifier circuit, and it can realize the anti-phase dual output of high-amplification-factor symmetry.
In conjunction with the accompanying drawings the utility model has been carried out exemplary description above; obvious realization of the present utility model is not subjected to the restriction of aforesaid way; as long as the various improvement of having adopted method design of the present utility model and technical scheme to carry out; or design of the present utility model and technical scheme are directly applied to other occasion without improving, all in protection range of the present utility model.
Claims (1)
1. the big dynamically wide-band amplifier circuit of dual output is characterized in that it comprises input circuit, middle amplifying circuit and output driving circuit, wherein,
Described input circuit comprises positive input, reverse input end and first order differential amplifier circuit, wherein, described first order differential amplifier circuit comprises and is symmetrically arranged first triode (T1) and second triode (T2), and first resistance (R1), second resistance (R2), the 3rd resistance (R3), the 4th resistance (R4), the 5th resistance (R5) and the 6th resistance (R6), wherein, described first resistance (R1), described the 3rd resistance (R3), described the 4th resistance (R4) and described second resistance (R2) are located between the emitter of described first triode (T1) and described second triode (T2) in turn, and described the 5th resistance (R5) and described the 6th resistance (R6) are located between the collector electrode of described first triode (T1) and described second triode (T2) in turn;
Amplifying circuit comprises second level differential amplifier circuit and third level differential amplifier circuit in the middle of described, described second level differential amplifier circuit comprises and is symmetrically arranged the 3rd triode (T3) and the 4th triode (T4), and the tenth resistance (R10) and the 11 resistance (R11) that connect the emitter of described the 3rd triode (T3) and described the 4th triode (T4), described three differential amplifier circuits comprise and are symmetrically arranged the 5th triode (T5) and the 6th triode (T6), and the 8th resistance (R8) and the 9th resistance (R9) that connect the collector electrode of described the 5th triode (T5) and described the 6th triode (T6), the 12 resistance (R12) and the 13 resistance (R13) with the emitter that is connected described the 5th triode (T5) and described the 6th triode (T6), the base stage of described the 3rd triode (T3) directly is connected with the collector electrode of described first triode (T1), the base stage of described the 4th triode (T4) directly is connected with the collector electrode of described second triode (T2), the base stage of described the 5th triode (T5) directly is connected with the emitter of described the 3rd triode (T3), and the base stage of described the 6th triode (T6) directly is connected with the emitter of described the 4th triode (T4);
Described output driving circuit comprises the positive voltage terminals, the forward output, inverse output terminal, earth terminal, negative voltage terminals and fourth stage differential amplifier circuit, described fourth stage differential amplifier circuit comprises and is symmetrically arranged the 7th triode (T7) and the 8th triode (T8), and the 14 resistance (R14) and the 15 resistance (R15) of the emitter of connection described the 7th triode (T7) and described the 8th triode (T8), the base stage of described the 7th triode (T7) directly is connected with the collector electrode of described the 5th triode (T5), the base stage of described the 8th triode (T8) directly is connected with the collector electrode of described the 6th triode (T6), described forward output is connected with the emitter of described the 7th triode (T7), described inverse output terminal is connected with the emitter of described the 8th triode (T8), and described earth terminal is connected with the common port of described the 14 resistance (R14) and described the 15 resistance (R15).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320066991 CN203086419U (en) | 2013-02-05 | 2013-02-05 | Double-output large dynamic wide-band amplifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320066991 CN203086419U (en) | 2013-02-05 | 2013-02-05 | Double-output large dynamic wide-band amplifier circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203086419U true CN203086419U (en) | 2013-07-24 |
Family
ID=48832221
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201320066991 Expired - Fee Related CN203086419U (en) | 2013-02-05 | 2013-02-05 | Double-output large dynamic wide-band amplifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203086419U (en) |
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2013
- 2013-02-05 CN CN 201320066991 patent/CN203086419U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130724 Termination date: 20190205 |
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| CF01 | Termination of patent right due to non-payment of annual fee |