CN203026509U - Semiconductor power device - Google Patents
Semiconductor power device Download PDFInfo
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- CN203026509U CN203026509U CN 201220652041 CN201220652041U CN203026509U CN 203026509 U CN203026509 U CN 203026509U CN 201220652041 CN201220652041 CN 201220652041 CN 201220652041 U CN201220652041 U CN 201220652041U CN 203026509 U CN203026509 U CN 203026509U
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Abstract
The utility model discloses a semiconductor power device. The semiconductor power device disclosed by the utility model comprises an active region, a terminal region and a main node positioned between the active region and the terminal region, wherein the terminal region comprises a terminal structure; the active region comprises a basic region; the basic region, the main node and the terminal structure are same in the doping type; the main node and the basic region of the active region are simultaneously formed; the node depth of the main node is the same as the node depth of the basic region; the doping concentration of the main node is the same as the doping concentration of the basic region; the node depth of the main node is smaller than the node depth of the terminal structure; and the doping concentration of the main node is smaller than the doping concentration of the terminal structure. The node depth of the main node is smaller than the node depth of the terminal structure, so that the drop of voltage born by a region between the main node and the terminal structure can be increased; the doping concentration of the main node is reduced, so that the drop of voltage born by a depletion region with a certain length can be increased; in both cases, the voltage endurance capability of the semiconductor power device can be improved; and furthermore, the terminal area of the semiconductor power device is decreased and the production cost of the device is reduced.
Description
Technical field
The utility model relates to field of semiconductor devices, more particularly, relates to a kind of semiconductor power device.
Background technology
Modern high-voltage power semiconductor device, as VDMOS(vertical DMOS field-effect transistor), the IGBT(insulated gate bipolar transistor) etc., as third generation power electronic product, high due to its operating frequency, switching speed is fast, control efficiency is high and obtain using more and more widely in field of power electronics.The blocking ability of high-voltage power semiconductor device is a very important sign weighing development level, and different according to using, the scope of its puncture voltage can be from 25V to 6000V.
The ability of device blocking-up high pressure depends primarily on the anti-puncture voltage partially of specific PN junction in device architecture.In power semiconductor, be subjected to the impact of the surperficial non-ideal factor of PN junction bending or PN junction termination, anti-puncture voltage partially is subject to and occurs near surface or tie the knee regional area and tie the punch-through of appearance in advance with respect to parallel plane in body.The effect of terminal protection structure is exactly the Electric Field Distribution of improving device edge, and weaken surface field and concentrate, thus voltage endurance capability and the stability of raising device.
In prior art; device is when bearing certain voltage; tend to increase the area of terminal protection structure for the voltage endurance capability that improves device, but this semiconductor device with larger terminal protection structure area not only production cost can be increased, nor the demand of device miniaturization can be satisfied.
The utility model content
In view of this, the utility model provides a kind of semiconductor power device, to solve the high problem of production cost that in prior art, semiconductor device terminal protection structure area causes more greatly.
For achieving the above object, the utility model provides following technical scheme:
A kind of semiconductor power device comprises:
Active area, termination environment and the main knot between both, described termination environment comprises terminal structure, described active area comprises the base, the doping type of described base, main knot, terminal structure is identical, the base of described main knot and described active area forms simultaneously, the junction depth of described main knot is identical with the junction depth of described base, and the junction depth of described main knot is less than the junction depth of described terminal structure.
Preferably, the junction depth of described main knot is 3 μ m~10 μ m, comprises endpoint value.
Preferably, described terminal structure comprises field limiting ring.
Preferably, described terminal structure comprises field limiting ring and the field plate that is positioned at described field limiting ring top.
Preferably, the junction depth of described field limiting ring is 5 μ m~15 μ m, comprises endpoint value.
Preferably, described terminal structure comprises knot terminal extended structure, and the junction depth of described knot terminal extended structure is 5 μ m~15 μ m, and the width of described knot terminal extended structure is 100 μ m~1500 μ m, comprises endpoint value.
Preferably, described terminal structure also comprises the field cut-off ring that is positioned at the termination environment fringe region.
Preferably, described semiconductor power device also comprises the field plate that is positioned at the main side of tying.
Compared with prior art, technique scheme has the following advantages:
can be found out by such scheme, semiconductor power device provided by the utility model, because the base of main knot and active area forms simultaneously, both have identical junction depth and identical doping content, and this junction depth and doping content are all less than junction depth and the doping content of terminal structure, so on the one hand, the junction depth of main knot is less than the junction depth of terminal structure, the winner is tied and terminal structure between the depth direction electric field strength in zone be not 0, and greater than the electric field strength 0 of traditional structure, make this position electrical potential difference greater than the electrical potential difference of traditional structure, thereby increased the voltage that this zone is born, improved the voltage endurance capability of device, when bearing certain voltage, can save the terminal area of device, further can save the production cost of device.
On the other hand, the doping content of main knot reduces, and has improved the pressure drop that the certain-length depletion region bears, thereby makes the main knot with homalographic can bear larger pressure drop, from another angle, has improved the ability of device withstand voltage, has reached the purpose of saving the terminal area.
In addition, main knot and the terminal structure of the utility model abandoning tradition form in same processing step, and the base of main knot and active area is formed simultaneously, do not increase the complexity that realizes this scheme on technique, just can reach and save the terminal area, reduce the purpose of device cost of manufacture.
Description of drawings
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, the below will do to introduce simply to the accompanying drawing of required use in embodiment or description of the Prior Art, apparently, accompanying drawing in the following describes is only embodiment more of the present utility model, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
The terminal structure that Fig. 1 provides for the utility model is the semiconductor power device profile of field limiting ring structure;
Fig. 2 is that in prior art, terminal structure is the semiconductor power device profile of field limiting ring structure;
The terminal structure that Fig. 3 provides for the utility model is the semiconductor power device profile that field limiting ring is combined with field plate;
The terminal structure that Fig. 4 provides for the utility model is the semiconductor power device profile of knot terminal extended structure;
The terminal structure that Fig. 5 provides for the utility model is the semiconductor power device profile of P+/P-field limiting ring structure;
Fig. 6 provides for the utility model the master side of tying is the semiconductor power device profile of field limiting ring structure with the terminal structure of field plate;
The simulation results figure that Fig. 7 provides for the utility model.
Embodiment
just as described in the background section, the voltage that zone between main knot of the prior art and terminal structure is born is limited, the terminal area of this device architecture is larger, production cost is high, it is because main knot and terminal structure diffuse to form in same processing step that the inventor finds to occur above-mentioned phenomenon, main knot has identical junction depth and doping content with terminal structure, between main knot and terminal structure, the depth direction electric field strength in zone is 0, electrical potential difference is 0, the pressure drop that causes the zone between main knot and terminal structure to be born is less, for improving the device withstand voltage ability, the area that needs the terminal structure of increase chip, cause the higher phenomenon of element manufacturing cost.
based on this, the utility model provides a kind of semiconductor power device, be used for saving the terminal area, reduce production costs, described semiconductor power device comprises: active area, termination environment and the main knot between both, described termination environment comprises terminal structure, described active area comprises the base, described base, main knot, the doping type of terminal structure is identical, described main knot and described base form simultaneously, the junction depth of described main knot is identical with the junction depth of described base, the doping content of described main knot is identical with the doping content of described base, and the junction depth of described main knot is less than the junction depth of described terminal structure, the doping content of described main knot is less than the doping content of described terminal structure.
By above-mentioned technical scheme as can be known, the utility model has been abandoned traditional main knot and terminal structure are formed in same processing step, and the base of main knot and active area is formed simultaneously, thereby main knot has identical junction depth and identical doping content with the base, and this junction depth and doping content are all less than junction depth and the doping content of terminal structure, between main knot and terminal structure, the depth direction electric field strength in zone is not 0, thereby the voltage that this zone is born is increased, improve the voltage endurance capability of device, saved the terminal area of device; On the other hand, the doping content of main knot reduces, and the pressure drop that the certain-length depletion region bears has also improved, thereby has improved the voltage endurance capability of device, has reached the purpose of saving the terminal area.
It is more than the application's core concept, below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the utility model embodiment is clearly and completely described, obviously, described embodiment is only a part of embodiment of the present utility model, rather than whole embodiment.Based on the embodiment in the utility model, those of ordinary skills are not making the every other embodiment that obtains under the creative work prerequisite, all belong to the scope of the utility model protection.
A lot of details have been set forth in the following description so that fully understand the utility model, but the utility model can also adopt other to be different from alternate manner described here and implement, those skilled in the art can be in the situation that do similar popularization without prejudice to the utility model intension, so the utility model is not subjected to the restriction of following public specific embodiment.
Specifically describe below by several embodiment.
Embodiment one
a kind of semiconductor power device is provided in the present embodiment, active area, termination environment and the main knot between both, described termination environment comprises terminal structure, described active area comprises the base, described base, main knot, the doping type of terminal structure is identical, be preferably the heavy doping of P type in the present embodiment, terminal structure described in the present embodiment is field limiting ring structure, specifically as shown in Figure 1, main knot 105 forms simultaneously with the base 103 of active area, namely the junction depth of main knot 105 is identical with the junction depth of base 103, the doping content of main knot 105 is identical with the doping content of base 103, and the junction depth of main knot 105 is less than the junction depth of field limiting ring 102, the doping content of main knot 105 is less than the doping content of field limiting ring 102.
In the present embodiment, the junction depth of main knot is preferably 3 μ m~10 μ m, and implantation dosage is preferably 1e12cm
-2~5e14cm
-2, and the junction depth of field limiting ring is preferably 5 μ m~15 μ m, implantation dosage is preferably 1e14cm
-2~5e16cm
-2, wherein the number of field limiting ring is preferably 2~30 in the present embodiment, and the spacing between field limiting ring can equate, also can successively decrease or change with other rule.
Semiconductor power device shown in Fig. 1 also comprises dielectric layer 106, drift region 107, collector electrode 104 and a cut-off ring 101 that covers main knot and termination environment.The doping type of drift region 107 is opposite with the doping type of main knot and field limiting ring, be that drift region 107 is the N-type doping, cut-off ring 101 is identical with drift region 107 doping types, but its doping content is far above the doping content of drift region, and it is the N-type heavily doped region that cut-off on the spot encircles 101.Described cut-off ring 101 is positioned at the fringe region of termination environment; acting as of cut-off ring: when the withstand voltage very high depletion region incoming terminal area edge that causes field limiting ring; guarantee the place's cut-off of voltage cut-off ring on the scene; prevent the withstand voltage inefficacy of semiconductor power device terminal protection structure, semiconductor power device is shielded.
Described dielectric layer 106 can be that single layer structure can be also laminated construction, when dielectric layer 106 is single layer structure, its material is silica, silicon nitride or silicon oxynitride, when dielectric layer 106 was laminated construction, described dielectric layer 106 can be the lamination of the two-layer at least composition in silicon nitride layer, silicon oxide layer, silicon oxynitride layer.The present embodiment medium layer 106 is preferably silicon oxide layer.
The back side of N-type drift region 107 is by Implantation or diffuse to form P type collector electrode 104.
Terminal structure is that the depletion mode of the semiconductor power device of field limiting ring is: collector electrode 104 adds malleation with respect to the electrode (not shown) of drawing on active area and voltage continues to increase, at this moment at first depletion region can form at main knot 105, when the main reversed bias voltage of tying rises, the fringe field of device is strengthened, when fringe field reached critical electric field, punch-through just appearred in main knot.Can tie distance between the 105 and first field limiting ring 102 by the choose reasonable master in the present embodiment, make the winner tie 105 before avalanche breakdown occurs, the depletion region break-through of the depletion region of main knot 105 and the first field limiting ring 102, thereby making the first field limiting ring is main knot dividing potential drop, applied voltage continue to rise the depletion region of the first field limiting ring 102 and the depletion region break-through of the second field limiting ring, thereby the voltage that adds is born jointly by first, second field limiting ring and main knot, by that analogy.
The voltage that adds is born by field limiting ring, and the increase of main knot electric field will be controlled, thereby has stoped the main junction breakdown that occurs because electric field is too high.Concentrate because the existence of field limiting ring can effectively suppress the electric field that main knot edge curvature effect causes simultaneously, thereby improve the voltage endurance capability of device, active area is played a protective role.
In prior art, main knot and field limiting ring as transition structure form in same processing step, therefore both have identical junction depth and doping content, and this junction depth is greater than the junction depth of the base of active area, this doping content is greater than the doping content of base, specifically as shown in Figure 2, Fig. 2 is that existing terminal structure is the semiconductor power device profile of field limiting ring, wherein, 201 is a cut-off ring, 202 are floating empty field limiting ring (this sentences 2 field limiting rings is that example is described), and 203 is the base of active area, and 205 is main knot.Main knot 205 is synchronizeed formation with floating empty field limiting ring 202, therefore main knot has identical junction depth and doping content with field limiting ring, and this junction depth and doping content are all greater than junction depth and the doping content of the base 203 of active area.
Abandoned traditional main knot and terminal structure are formed in the present embodiment in same processing step, but the base of main knot and active area is formed simultaneously, therefore both have identical junction depth and identical doping content, and this junction depth and doping content are all less than junction depth and the doping content of terminal structure.
so on the one hand, the junction depth of main knot is less than the junction depth of terminal structure, the winner is tied and field limiting ring between the electric field strength (being the Ey in Fig. 1) of depth direction in zone (being 108 in Fig. 1) be not 0, and in prior art, because main knot is identical with the junction depth of field limiting ring, Ey between main knot and field limiting ring is 0, therefore the Ey in the utility model is greater than Ey of the prior art, the winner is tied and field limiting ring between the electrical potential difference in zone 108 greater than the electrical potential difference of traditional structure, thereby increased the voltage that this zone is born, improved the voltage endurance capability of device, when bearing certain voltage, can save the terminal area of device, further can save the production cost of device.
On the other hand, the doping content of main knot reduces, and has improved the pressure drop that the certain-length depletion region bears, and its principle is, the pressure drop that the depletion region of known certain-length bears
E
mBe the maximum field of depletion region, generally, E
mVariation with doping content of semiconductor is little, ε
sBe dielectric constant, q be quantities of charge also for constant, the pressure drop V and the doping content N that bear of the depletion region of certain-length like this
AInversely proportional relation, after doping content reduced, the pressure drop that the depletion region of certain-length bears increased, thereby make the main knot with homalographic can bear larger pressure drop, from another angle, improved the ability of device withstand voltage, reached the purpose of saving terminal area, Decrease production cost.
Again on the one hand, main knot plays vital effect as the transitional region between active area and termination environment to the reliability that guarantees device withstand voltage and device integral body, and the junction depth of main knot is identical with the base with doping content, also namely with active area, larger similitude is arranged, thereby have better transitional function.
In addition, main knot and the terminal structure of the utility model abandoning tradition form in same processing step, and the base of main knot and active area is formed simultaneously, need not to increase the process complexity of implementation, just can reach the purpose of saving the terminal area, reducing production costs, therefore with respect in prior art, other reduce the scheme of chip area, the utility model is more prone to realize.
Embodiment two
What the present embodiment was different from a upper embodiment is that the terminal structure of semiconductor power device is the structure that field limiting ring is combined with field plate.As shown in Figure 3, at each stair-stepping field plate structure 309 of covering above field limiting ring 302, its material can also can be polysilicon for metal.
the depletion mode of the semiconductor power device that the present embodiment provides and terminal structure shown in Figure 1 are that the depletion mode of field limiting ring is similar: the electrode (not shown) that collector electrode is drawn with respect to active area adds malleation and voltage continues to increase, at this moment at first depletion region can form at main knot 305, tie distance between the 305 and first field limiting ring 302 by the choose reasonable master in the present embodiment, before making the winner tie 305 generation avalanche breakdowns, the depletion region break-through of the depletion region of main knot 305 and the first field limiting ring 302, thereby making the first field limiting ring is main knot dividing potential drop, by that analogy, distance between choose reasonable the first field limiting ring and the second field limiting ring, before avalanche breakdown occurs in first field limiting ring 302, make the depletion region break-through of depletion region and second field limiting ring of first field limiting ring, second field limiting ring is similarly main knot dividing potential drop, thereby make voltage distribution in a longer segment distance, stoped the main junction breakdown phenomenon that occurs due to overtension, because can effectively suppressing the electric field that main knot edge curvature effect causes, the existence of field limiting ring concentrates simultaneously, thereby improve the voltage endurance capability of device, active area is played a protective role.
What the present embodiment was identical with a upper embodiment is, main knot 305 forms simultaneously with the base 303 of active area, and both have identical junction depth and identical doping content, and this junction depth and doping content are all less than junction depth and the doping content of field limiting ring 302.Thereby can improve the voltage endurance capability of device, when bearing certain voltage, can save the terminal area of device, reduce the production cost of device.
But what the present embodiment was different from a upper embodiment is, increased field plate structure in the present embodiment above field limiting ring, field plate 309 can effectively reduce the peak value electric field at each field limiting ring place to the shielding action of its below electric field, field limiting ring is not easy breakdown, thereby has further improved the voltage endurance capability of semiconductor device.
Embodiment three
The present embodiment provides the terminal structure of another kind of semiconductor power device, and different from top two embodiment is that the terminal structure of semiconductor power device is knot terminal extended structure.Be illustrated in figure 4 as terminal structure and be the semiconductor power device profile of knot terminal extended structure, main knot 405 and base 403 have identical junction depth and doping content, and the junction depth of main knot is less than the junction depth of knot terminal extended structure 402, also namely tie the maximum junction depth of terminal extended structure, the doping content of main knot is less than the doping content of knot terminal extended structure.
In the present embodiment, the junction depth of knot terminal extended structure 402 is preferably 5 μ m~15 μ m, and implantation dosage is preferably 1e13cm
-2~5e15cm
-2, the width of knot terminal extended structure 402 is preferably 100 μ m~1500 μ m, and above scope includes endpoint value.The width of described knot terminal extended structure 402 is for the size of knot terminal extended structure from main knot direction field cut-off ring direction, and is as represented in L in Fig. 4.
The depletion mode of the semiconductor power device that the present embodiment provides and terminal structure shown in Figure 1 are that the depletion mode of field limiting ring is similar; be that electrode (not shown) that collector electrode is drawn with respect to active area adds malleation and voltage continues to increase; at this moment at first depletion region can form at main knot 405; existence due to knot terminal extended structure; before making the winner tie 405 generation avalanche breakdowns; the depletion region of main knot 405 and the depletion region break-through of tying terminal extended structure 402; thereby making knot terminal extended structure is main knot dividing potential drop, plays the effect of the main knot of protection.
As seen, the utility model does not limit the concrete form of the terminal structure of semiconductor power device, within the terminal structure that can realize the semiconductor power device of the utility model scheme all falls into protection range of the present utility model.
In the present embodiment, the base of main knot and active area forms simultaneously, main knot is identical with junction depth and the doping content of base, and junction depth and doping content less than knot terminal extended structure, on the one hand, the junction depth of main knot makes zone between the two bear the voltage increase less than the junction depth of knot terminal extended structure; The doping content of main knot reduces on the other hand, has improved the pressure drop that the certain-length depletion region bears, and two aspects have all improved the voltage endurance capability of device, thereby when making device bear certain voltage, device area can reduce, and has reduced the production cost of device.
Embodiment four
The utility model does not limit the concrete form of the terminal structure of semiconductor power device, and the utility model comprises that also terminal structure is the semiconductor power device of P+/P-type field limiting ring terminal structure, P+/N field limiting ring terminal structure and P+/P-/N type field limiting ring terminal structure etc.For convenience of understanding, the present embodiment is described in detail as an example of P+/P-type field limiting ring terminal structure example, specifically referring to Fig. 5.
with embodiment one, what embodiment two was different is, field limiting ring in the present embodiment is P+/P-type field limiting ring 502, described P+/P-type field limiting ring terminal structure comprises P-well region 5021 and P+ well region 5022, described P-well region 5021 is P type light dope, described P+ well region 5022 is the heavy doping of P type, field limiting ring 502 reduces chip area by P-well region 5021, simultaneously in order to prevent that P-well region 5021 from the inefficacy that break-through causes device withstand voltage occuring, form the P+ well region 5022 of a shallow anti-break-through in follow-up technique by High dose implantation in the P-well region, thereby reduce the area of chip.
In the present embodiment, base 503 and the main knot 505 of active area form in same processing step, have identical junction depth and doping content, and the junction depth of main knot 505 is less than the junction depth of the P type light doping section of P+/P-type field limiting ring 502, and the doping content of main knot 505 is less than the doping content of P type heavily doped region.And in the present embodiment, the junction depth of main knot is less than the junction depth of P+/P-type field limiting ring, and the doping content of main knot also reduces, thereby further improves the voltage endurance capability of device on above-mentioned P+/P-type field limiting ring terminal structure basis, further reduce the terminal area of chip, reduced the production cost of device.
The present embodiment is preferably simply described as an example of P+/P-type field limiting ring terminal structure example, the semiconductor power device of other P+/N type field limiting ring terminal structures and P+/P-/N type field limiting ring terminal structure etc., similar to the semiconductor power device of P+/P-type field limiting ring terminal structure in the present embodiment, described P+/N type field limiting ring terminal structure is that the N-type doped region surrounds P type heavily doped region, described P+/P-/N type field limiting ring terminal structure is that the N-type doped region surrounds P type light doping section, and P type light doping section surrounds P type heavily doped region.
the semiconductor power device of other P+/N type field limiting ring terminal structures and P+/P-/N type field limiting ring terminal structure etc., also to realize reducing the purpose of chip area by changing the inner dopant profiles of field limiting ring or outside dopant profiles, on this basis, the base of main knot and active area is formed in same processing step, and make main knot and the base of active area have identical junction depth and doping content, and this junction depth is less than the junction depth of field limiting ring, the doping content of this doping content when forming simultaneously with field limiting ring, therefore can further improve the voltage endurance capability of device, save the terminal area of device, thereby further reduce the production cost of semiconductor power device.
Embodiment five
The semiconductor power device that the present embodiment provides also comprises the field plate that is positioned at the main side of tying, and described semiconductor power device includes but not limited to the semiconductor power device in the various embodiments described above.In the present embodiment preferably terminal structure be the semiconductor power device of field limiting ring structure, specifically can be referring to Fig. 6, field plate 610 is positioned at the top of described main knot.
semiconductor power device structurally also comprises the silica dioxide medium layer that is positioned at main knot and top, termination environment, impurity in blocks air enters in Semiconductor substrate, pollute Semiconductor substrate, but in silicon dioxide layer, generally exist the positive charge of some, this surface charge will attract or repel the charge carrier in Semiconductor substrate, thereby form certain space charge region on the surface, termination environment at device, positive charge in oxide layer can go out negative electrical charge at surface induction, thereby make the barrier width in superficial layer narrow down, increase surface field, the puncture voltage of main knot is descended.
And in the present embodiment; increase field plate structure above main knot; on the one hand, field plate 610 is the considerable influence of all kinds of electric charges to main knot 605 in screen oxide effectively, thereby improve the puncture voltage of main knot; protect main knot; main knot is not easy breakdown, has improved the voltage endurance capability of device, also namely when bearing certain voltage; save the terminal area of device, reduced the production cost of device.
On the other hand; the field plate 610 that main knot 605 tops increase can be avoided occurring selecting the concentrated phenomenon of the improper electric field that causes because of the distance between each field limiting ring; namely reduce the peak value electric field of main knot position, improved equally the protection to main knot, thereby improved the voltage endurance capability of device.
For the clearer demonstration of energy advantage of the present utility model, provide simulation results of the present utility model, as shown in Figure 7, in simulation process, what select is that terminal structure is the semiconductor power device of field limiting ring, comprises a main knot, other structures such as level Four field limiting ring and active area base.If D is the junction depth of main knot, d is the junction depth of field limiting ring.The junction depth d of the field limiting ring of three kinds of terminal structures of assurance emulation is constant, changes the junction depth D of main knot, is divided into D〉d, D=d, three kinds of situations of D<d are carried out analogue simulation.
What provide in Fig. 7 is the maximum withstand voltage comparison diagram that in three kinds of situations, the device termination environment can bear, wherein the transverse axis of Fig. 7 represents the distance along active area to the field limiting ring direction, what the longitudinal axis represented is the withstand voltage of semiconductor power device, indicated in Fig. 7 be between main knot and the first field limiting ring apart from the distance c between the distance b between a, the first field limiting ring and the second field limiting ring, the second field limiting ring and the 3rd field limiting ring.Article three, the meaning of curve is respectively: curve A is illustrated in the junction depth D of main knot less than the junction depth d of field limiting ring, and namely in the situation of D<d, the main knot of device and field limiting ring bear maximum withstand voltage curve; The junction depth D that curve B is illustrated in main knot equals the junction depth d of field limiting ring, and namely in the situation of D=d, the main knot of device and field limiting ring bear maximum withstand voltage curve; Curve C represents the junction depth d greater than field limiting ring, i.e. D as the junction depth D of main knot〉in the situation of d, the main knot of device and field limiting ring bear maximum withstand voltage curve.
As can be seen from the figure, the withstand voltage of curve A is maximum among the three significantly, that is to say the junction depth d less than field limiting ring as the junction depth D of main knot, and when being also D<d, the voltage endurance capability of device is maximum, has also namely verified scheme of the present utility model.
To the above-mentioned explanation of the disclosed embodiments, make this area professional and technical personnel can realize or use the utility model.Multiple modification to these embodiment will be apparent concerning those skilled in the art, and General Principle as defined herein can be in the situation that do not break away from spirit or scope of the present utility model, realization in other embodiments.Therefore, the utility model will can not be restricted to these embodiment shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (8)
1. a semiconductor power device, is characterized in that, comprising:
Active area, termination environment and the main knot between both, described termination environment comprises terminal structure, described active area comprises the base, the doping type of described base, main knot, terminal structure is identical, the base of described main knot and described active area forms simultaneously, the junction depth of described main knot is identical with the junction depth of described base, and the junction depth of described main knot is less than the junction depth of described terminal structure.
2. semiconductor power device according to claim 1, is characterized in that, the junction depth of described main knot is 3 μ m~10 μ m, comprises endpoint value.
3. semiconductor power device according to claim 2, is characterized in that, described terminal structure comprises field limiting ring.
4. semiconductor power device according to claim 2, is characterized in that, described terminal structure comprises field limiting ring and is positioned at the field plate of described field limiting ring top.
5. according to claim 3 or 4 described semiconductor power devices, is characterized in that, the junction depth of described field limiting ring is 5 μ m~15 μ m, comprises endpoint value.
6. semiconductor power device according to claim 2, it is characterized in that, described terminal structure comprises knot terminal extended structure, and the junction depth of described knot terminal extended structure is 5 μ m~15 μ m, the width of described knot terminal extended structure is 100 μ m~1500 μ m, comprises endpoint value.
7. according to claim 3,4 or 6 described semiconductor power devices, is characterized in that, described terminal structure also comprises the field cut-off ring that is positioned at the termination environment fringe region.
8. according to claim 3,4 or 6 described semiconductor power devices, is characterized in that, described semiconductor power device also comprises the field plate that is positioned at the main side of tying.
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CN105489658A (en) * | 2016-01-13 | 2016-04-13 | 桑德斯微电子器件(南京)有限公司 | High-voltage fast recovery diode chip with high HTRB and production technology of high-voltage fast recovery diode chip |
CN105489658B (en) * | 2016-01-13 | 2018-06-05 | 桑德斯微电子器件(南京)有限公司 | The high-voltage fast recovery chip and its production technology of a kind of high HTRB |
CN108231560A (en) * | 2016-12-09 | 2018-06-29 | 全球能源互联网研究院 | A kind of coordination electrode preparation method and MOSFET power devices |
CN110603645A (en) * | 2017-05-08 | 2019-12-20 | 罗姆股份有限公司 | Semiconductor device with a plurality of semiconductor chips |
CN110603645B (en) * | 2017-05-08 | 2023-09-19 | 罗姆股份有限公司 | Semiconductor device with a semiconductor device having a plurality of semiconductor chips |
WO2023045386A1 (en) * | 2021-09-22 | 2023-03-30 | 上海积塔半导体有限公司 | Igbt device and manufacturing method therefor |
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