CN202486535U - Dual-CPU (central processing unit) processing circuit board - Google Patents

Dual-CPU (central processing unit) processing circuit board Download PDF

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Publication number
CN202486535U
CN202486535U CN2012200550436U CN201220055043U CN202486535U CN 202486535 U CN202486535 U CN 202486535U CN 2012200550436 U CN2012200550436 U CN 2012200550436U CN 201220055043 U CN201220055043 U CN 201220055043U CN 202486535 U CN202486535 U CN 202486535U
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CN
China
Prior art keywords
cpu
signal processing
module
control module
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2012200550436U
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Chinese (zh)
Inventor
陈永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
WENZHOU FULLWILL ELECTRIC CO Ltd
Original Assignee
WENZHOU FULLWILL ELECTRIC CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Priority to CN2012200550436U priority Critical patent/CN202486535U/en
Application granted granted Critical
Publication of CN202486535U publication Critical patent/CN202486535U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model discloses a dual-CPU (central processing unit) processing circuit board. The dual-CPU processing circuit board comprises a frequency converter driving plate, a signal processing and control module and a display module, wherein the signal processing and control module is used for performing analog quantity processing on nine analog quantity channels of the frequency converter driving plate through a testing needle; the signal processing and control module outputs six lines of PWM (pulse width modulation) signals for controlling the conduction of a high-speed optocoupler, and whether the optocoupler is conducted or not can be detected through the signal processing and control module; the signal processing and control module is connected with the display module; and the dual-CPU processing circuit board is characterized in that the signal processing module is formed by combining two CPU components, and the circuit board increases the working efficiency, enhances the working stability of the circuit board and simultaneously improves the comprehensive working performance by additionally providing a 100-pin CPU signal processing parent module on the original basis.

Description

Two CPU treatment circuit plates
Technical field
The utility model relates to a kind of field of circuit boards, relates in particular to a kind of cpu control circuit plate.
Background technology
Application at present circuit board is more and more wider, goes the technology of circuit board frequency-variable module also to receive publicity day by day, in present frequency changer circuit plate; Its cpu signal disposal system is 48 pin positions, and such system works performance is single, and signal Processing is slow; Because the quantity of its pin position is few; Information that may feedback error during processing signals, thus the error of its work caused, even the entire circuit plate is burnt.
The utility model content
The utility model mainly is to solve the existing in prior technology technical matters, thereby a kind of pair of CPU treatment circuit plate is provided.
The above-mentioned technical matters of the utility model mainly is able to solve through following technical proposals:
A kind of pair of CPU treatment circuit plate comprises: transducer drive plate, signal Processing control module, display module; Described signal Processing control module is carried out analog quantity to 9 analog quantity channels of transducer drive plate through testing needle and is handled; The signal Processing control module is exported the conducting of 6 road pwm signals control high speed photo coupling, and detects whether conducting of optocoupler through the signal Processing control module; Described signal Processing control module links to each other with display module; It is characterized in that: described signal processing module is for to be combined by two cpu packages.
The utility model is done further it and is set to: described pair CPU spare is respectively the female processing module of cpu signal of 100 pin positions and the sub-processing module of cpu signal of 48 pin positions.The utility model is done further it and is set to: the female processing module of described cpu signal is connected through wire harness with the sub-processing module of cpu signal.
Compared with prior art the beneficial effect of the utility model is: this circuit board is handled female module through the cpu signal of adding one 100 pin position on original basis has increased its work efficiency; Strengthen the job stability of circuit board, improved its synthetic operation performance simultaneously.
Description of drawings
Fig. 1 is the circuit module synoptic diagram of the utility model;
Number note among the figure: 9 tunnel analog quantity 62-6 road PWM such as 1-frequency conversion drive module 2-DC power supply circuit 3-rectification module, storage capacitor 4-display module 61-power supply, DBC63-electric storage means contactor drive 7-CPU signal Processing female module 8-serial ports and show 9-CPU signal Processing submodule.
Embodiment
Below in conjunction with accompanying drawing and embodiment, the embodiment of the utility model is described in further detail.Following examples are used to explain the utility model, but are not used for limiting the scope of the utility model.The utility model provides a kind of multifunction circuit board.
It is as shown in Figure 1,
A kind of pair of CPU treatment circuit plate of this utility model comprises: transducer drive plate (1), signal Processing control module, display module (4); Described signal Processing control module is carried out analog quantity to 9 analog quantitys (61) passage of transducer drive plate through testing needle and is handled; The conducting of signal Processing controlling sub (9) output 6 road pwm signals (62) control high speed photo coupling, and detect whether conducting of optocoupler through signal Processing control female module (7); Described signal Processing control female module (7) links to each other with display module; Described signal processing module is for being formed by connecting through wire harness the female processing module (7) of cpu signal of 100 pin positions and the sub-processing module of cpu signal (9) of 48 pin positions.
The mentality of designing of the utility model below only is described with an embodiment, and under the situation that system allows, the utility model can expand to external more function module simultaneously, thereby expands its function to greatest extent.
The above only is the preferred implementation of the utility model; Should be understood that; For those skilled in the art; Under the prerequisite that does not break away from the utility model know-why, can also make some improvement and modification, these improve and modification also will belong in the utility model protection domain.

Claims (3)

1. a two CPU treatment circuit plate comprises: transducer drive plate, signal Processing control module, display module; Described signal Processing control module is carried out analog quantity to 9 analog quantity channels of transducer drive plate through testing needle and is handled; The signal Processing control module is exported the conducting of 6 road pwm signals control high speed photo coupling, and detects whether conducting of optocoupler through the signal Processing control module; Described signal Processing control module links to each other with display module; It is characterized in that: described signal processing module is for to be combined by two cpu packages.
2. according to claim 1 pair of CPU treatment circuit plate is characterized in that, the sub-processing module of cpu signal of the female processing module of the cpu signal that the described pair of cpu package is respectively 100 pin positions and 48 pin positions.
3. according to claim 2 pair of CPU treatment circuit plate is characterized in that, the female processing module of described cpu signal is connected through wire harness with the sub-processing module of cpu signal.
CN2012200550436U 2012-02-21 2012-02-21 Dual-CPU (central processing unit) processing circuit board Expired - Fee Related CN202486535U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2012200550436U CN202486535U (en) 2012-02-21 2012-02-21 Dual-CPU (central processing unit) processing circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2012200550436U CN202486535U (en) 2012-02-21 2012-02-21 Dual-CPU (central processing unit) processing circuit board

Publications (1)

Publication Number Publication Date
CN202486535U true CN202486535U (en) 2012-10-10

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN2012200550436U Expired - Fee Related CN202486535U (en) 2012-02-21 2012-02-21 Dual-CPU (central processing unit) processing circuit board

Country Status (1)

Country Link
CN (1) CN202486535U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103064331A (en) * 2012-12-15 2013-04-24 广州三晶电气有限公司 Frequency converter dual-control chip system and data transmission method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103064331A (en) * 2012-12-15 2013-04-24 广州三晶电气有限公司 Frequency converter dual-control chip system and data transmission method thereof

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C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20121010

Termination date: 20130221