CN202190459U - Paster element pad layout structure - Google Patents

Paster element pad layout structure Download PDF

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Publication number
CN202190459U
CN202190459U CN2011202797640U CN201120279764U CN202190459U CN 202190459 U CN202190459 U CN 202190459U CN 2011202797640 U CN2011202797640 U CN 2011202797640U CN 201120279764 U CN201120279764 U CN 201120279764U CN 202190459 U CN202190459 U CN 202190459U
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China
Prior art keywords
pad
surface mount
mount elements
layout structure
quadrant
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Expired - Lifetime
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CN2011202797640U
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Chinese (zh)
Inventor
章波
衡浩
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Maipu Communication Technology Co Ltd
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Maipu Communication Technology Co Ltd
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Priority to CN2011202797640U priority Critical patent/CN202190459U/en
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Publication of CN202190459U publication Critical patent/CN202190459U/en
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Abstract

The utility model relates to a paster element pad layout structure on a PCB (printed circuit board). Aiming at the problem that with the prior paster element pad layout structure on a PCB, an assembling error is easy to happen, the utility model discloses the paster element pad layout structure. The technology scheme in the utility model is as following: the paster element pad layout structure includes a first pad and a second pad for welding a paster element and a corresponding connection line; the characteristics are that the first pad and the second pad are respectively positioned in a first quadrant and a third quadrant, or in a second quadrant and a fourth quadrant, and a horizontal distance and a vertical distance are accordant to the dimension of the paster element. In the utility model, a damage result caused by the assembling error of the paster element can be avoided, the paster element can be normally used when being welded normally or being rotated by 90 DEG for welding, the requirement of high efficiency and high straight-through rate production in batches is satisfied, and the paster element pad layout structure is specially suitable for the assembly process of a square paster element.

Description

Surface mount elements pad layout structure
Technical field
The utility model relates to the circuit board mounting technology, and particularly PCB (printed circuit board (PCB)) goes up surface mount elements pad layout structure.
Background technology
The electronic package form is of all kinds at present, to adapt to the different matching requirements of PCB.The SMT (surface mounting technology) that occur particularly near decades, it is very general that surface mount elements (mainly comprising Chip-R, patch capacitor, chip inductor, stamp-mounting-paper diode etc.) is used in the PCB mounting technology.Show the face shaping of surface mount elements 8 like Fig. 1, it is a rectangular block shape structure.Surface mount elements 8 two ends 81,82 are the link of surface mount elements 8 among Fig. 1, generally are made up of metal material, like copper, tin or alloy material etc., link to each other with the element internal electrode, can be welded on the PCB easily.The pad layout structure of surface mount elements on PCB is as shown in Figure 2, pad 1 and pad 2 positioned opposite among the figure, and its spacing and surface mount elements size (size) are suitable, so that weld with two links of surface mount elements.The connecting line 21 of the connecting line of pad 1 (printed conductor) 11 and pad 2 links to each other with the PCB circuit.Fig. 3 is surface mount elements on pad 1 and pad 2 correct assembling is connected sketch map, can find out that surface mount elements link 81,82 lays respectively on pad 2 and the pad 1, and this correct assembling has requirement to the assembly direction of surface mount elements.It all is that simple encapsulation with surface mount elements is copied into the printed board encapsulation that prior art PCB circuit is made; In case the component package direction of producer changes or other people are misjudgment; The situation that can cause the surface mount elements loading error; Produce assembling situation as shown in Figure 4, at this moment the surface mount elements assembly direction has differed 90 °, and pad 1 and pad 2 are by direct short-circuit.This is the typical fault that prior art surface mount elements assembly technology produces, and appearing at the surface mount elements surface configuration especially easily is on the foursquare so-called square patch element.And the appearance of problem often in batch, even can detect, also can cause doing over again in batches; During charge for loss of working time, then can cause components and parts to burn if fail in time to find (along with packaging density increasingly high, this is very possible); Circuit board is scrapped, even whole set equipment damages.
The utility model content
The utility model technical problem to be solved; Be easy to generate the problem of loading error exactly to prior art printed circuit board (PCB) surface mount elements pad layout structure; A kind of surface mount elements pad layout structure is provided,, enhances productivity to reduce the risk that the surface mount elements assembling brings.
The utility model solve the technical problem, and the technical scheme of employing is surface mount elements pad layout structure; Comprise first pad and second pad that are used for soldering surface mounted element; And corresponding connection line, it is characterized in that said first pad and second pad lay respectively at first quartile and third quadrant; Perhaps second quadrant and four-quadrant, its horizontal range and vertical range are suitable with the surface mount elements size.
The technical scheme of the utility model; Two solder pad arrangements that will connect surface mount elements dexterously are at interlaced first quartile and third quadrant; Perhaps second quadrant and four-quadrant are in the time of assembling, even the surface mount elements installation direction goes wrong; Can not influence the operate as normal of surface mount elements yet, more can not cause short trouble.
Concrete, said surface mount elements is the square patch element.For the square patch element, loading error appears in structure the most easily because surface mount elements and installation site all are centrosymmetric, and adopts the scheme of the utility model to acquire a special sense.
More specifically, said square patch element is a chip inductor.Chip inductor through being usually used in connecting the power supply of IC chip, is protected chip power supply in circuit, in case loading error causes short circuit, possibly burn expensive chip, in this pad layout structure that adopts the utility model, can avoid loss.
Further, said horizontal range and vertical range equate.This is best suited for the pad layout structure of square patch element.
Further, being furnished with pad respectively at other quadrants with said first pad and the second pad symmetric position, said pad separates with second pad with said first pad respectively.This pad distributed architecture can be regarded as original first pad and second pad are divided into two parts respectively, and compatible good with existing technology can be improved PCB plate-making efficient, reduces cost.And additional pad can also improve surface mount elements installation welding reliability.
The beneficial effect of the utility model is; The devastating consequence that can avoid the surface mount elements loading error to bring, realization surface mount elements During normal welding or half-twist welding can normally be used, and be significant; Fundamentally avoided the assembling risk; Boost productivity greatly, meet the high efficiency of batch process, the requirement of high first-pass yield.
Description of drawings
Fig. 1 is the surface mount elements sketch map;
Fig. 2 is a prior art surface mount elements corresponding bonding pad layout structure sketch map;
Fig. 3 is the sketch map that correctly assembles surface mount elements;
Fig. 4 is a surface mount elements loading error sketch map;
Fig. 5 is embodiment 1 a surface mount elements pad layout structural representation;
Fig. 6 is the sketch map that normally assembles surface mount elements;
Fig. 7 is a surface mount elements half-twist assembling sketch map;
Fig. 8 is embodiment 2 surface mount elements pad layout structural representations.
Embodiment
Below in conjunction with accompanying drawing and embodiment, describe the technical scheme of the utility model in detail.
The surface mount elements pad layout structure of the utility model comprises first pad and second pad that are used for soldering surface mounted element, and the corresponding connection pads and the printed conductor of circuit.In the utility model surface mount elements pad layout structure, first pad is positioned at first quartile, and second pad is positioned at third quadrant; Perhaps first pad is positioned at second quadrant, and second pad is positioned at four-quadrant.Horizontal range between first pad and second pad and vertical range and surface mount elements size adapt, and normal assembling of surface mount elements or half-twist assembling can both be connected with second pad with first pad.
Embodiment 1
This routine surface mount elements pad layout structure, as shown in Figure 5, comprise first pad 1 and second pad 2 that are used for soldering surface mounted element, and the printed conductor 11 that connects first pad 1 and circuit, connect the printed conductor 21 of second pad 2 and circuit.In this routine surface mount elements pad layout structure, first pad 1 is positioned at first quartile, and second pad 1 is positioned at third quadrant.Four-quadrant with first pad, 1 symmetric position is furnished with pad 10, between the pad 10 and first pad 1 and second pad 2 spacing is arranged.Same, be furnished with pad 20 at second quadrant with second pad, 2 symmetric positions, between the pad 20 and second pad 1 and second pad 2 spacing is arranged.Horizontal range between first pad 1 and second pad 2 and vertical range should satisfy the requirement of surface mount elements size, and normal assembling of surface mount elements or half-twist assembling can both be connected with second pad 2 with first pad 1.Relatively can find out with pad distributed architecture shown in Figure 2; In fact pad distributed architecture shown in Figure 5 is exactly that first pad 1 among Fig. 2 is divided into first pad 1 and pad 10 among Fig. 5; Second pad 2 is divided into second pad 2 and pad 20 among Fig. 5 respectively, and among Fig. 5, horizontal range and vertical range all equate between these pads; The square patch element be fit to be installed, like the direction chip inductor etc.This routine first pad 1 is respectively applied for the link 81 and link 82 that is connected surface mount elements with second pad 2, and pad 10 and the pad of pad 20 for isolating do not have electric effect, only are used to strengthen the surface mount elements welding reliability, referring to Fig. 6 and Fig. 7.
Fig. 6 normally assembles sketch map for surface mount elements, and surface mount elements link 81 is welded on first pad 1 and the pad 10, and surface mount elements link 82 is welded on second pad 2 and the pad 20, and circuit connection state is normal, and surface mount elements can operate as normal.Fig. 7 shows the sketch map (situation of the surface mount elements loading error that promptly occurs usually) of surface mount elements half-twist assembling; Can find out; First pad 1 and second pad 2 still have correct annexation with surface mount elements 8; Connection line 11 and connection line 21 be not by short circuit, and the circuit connection is in normal condition, and surface mount elements also can operate as normal.
Embodiment 2
This routine surface mount elements pad layout structure of this example is that first pad 1 and second pad 2 are arranged in second quadrant and four-quadrant, and be corresponding, arranges pad 10 and pad 20 respectively at the third quadrant and second quadrant, referring to Fig. 8.This layout structure can satisfy the different circuits cabling requirement, when particularly connecting line 11,21 trends of first pad 1 and second pad 2 are respectively to the upper left side with to the lower right.The assembly relation of this routine pad layout structure and surface mount elements can no longer repeat referring to the associated description of embodiment 1 here.

Claims (5)

1. surface mount elements pad layout structure; Comprise first pad and second pad that are used for soldering surface mounted element; And corresponding connection line, it is characterized in that said first pad and second pad lay respectively at first quartile and third quadrant; Perhaps second quadrant and four-quadrant, its horizontal range and vertical range are suitable with the surface mount elements size.
2. surface mount elements pad layout structure according to claim 1 is characterized in that said surface mount elements is the square patch element.
3. surface mount elements pad layout structure according to claim 2 is characterized in that said square patch element is a chip inductor.
4. according to claim 2 or 3 described surface mount elements pad layout structures, it is characterized in that said horizontal range and vertical range equate.
5. surface mount elements pad layout structure according to claim 1 is characterized in that, is furnished with pad respectively at other quadrants with said first pad and the second pad symmetric position, and said pad separates with second pad with said first pad respectively.
CN2011202797640U 2011-08-03 2011-08-03 Paster element pad layout structure Expired - Lifetime CN202190459U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011202797640U CN202190459U (en) 2011-08-03 2011-08-03 Paster element pad layout structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2011202797640U CN202190459U (en) 2011-08-03 2011-08-03 Paster element pad layout structure

Publications (1)

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CN202190459U true CN202190459U (en) 2012-04-11

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CN2011202797640U Expired - Lifetime CN202190459U (en) 2011-08-03 2011-08-03 Paster element pad layout structure

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105430898A (en) * 2015-12-29 2016-03-23 广东欧珀移动通信有限公司 Pad structure, circuit board and mobile terminal using pad structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105430898A (en) * 2015-12-29 2016-03-23 广东欧珀移动通信有限公司 Pad structure, circuit board and mobile terminal using pad structure
CN105430898B (en) * 2015-12-29 2018-06-29 广东欧珀移动通信有限公司 The circuit board and mobile terminal of pad structure and the application pad structure

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CX01 Expiry of patent term

Granted publication date: 20120411

CX01 Expiry of patent term