CN202076271U - Epitaxial layer structure of back sealing monocrystalline silicon - Google Patents

Epitaxial layer structure of back sealing monocrystalline silicon Download PDF

Info

Publication number
CN202076271U
CN202076271U CN2011203516451U CN201120351645U CN202076271U CN 202076271 U CN202076271 U CN 202076271U CN 2011203516451 U CN2011203516451 U CN 2011203516451U CN 201120351645 U CN201120351645 U CN 201120351645U CN 202076271 U CN202076271 U CN 202076271U
Authority
CN
China
Prior art keywords
substrate
monocrystalline silicon
epitaxial
doping
epitaxial layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN2011203516451U
Other languages
Chinese (zh)
Inventor
钟旻远
林志鑫
顾昱
陈斌
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
WAFER WORKS EPITAXIAL CORP
Original Assignee
WAFER WORKS EPITAXIAL CORP
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by WAFER WORKS EPITAXIAL CORP filed Critical WAFER WORKS EPITAXIAL CORP
Priority to CN2011203516451U priority Critical patent/CN202076271U/en
Application granted granted Critical
Publication of CN202076271U publication Critical patent/CN202076271U/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Abstract

The utility model relates to a epitaxial layer structure of back sealing monocrystalline silicon, which comprises a heavy doping substrate and an epitaxial layer on the heavy doping substrate. A layer of monocrystalline silicon without doping is covered on the back surface of the heavy doping substrate. The epitaxial layer structure of the back sealing monocrystalline silicon has the advantages that a layer of epitaxial back sealing without resistance is added to the back of the substrate so as to improve the self-doping phenomenon of the substrate.

Description

Back of the body envelope single-crystal Si epitaxial layers structure
Technical field
The utility model relates to a kind of monocrystalline silicon, relates in particular to the back of the body seal structure of this monocrystalline silicon.
Background technology
The mainspring of development silicon epitaxy is in order to improve the performance of bipolar transistor and bipolar integrated circuit afterwards.
Epitaxial loayer is to have to extend on original crystal (being commonly referred to as substrate) of certain crystalline orientation and by the method for certain crystallographic direction growing film, this single crystalline layer is called epitaxial loayer.
Epitaxial growth with from melt, directly draw body monocrystalline (lining body) the following advantage of having compared:
1. can be under the temperature that is lower than the substrate fusing point growing semiconductor monocrystal thin films;
2. can grow thin layer, epitaxially deposited layer and low dimensional structures material;
3. can growth components or Impurity Distribution is precipitous or the epitaxial loayer of gradual change;
4. can in the substrate appointed area, carry out selective epitaxial growth.
The epitaxial loayer development makes semiconductor device move towards energy band engineering from the impurity engineering, the application of epitaxial loayer and development are for the quality that improves semi-conducting material and the performance of device, for the exploitation of new material, new unit, development has crucial effects for semiconductor science.
As seen from Figure 1: the structure of prior art monocrystalline silicon is made up of heavy doping substrate 1 and top epitaxial loayer 2.But the problem that this kind structure exists is:
For semiconductor device, wish that not only epitaxial loayer has perfect crystal structure, and also there is certain requirement aspects such as thickness, conduction type and resistivity.
Because can there be the bigger problem of epilayer resistance uniformity scope in the influence of heavily doped lining body autodoping, in addition, autodoping seriously also can influence the Impurity Distribution that has sudden change between epitaxial loayer and the substrate in epitaxial process.Especially along with the development of microwave device and very high speed integrated circuit, not only require epitaxial loayer more and more thinner, but also require the Impurity Distribution on both sides, interface more and more steeper.
In the production process of epitaxial wafer, exist general auto-doping phenomenon.Autodoping be since the accessory substance of thermal evaporation or chemical reaction to the diffusion of substrate, silicon and impurity in the substrate enter gas phase, have changed doping composition and the concentration in the gas phase, thereby have caused the impurity actual distribution in the epitaxial loayer to depart from ideal situation.By the reason that produces, autodoping can be divided into gas phase autodoping, solid phase outdiffusion and system's autodoping.The alloy of gas phase autodoping is mainly from the back side and the edge solid phase outdiffusion of wafer.Mainly from the diffusion of substrate, alloy diffuses to epitaxial loayer at the contact-making surface of substrate and epitaxial loayer by substrate to the alloy of solid phase outdiffusion.The alloy of system's autodoping is from the gas wafer, the inside of graphite plate and reacting furnace cavity homepitaxy sheet process units.
Generation reason by autodoping can find out that in the epitaxial wafer production process, especially in the production method of vapour phase epitaxy, auto-doping phenomenon is difficult to avoid.
Be illustrated in figure 2 as a kind of schematic diagram of epitaxial wafer, because the influence of autodoping, 1. locate the highlyest, 2., 3., 4., 5. locate to take second place with respect to the outer ring resistance value, edge 6., 7., 8., 9. to locate resistance lower relatively.The inhomogeneity standard of gauge resistor can be calculated computing formula by computing formula: the * 100%/(MAX+MIN) of resistivity evenness=(MAX-MIN), and MAX is a maximum value numerical value in 9 points, MIN is a minimum resistance numerical value in 9 points.The uniformity numerical value that calculates by this computing formula is more little, and then its uniformity is high more, and the epitaxial wafer quality is high more.
At present, can accept scope less than 5% for the resistivity evenness of epitaxial wafer.Epitaxial wafer of the prior art, its resistivity evenness is minimum also only to reach 2.5%.
Summary of the invention
The utility model technical issues that need to address have provided a kind of back of the body envelope single-crystal Si epitaxial layers structure, are intended to solve the above problems.
In order to solve the problems of the technologies described above, the utility model is achieved through the following technical solutions:
The utility model comprises: heavy doping substrate and top epitaxial loayer; Also cover the monocrystalline silicon that one deck does not contain doping at described heavy doping substrate back.
Compared with prior art, the beneficial effects of the utility model are: adding one deck behind the utilization substrate does not have resistance extension back of the body envelope, can effectively improve the auto-doping phenomenon of substrate.
Description of drawings
Fig. 1 is a prior art monocrystalline silicon back of the body seal structure schematic diagram.
Fig. 2 is a kind of schematic diagram of epitaxial wafer.
Fig. 3 is the utility model structural representation.
Embodiment
Below in conjunction with accompanying drawing and embodiment the utility model is described in further detail:
As seen from Figure 3: the utility model comprises: heavy doping substrate 1 and top epitaxial loayer 2; Also cover the monocrystalline silicon 3 that one deck does not contain doping at described heavy doping substrate 1 back side.
Described monocrystalline silicon 3 thickness of doping that do not contain are within 20um.
Described thickness is 5um or 10um or 15um.
The utility model can effectively change substrate autodoping situation.After substrate back generates one deck thin single crystal silicon, monocrystalline silicon arrives in the reacting furnace by the thin epitaxy of growing in the mode of high temperature with diffusion, not only can not have influence on the reaction of trichlorosilane and hydrogen in silicon atom in the diffusion and the reacting furnace, because silicon atom is the reactant product that need obtain just, arrange so can't have influence on the monocrystalline silicon of substrate face.
Epitaxial growth is the monocrystalline silicon back of the body seal of being realized by vapour deposition by the epitaxial furnace board.Vapour phase epitaxy has good control and can obtain perfection of crystal impurity concentration.
Epitaxial deposition is the process of a chemical deposition.Below five steps for the basic process of all chemical vapour deposition (CVD)s:
1. reactant is transported on the substrate
2. reactant is attracted on the lining surface
3. chemical reaction takes place on the surface easily generate monocrystalline silicon and product
4. product is emitted from the surface
5. product is transported from the surface
The reactive chemistry equation:
2SiHCl3+2H2→2SI+6HCL
Advantage the utility model mainly contains 5 in IC makes aspect:
(1) substrate impurity (as phosphorus, boron, arsenic atom) is played good masking action;
(2) help substrate face to arrange monocrystalline silicon in order;
(3) passivation silicon chip surface is that the surface and the surrounding environment of device isolated, and prevents to stain, and can improve the performance of device and the reliability and stability of device;
(4) do insulating barrier, for example do the insulating barrier of dielectric isolation, the insulating barrier of metal lead wire and each element etc. in the integrated circuit;
(5) do the medium of electric capacity;
(6) do gate oxide among the MOS
Contrast Fig. 2: example 1
Point 1 Point 2 Point 3 Point 4 Point 5 Point 6 Point 7
Original structure 0.959 0.967 0.976 0.971 0.97 0.97 0.978
The utility model 0.967 0.974 0.974 0.973 0.973 0.973 0.977
Point 8 Point 9 AVE MAX MIN UNI
Before the improvement 0.978 0.968 0.971 0.978 0.959 0.98%
After the improvement 0.974 0.977 0.974 0.977 0.967 0.51%
Example 2
Figure BDA0000092324960000041

Claims (3)

1. a back of the body envelope single-crystal Si epitaxial layers structure comprises: heavy doping substrate and top epitaxial loayer; It is characterized in that: also cover the monocrystalline silicon that one deck does not contain doping at described heavy doping substrate back.
2. back of the body envelope single-crystal Si epitaxial layers structure according to claim 1, it is characterized in that: the described monocrystalline silicon thickness of doping that do not contain is within 20um.
3. back of the body envelope single-crystal Si epitaxial layers structure according to claim 2, it is characterized in that: described thickness is 5um or 10um or 15um.
CN2011203516451U 2011-09-19 2011-09-19 Epitaxial layer structure of back sealing monocrystalline silicon Expired - Lifetime CN202076271U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011203516451U CN202076271U (en) 2011-09-19 2011-09-19 Epitaxial layer structure of back sealing monocrystalline silicon

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2011203516451U CN202076271U (en) 2011-09-19 2011-09-19 Epitaxial layer structure of back sealing monocrystalline silicon

Publications (1)

Publication Number Publication Date
CN202076271U true CN202076271U (en) 2011-12-14

Family

ID=45114360

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011203516451U Expired - Lifetime CN202076271U (en) 2011-09-19 2011-09-19 Epitaxial layer structure of back sealing monocrystalline silicon

Country Status (1)

Country Link
CN (1) CN202076271U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104022054A (en) * 2014-06-09 2014-09-03 上海先进半导体制造股份有限公司 Method for monitoring temperature of epitaxial cavity
CN107305839A (en) * 2016-04-18 2017-10-31 中芯国际集成电路制造(上海)有限公司 The method for preventing autodoping effect
CN107723797A (en) * 2016-08-11 2018-02-23 北大方正集团有限公司 The preparation method and silicon carbide whisker disk of silicon carbide whisker disk

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104022054A (en) * 2014-06-09 2014-09-03 上海先进半导体制造股份有限公司 Method for monitoring temperature of epitaxial cavity
CN107305839A (en) * 2016-04-18 2017-10-31 中芯国际集成电路制造(上海)有限公司 The method for preventing autodoping effect
CN107723797A (en) * 2016-08-11 2018-02-23 北大方正集团有限公司 The preparation method and silicon carbide whisker disk of silicon carbide whisker disk

Similar Documents

Publication Publication Date Title
US8124502B2 (en) Semiconductor device manufacturing method, semiconductor device and semiconductor device manufacturing installation
CN111681947B (en) Epitaxial method for reducing stacking fault defects of epitaxial wafer and application thereof
WO2010046284A1 (en) Semiconductor device manufacturing method, semiconductor device and semiconductor device manufacturing installation
CN202076271U (en) Epitaxial layer structure of back sealing monocrystalline silicon
US8642450B2 (en) Low temperature junction growth using hot-wire chemical vapor deposition
CN104112653A (en) Preparation method of self-compensation back-sealing semiconductor substrate
CN115305566A (en) Method for producing epitaxial layer and semiconductor comprising epitaxial layer
CN106340567B (en) A kind of Liang Bu TongYuans technique that pressure is opened applied to solar cell lifting
CN102064239B (en) Method for producing polycrystalline silicon thick-film solar battery
CN107316805A (en) The manufacture device of the manufacture method of silicon carbide epitaxy chip, the manufacture method of manufacturing silicon carbide semiconductor device and silicon carbide epitaxy chip
CN102324406A (en) Epitaxial wafer substrate capable of reducing auto-doping during epitaxy, epitaxial wafer and semiconductor device
CN101333677A (en) 300mm thin-film epitaxy process
CN117672815A (en) SiC epitaxial wafer and preparation method thereof
CN202332817U (en) Epitaxial wafer substrate capable of reducing self-doping in epitaxy process, epitaxial wafer and semiconductor device
CN116259534A (en) Silicon carbide epitaxy method
CN103137444A (en) Method for improving evenness of thickness of germanium-silicon membrane
JP3424069B2 (en) Manufacturing method of epitaxial silicon substrate
CN101510576A (en) Heat-treatment method capable of improving amorphous hydrogenization carbon silicon nitride film inactivating performance for solar battery
CN109037030B (en) Method for preparing epitaxial wafer with improved back silicon single crystal, epitaxial wafer and semiconductor device
CN103258779B (en) Copper interconnection structure and manufacturing method thereof
US7629236B2 (en) Method for passivating crystal silicon surfaces
CN102834546B (en) For the method and apparatus of deposition of microcrystalline materials in photovoltaic application
CN109119481A (en) A kind of chip and preparation method thereof
Slaoui et al. Polycrystalline silicon films for electronic devices
CN100449713C (en) Preparation method of tunnelling diode of quantum logical device

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CX01 Expiry of patent term

Granted publication date: 20111214

CX01 Expiry of patent term