CN201965886U

CN201965886U - Digital signal generator for liquid crystal screen

Info

Publication number: CN201965886U
Application number: CN2011200330268U
Authority: CN
Inventors: 廖根兴
Original assignee: China Jiliang University
Current assignee: China Jiliang University
Priority date: 2011-01-25
Filing date: 2011-01-25
Publication date: 2011-09-07
Anticipated expiration: 2021-01-25

Abstract

The utility model relates to a digital signal generator for a liquid crystal screen, which has a simple and smart structure, convenience for carrying and low cost and simultaneously achieves the purpose of reducing signal distortion and loss. The technical scheme of the digital signal generator is characterized in that the digital signal generator comprises a main controller FPGA (Field Programmable Gate Array) used for generating a synchronizing signal and an image signal of the liquid crystal screen; a signal output pin is connected with an LVDS (Low Voltage Differential Signaling) signal conversion module; a key pin of the main controller is connected to a group of keys; an output display pin of the main controller is connected with a liquid crystal display module; and a storage pin of the main controller is connected with a memory. The digital signal generator is mainly suitable for departments, such as scientific research, production and quality inspection and the like of the liquid crystal screen.

Description

The liquid crystal display digital signal generator

Technical field

The utility model relates to a kind of digital signal generator device that liquid crystal display shows that is used for, and is mainly used in all departments such as liquid crystal display scientific research, production and quality inspection.

Background technology

What the signal input interface of liquid crystal display received is the LVDS digital signal, the video signal that produces with desktop computer or industrial computer generally is transformed into the signal that AV or VGA etc. simulate standards by interface card, before the input liquid crystal display, need analog signal conversion is become the LVDS digital signal, such signal generator equipment volume is big, and analog signal transmission and transfer process can produce certain distortion and loss.In the liquid crystal industry, liquid crystal panel is assembled in the production run of liquid crystal display to be needed to detect, and when later use liquid crystal display assembling production LCD, LCD TV, generally also needs the liquid crystal display that enters factory is detected.

Summary of the invention

The technical problems to be solved in the utility model is: provide a kind of small and exquisite, easy to carry, liquid crystal display digital signal generator that cost is low simple in structure at the problem of above-mentioned existence, reach the purpose that reduces distorted signals and loss simultaneously.

The technical scheme that the utility model adopted is: the liquid crystal display digital signal generator, it is characterized in that: it comprises the master controller FPGA that is used to produce liquid crystal display synchronizing signal and picture signal, its signal output pin connects the LVDS signal conversion module, the button pin of this master controller connects one group of button, the output of this master controller shows that pin connects LCD MODULE, the storage pin connected storage of this master controller.

Described LVDS signal conversion module is made up of two chip SN75LVDS83 that are electrically connected with master controller FPGA respectively.

Described button has four.

The beneficial effects of the utility model are: the utility model adopts FPGA to produce data image signal as the main control chip, utilize the LVDS signal conversion module that this conversion of signals is LVDS digital signal input liquid crystal display then, with respect to structure of the prior art, avoid the transmission course of simulating signal and twice conversion of D/A, A/D to distortion and loss that signal causes, improved the fidelity factor of signal greatly; Entire equipment is small and exquisite and compact simultaneously, has not only reduced cost, and has improved portability, can use hand scientific research, production, quality inspection easily.

Description of drawings

Fig. 1 is a theory diagram of the present utility model.

Fig. 2-1,2-2 are circuit theory diagrams of the present utility model.

Embodiment

As shown in Figure 1, present embodiment comprises master controller FPGA1 (IC_EP2C20Q240C8N), and the LVDS signal conversion module 2, button 3, LCD MODULE 4 (1602C) and the storer 5 (93C46) that are electrically connected with it respectively; Wherein master controller FPGA1 is used to produce liquid crystal display synchronizing signal and picture signal; The conversion of signals that LVDS signal conversion module 2 is used for master controller FPGA1 is produced is the LVDS digital signal, and this signal is produced image by the LVDS interface that a video cables outputs to liquid crystal display; Button 3 can be used for selecting the image type exported, as select to export pure red, pure green, ethereal blue image, complete white image, perhaps motion calcspar picture, color bar test image etc., the while can also be regulated the brightness value of pure coloured image, the gray scale of complete white image and the movement velocity of motion square etc., realized the output of multiple image, the multinomial performance that can be used for liquid crystal display detects; LCD MODULE 4 is used to show the information of corresponding output image and parameter etc.; Storer 5 is used for storage and various image type corresponding parameter.

Shown in Fig. 2-1,2-2, (U1 among Fig. 2-1 is divided into U1 U1A, U1B, U1C to described master controller FPGA1 ... U1M) pin with LVDS signal conversion module 2 (comprise U2, U3 two chip blocks, model is SN75LVDS83) correspondence connects as following table:

235	8	131	8
				6	10	135	10
7	11	134	11
				8	12	137	12
9	14	136	14
				11	15	139	15
13	16	140	16
				14	18	149	18
15	19	141	19
				16	20	155	20

18	22	150	22
				20	23	157	23
21	24	156	24
				38	25	161	25
37	27	159	27
				39	28	164	28
41	30	166	30
				165	50	119	50
55	31	162	31

In addition, 58,57,54,56 pins of master controller FPGA1 (U1) are electrically connected with four button RST, K0, K1, K2 respectively, 231,233,232,42,44,46,47,49,50,51,52 pins of master controller FPGA1 (U1) are electrically connected with 4,5,6,7,8,9,10,11,12,13,14 pins of LCD MODULE 4 (U4) respectively, and 238,237,236,234 pins of master controller FPGA1 (U1) are electrically connected with 1,2,3,4 pins of storer 5 (U5) respectively.

47 of chip U2 and U3,48,45,46,41,42,37,38,39, the 40th, the output pin of LVDS signal conversion module 2, wherein 47 of U2,48,45,46,41,42,37,38,39,40 respectively with 11 of interface J2,12,9,10,7,8,1,2,3,4 pins connect, 47 of U3,48,45,46,41,42,37,38,39,40 respectively with 23 of interface J2,24,21,22,19,20,13,14,15,16 pins connect, J2 links to each other with the LCD liquid crystal display by the video cables of one 20 line simultaneously, and the LVDS digital signal that signal generator produces exports liquid crystal display to after interface J2 and video cables LVDS interface produces image.

Operation for convenience, be connected by interface J1 between master controller FPGA1 (U1) and four buttons 3 and the LCD MODULE 4 (U4), wherein 58 of U1,57,54,56 pins are connected with 6,3,5,7 pins of J1 respectively, 231,233,232,42,44,46,47,49,50,51,52 pins of U1 are connected with 8,9,10,11,12,13,14,15,16,17,18 pins of J1 respectively, and simultaneously 4 of four buttons 3 and LCD MODULE are connected with interface J1 by winding displacement.

The principle of work of present embodiment is: after signal generator powers on, control the image type of master controller FPGA1 output by button 3, as select to export pure red, pure green, ethereal blue image, complete white image, perhaps motion calcspar picture, color bar test image etc., the parameter of respective image is read in from storer 5, the button brightness value of the pure coloured image of scalable also in addition, the gray scale of complete white image and the movement velocity of motion square etc., to adapt to different detection requirements, adjusted parameter update value is deposited to storer 5; Simultaneously master controller FPGA1 is delivered to LCD MODULE 4 with instant image type and correlation parameter and shows, gets information about the information and the parameter of selected image with the handled easily person; At last, master controller FPGA1 with picture signal export U2 to, (there is difference of injection time in U3 two chip blocks between the signal that two chip blocks are received, this difference of injection time is determined according to the parameter of detection liquid crystal display own), export the LVDS signal then, and produce image by the LVDS interface that a video cables outputs to liquid crystal display and can carry out the coherent detection of liquid crystal display.

Claims

1. liquid crystal display digital signal generator, it is characterized in that: it comprises the master controller FPGA (1) that is used to produce liquid crystal display synchronizing signal and picture signal, its signal output pin connects LVDS signal conversion module (2), the button pin of this master controller connects one group of button (3), the output of this master controller shows that pin connects LCD MODULE (4), the storage pin connected storage (5) of this master controller.

2. liquid crystal display digital signal generator according to claim 1 is characterized in that: described LVDS signal conversion module (2) is made up of two chip SN75LVDS83 that are electrically connected with master controller FPGA (1) respectively.

3. liquid crystal display digital signal generator according to claim 1 is characterized in that: described button (3) has four.