CN201600877U - Signal amplifier and cascade video mosaicing amplifying device - Google Patents
Signal amplifier and cascade video mosaicing amplifying device Download PDFInfo
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- CN201600877U CN201600877U CN2009202616760U CN200920261676U CN201600877U CN 201600877 U CN201600877 U CN 201600877U CN 2009202616760 U CN2009202616760 U CN 2009202616760U CN 200920261676 U CN200920261676 U CN 200920261676U CN 201600877 U CN201600877 U CN 201600877U
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- 238000012545 processing Methods 0.000 claims description 23
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- GJWAPAVRQYYSTK-UHFFFAOYSA-N [(dimethyl-$l^{3}-silanyl)amino]-dimethylsilicon Chemical group C[Si](C)N[Si](C)C GJWAPAVRQYYSTK-UHFFFAOYSA-N 0.000 claims description 5
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Abstract
An embodiment of the utility model discloses a signal amplifier which is characterized by comprising an inputting unit, an amplifying unit, an outputting unit and a controlling unit, wherein the inputting unit is used for receiving video and/or audio signals and performing signal conversion and first stage amplification, the amplifying unit is connected with the inputting unit and used for intercepting and amplifying secondarily the video and/or audio signals, the outputting unit connected with the amplifying unit is used for outputting processed video signals and capable of outputting audio signals, and the controlling unit is respectively connected with the inputting unit, the amplifying unit and the outputting unit and used for controlling input, amplification and output of the video and/or audio signals. The signal amplifier can realize DVI loop output, simultaneously can effectively enlarge magnification and improve picture display quality, is simple in structure, and can effectively reduce production and maintenance cost.
Description
Technical field
The utility model relates to electronic applications, relates in particular to a kind of signal amplifier and cascade video-splicing multiplying arrangement.
Background technology
Large-scale high-resolution true color LED display has become the sign of modernization, internationalized city, it can play Word message, animated advertising, video image, day by day in advertisement, physical culture, traffic, finance, communication, commerce, all trades and professions such as perform in a radio or TV programme and be widely used.The technological core of LED display is the LED display control system, and it comprises front end digital video image processor and rear end LED screen controller.The main task of rear end LED screen controller is to realize the demonstration of video information on the LED display media, and front end digital video image processor then plays crucial effects to the display quality of video information on the LED display media.By multimedia video card and computing machine, rear end its performance of LED screen controller can satisfy the video demonstration of standard resolution, for example 1024 * 768XGA.Yet the eager demand to the demonstration of ultrahigh resolution high clear video image has appearred in led display screen market, for example large LED advertisement, grand theater LED curtain wall etc., its application resolution substantially exceeds the resolution of HDTV 1920 * 1080P, for example 2048 * 1536,3840 * 2160, in addition higher.At present, support the high-resolution video splicing amplifier product that high clear video image shows, be primarily aimed at large-scale curtain wall exploitation such as LCD, DLP, but its resolution subregion expansion, but its application characteristic does not satisfy the demand that the ultrahigh resolution LED display shows control, and for example LED display does not need piece to handle yet.
The video-splicing amplifier that is exclusively used in the ultrahigh resolution LED display at present constitutes two kinds, and a kind of is to adopt the design of computer bus formula integrated circuit board, its structure relative complex, and price is high, especially external product.A kind of is single led video processor cascade, but only is applicable to that generally the subregion at video card high resolving power output mode shows, do not have subregion enlarging function again, and the unit output resolution ratio is generally 1024 * 768.
The utility model content
The utility model embodiment technical matters to be solved is, a kind of signal amplifier and cascade video-splicing multiplying arrangement are provided.Can realize the subregion of vision signal enlarging function again.
In order to solve the problems of the technologies described above, the utility model embodiment provides a kind of signal amplifier, comprising:
Be used for receiver, video and/or sound signal and make conversion of signals and the input block of one-level amplification;
Link to each other with described input processing unit, described video and/or audio signal is intercepted the amplifying unit that amplifies again;
Link to each other with described amplifying unit, with the output unit of described processed video signal output, the also exportable sound signal of described output unit;
Be used for and described input block, amplifying unit, output unit link to each other respectively, input, amplification and the output of described video and/or audio signal are implemented the control module of control.
Correspondingly, the utility model embodiment also provides a kind of cascade video-splicing multiplying arrangement, comprises at least two above-mentioned signal amplifiers.
Implement the utility model embodiment, have following beneficial effect:
Implement the utility model embodiment, can realize the output of DVI loop, support the afterflow output of any vision signal, guarantee the consistance of each LED video-splicing amplifier, simultaneously by one-level Video processing and amplification, 24 RGB high definition video data streams of unified generation standard carry out the secondary intercepting on this basis and amplify, compare with conventional art, effectively enlarged scaling, improved the picture display quality, and the utility model is simple in structure, effectively reduces and produce and maintenance cost.
Description of drawings
Fig. 1 is the structural representation of a kind of signal amplifier first embodiment of the utility model;
Fig. 2 is the structural representation of a kind of signal amplifier second embodiment of the utility model;
Fig. 3 is the structural representation of a kind of signal amplifier the 3rd embodiment of the utility model
Fig. 4 is the structural representation of a kind of cascade video-splicing of the utility model multiplying arrangement embodiment.
Embodiment
For making the purpose of this utility model, technical scheme and advantage clearer, the utility model is described in further detail below in conjunction with accompanying drawing.
Fig. 1 is the structural representation of a kind of signal amplifier first embodiment of the utility model, comprising:
The input block 1 that is used for receiver, video and/or sound signal.
1 pair of selected video source program of described input block is made conversion of signals and one-level processing and amplifying, the various simulations of interface compatibility, digital video and/or sound signal input comprise RGB, AV, Svideo, YPbPr high definition, YCbCr SD, two-way DVI or one road HDMI, one road DVI and optional DisplayPort interface.
Link to each other with described input block 1, described video and/or audio signal is intercepted the amplifying unit 2 that amplifies again.
The vision signal that described amplifying unit 2 receives described input block 1 intercepts again amplifies.
Link to each other with described amplifying unit 1, with the output unit 3 of described processed video signal output, the also exportable sound signal of described output unit 3.
Vision signal after output unit 3 amplifies described amplifying unit 2 interceptings is again exported processing, the also exportable sound signal of described output unit 3.
Be used for linking to each other respectively, input, amplification and the output of described video and/or audio signal implemented the control module 4 of control with described input block 1, amplifying unit 2, output unit 3.
Described control module 4 comprises key-press input unit, is used for by input equipments such as keyboard output steering order, and infrared input block is used for by infrared reception input control order.
Fig. 2 is the structural representation of a kind of signal amplifier second embodiment of the utility model, comprising:
The input block 1 that is used for receiver, video and/or sound signal.
The various simulations of described input block 1 interface compatibility, digital video and/or sound signal input comprise RGB, AV, Svideo, YPbPr high definition, YCbCr SD, two-way DVI or one road HDMI, one road DVI and optional DisplayPort interface.
Wherein, input block 1 comprises:
The DVI conversion of signals that is used to receive the just described reception of DVI signal is two DVI receiving elements 11 of RGB digital signal.
Conversion of signals and one-level processing and amplifying are made in the video input that is used for setting according to Instruction Selection, generate the input processing unit 12 of 24 RGB high resolving power video standard signal streams.
The described pair of DVI receiving element 11 outputs to input processing unit 12 with the DVI signal decoding of DVD, computing machine or other input for the RGB digital signal.Input processing unit 12 selects the vision signal of appointment to make signal conversion processes in the vision signal that receives according to instruction, generates 24 RGB high resolving power video standard signal streams.
Described 24 RGB high resolving power video standard signal streams comprise the high definition video signal of 24 RGB 1280 * 1024, also can rise to the UXGA display mode of computing machine, i.e. 1600 * 1200 high resolving power.
Need to prove that when himself resolution of the vision signal that receives is 1280 * 1024 or when higher, described input processing unit 12 is optional not to process, and directly exports described vision signal to next stage.
Need to prove that described input block 1 also can be decoded other video and/or audio signal that receives, switching and signal conversion processes.
Described input block 1 other interface type and quantity determine that by master chip type and user's request that input processing unit 12 adopts for example the Playport interface is optional input.
The master chip of described input processing unit 12 preferably has ADV7401 or the ADV7401A that itself has two HDMI/DVI mouths and other chip of 24 RGB outputs.
Link to each other with described input block 1, described video and/or audio signal is intercepted the amplifying unit 2 that amplifies again.
Described amplifying unit 2 comprises:
Be used for according to the video intercepting unit 21 of instruction at the video data of the redundant intercepting of described video standard signal stream appointed area.
Described redundant intercepting refers to the original video data of affiliated area is enlarged slightly, recovers problem not all over the screen when solving edge bright line that general cascade video-splicing amplifier exists easily, concealed wire and full frame amplification when output again.
For example, input processing unit 12 selects the vision signal of appointment to make signal conversion processes in the vision signal that receives according to instruction, generate the high definition video signal stream of 24 RGB 1280 * 1024, described video intercepting unit 21 is according to the original video data of instruction redundant intercepting appointed area in the high definition video signal stream of 24 RGB 1280 * 1024 of standard, if instruction indication intercepting zone is (0-799) * (0-599), then video intercepting unit 21 will redundant intercepting zone be the original video data of (0-801) * (0-601) in the high definition video signal stream of 24 RGB 1280 * 1024 of described standard.
The preferred FPGA of chip of described video intercepting unit 21.
Be used for linking to each other, be used for amplifying subelement 22 according to the video that the convergent-divergent instruction is done non-linear amplification again of ratio and image optimization processing with the video data of described video intercepting unit 21 interceptings with described video intercepting unit 21.
Described video amplification subelement 22 is done non-linear amplification again of ratio and image optimization processing according to the convergent-divergent instruction of user's input to the video data of video intercepting unit 21 outputs, generates 24 new RGB high-resolution video output signals.
The resolution of described 24 RGB high-resolution video output signals is 1600 * 1200 or 1280 * 1024 or 1024 * 768.
For example, redundant intercepting zone exported video amplification subelement 22 to for the original video data of (0-801) * (0-601) during video intercepting unit 21 will flow at the high definition video signal of 24 RGB 1280 * 1024 of standard, video amplifies subelement 22 original video data of described (0-801) * (0-601) is done non-linear amplification again of ratio and image optimization processing, generate 24 new RGB high-resolution video output signals, for example magnification ratio be 1.6 o'clock be 1283 * 963.
The master chip of described video amplification subelement 22 is preferably supported 8/10 digital video convergent-divergent chip ABT1030/FLI32656H/FLI32652H/WSC2010 or other chip of 24/30-position RGB input and output.
Need to prove that during practical application, video cuts subelement 21 and mainly carries out intercept operation according to the size and the resolution of LED display.
Link to each other with described amplifying unit 1, with the output unit 3 of described processed video signal output, the also exportable sound signal of described output unit 3.
Described output unit 3 comprises:
Be used for intercepting the video data of appointed area and the vision signal output subelement of exporting by 24 RGB high-resolution vision signal patterns 31 at the video data that described video amplifies the subelement amplification according to instruction.
For example, redundant intercepting zone exported video amplification subelement 22 to for the original video data of (0-801) * (0-601) during video intercepting unit 21 will flow at the high definition video signal of 24 RGB 1280 * 1024 of standard, video amplifies subelement 22, and ratio is non-linear amplifies and the image optimization processing again for the original video data of (0-801) * (0-601) is done with described zone, generate 24 new RGB 1283 * 963 high definition video signals and export vision signal output subelement 31 to, vision signal output subelement 31 will be pressed actual output resolution ratio according to the instruction of user's input, 24 RGB 1280 * 960 high definition video data outputs of intercepting in described 24 RGB 1283 * 963 high definition video signals.
Be used for converting 24 RGB high-resolution vision signals of described vision signal output subelement output to DVI TMDS signal, and export a DVI converting unit 32 of led controller to.
The RGB high definition video signal that a described DVI converting unit 32 is exported subelement 31 outputs with vision signal converts DVI TMDS signal to, and exporting led controller to, led controller will be controlled the high definition video signal that shows after described intercepting is amplified again.
The preferred SiI1162/TFP410 of the chip of a described DVI converting unit 32.
Link to each other with described video intercepting unit 21, will make the DVI conversion process, generate loop DVI TMDS vision signal and export the 2nd DVI converting unit 33 of next stage signal amplifier to from the video standard signal stream that described video intercepting unit 21 obtains.
Be described video intercepting unit 21 to the video standard signal stream that obtains according to command interception in, also export described complete video standard signal stream to described the 2nd DVI converting unit 33.
Described the 2nd DVI converting unit 33 will be made the DVI conversion process from the video standard signal of video interception unit 21, generate loop DVITMDS vision signal and export the next stage signal amplifier as input.
The preferred SiI1162/TFP410 of the chip of described the 2nd DVI converting unit 33.
Be used for and described input block 1, amplifying unit 2, output unit 3 link to each other respectively, input, amplification and the output of described video and/or vision signal are implemented the control module 4 of control.
Described control module 4 comprises key-press input unit, is used for by input equipments such as keyboard output steering order, and infrared input block is used for by infrared reception input control order.
Fig. 3 is the structural representation of a kind of signal amplifier the 3rd embodiment of the utility model, and different with Fig. 2 is that described signal amplifier also comprises:
Link to each other with described vision signal output subelement 31, be used for converting the vision signal of described vision signal output subelement output to the VGA signal, and export the VGA converting unit 5 of monitor to.
The vision signal that described VGA converting unit 5 is exported subelement 31 outputs with vision signal converts the VGA signal to, exports monitor to by the VGA output interface, and the vision signal that intercepting is amplified is monitored thus, and its chip is a general-purpose chip.
As from the foregoing, implement the described signal amplifier of the utility model embodiment, can realize supporting multiple simulation, the numeral input, output source, comprise RGB, AV, Svideo, YPbPr, YCbCr, two-way DVI or one road HDMI, one road DVI and DisplayPort interface, simultaneously, handle and amplification by the vision signal of 12 pairs of receptions of input processing unit, the high definition video data stream of 24 RGB 1280 * 1024 of unified generation standard, carrying out the secondary intercepting on this basis amplifies again, compare with traditional 24-position RGB 1024 * 768, enlarged scaling, improved the picture display quality, amplify subelement 22 two stage scalings by video in addition and support 24 RGB, 1600 * 1200 outputs, improved the amplifying power of signal amplifier, the described signal amplifier of present embodiment adopts advanced the reduced system cost and the twin-core sheet scheme of power consumption in addition, effectively reduces and produces and maintenance cost.
Fig. 4 is the structural representation of a kind of cascade video-splicing of the utility model multiplying arrangement embodiment, as shown in the figure, comprises four described signal amplifiers of the arbitrary embodiment of Fig. 1～Fig. 3.
Comprise first order signal amplifier A, second level signal amplifier B, third level signal amplifier C, fourth stage signal amplifier D.
The loop DVI output of first order signal amplifier A is as the input of second level signal amplifier B, the loop DVII output of second level signal amplifier B is as the input of third level signal amplifier C, the loop DVI output of third level signal amplifier C is as the input of fourth stage signal amplifier D, described every grade of signal amplifier DVI output also outputs to four LED display controllers successively respectively, and more multistage connection by that analogy.If the maximum of described signal amplifier is output as 1600 * 1200, then the senior general of level Four cascade constitutes 3200 * 2400 ultrahigh resolution LED display, can constitute more high-resolution LED display as adopting more multistage cascade.Optionally, the loop DVI of fourth stage signal amplifier D output also can be used as another DVI input of the non-raw video signal of first order signal amplifier A, to guarantee the consistance of the raw video signal that all signal amplifiers receive.
As from the foregoing, implement the described signal amplifier of the utility model embodiment, can realize supporting multiple simulation, the numeral input, output source, comprise RGB, AV, Svideo, YPbPr, YCbCr, two-way DVI or one road HDMI, one road DVI and DisplayPort interface, simultaneously, handle and amplification by the vision signal of 12 pairs of receptions of input processing unit, the high definition video data stream of 24 RGB 1280 * 1024 of unified generation standard, carrying out the secondary intercepting on this basis amplifies again, compare with 24 traditional RGB 1024 * 768, enlarged scaling, improved the picture display quality, amplify subelement 22 two stage scalings by video in addition and support 24 RGB, 1600 * 1200 outputs, and mistake is by the multi-stage cascade of described signal amplifier, realize more high-resolution output, effectively improved the amplifying power of signal amplifier.
What be necessary to illustrate is, all the other the general additional devices in above-mentioned each module, and as storer, clock chip etc., the utility model does not relate to its omission.Though the utility model is described with reference to current embodiment; but those skilled in the art will be appreciated that; above-mentioned embodiment only is used for illustrating the utility model; be not to be used for limiting protection domain of the present utility model; any within spirit of the present utility model and principle scope; any modification of being done; equivalence is replaced; improve; all should be included within the rights protection scope of the present utility model; for example change the single-chip video processor into discrete device; changing master chip is the chip with 10 processing poweies, to support 30 RGB high definition video signals output etc.
Claims (7)
1. a signal amplifier is characterized in that, comprising:
The input block that is used for receiver, video and/or sound signal;
Link to each other with described input block, described video and/or audio signal is intercepted the amplifying unit that amplifies again;
Link to each other with described amplifying unit, with the output unit of described processed video signal output, the also exportable sound signal of described output unit;
Be used for and described input block, amplifying unit, output unit link to each other respectively, input, amplification and the output of described video and/or audio signal are implemented the control module of control.
2. signal amplifier as claimed in claim 1 is characterized in that, described input block comprises:
Be used to receive the DVI signal and be two DVI receiving elements of RGB digital signal the DVI conversion of signals of described reception.
3. signal amplifier as claimed in claim 2 is characterized in that, described input block also comprises:
Be used for making conversion of signals and one-level processing and amplifying, generate the input processing unit of RGB high resolving power video standard signal stream according to the video input of Instruction Selection appointment,
Described input block also can be decoded other video and/or audio signal that receives, switching and signal conversion processes.
4. signal amplifier as claimed in claim 1 is characterized in that, described amplifying unit comprises:
Be used for according to the video intercepting unit of instruction at the video data of the redundant intercepting of the video standard signal stream appointed area of described input processing unit output;
Be used for linking to each other, be used for amplifying subelement according to the video that the convergent-divergent instruction is done non-linear amplification again of ratio and image optimization processing with the video data of described video intercepting unit intercepting with described video intercepting unit.
5. signal amplifier as claimed in claim 1 is characterized in that, described output unit comprises:
Be used for intercepting the video data of appointed area and the vision signal output subelement of output at the video data that described video amplifies subelement output according to instruction;
Be used for converting the vision signal of described vision signal output subelement output to DVI TMDS signal, and export a DVI converting unit of led controller to;
Link to each other with described video intercepting unit, the video standard signal stream that will obtain from described video intercepting unit is made the DVI conversion process, generates loop DVI TMDS vision signal and exports the 2nd DVI converting unit of next stage signal amplifier to.
6. signal amplifier as claimed in claim 5 is characterized in that, described output unit also comprises:
Link to each other with described vision signal output subelement, be used for converting the vision signal of described vision signal output subelement output to the VGA signal, and export the VGA converting unit of monitor to.
7. a cascade video-splicing multiplying arrangement is characterized in that, comprises at least two as each described signal amplifier of claim 1～claim 6.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2009202616760U CN201600877U (en) | 2009-12-18 | 2009-12-18 | Signal amplifier and cascade video mosaicing amplifying device |
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| CN2009202616760U CN201600877U (en) | 2009-12-18 | 2009-12-18 | Signal amplifier and cascade video mosaicing amplifying device |
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| CN201600877U true CN201600877U (en) | 2010-10-06 |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102903320A (en) * | 2012-08-17 | 2013-01-30 | 深圳市华星光电技术有限公司 | 4K2K resolution amplification method and 4K2K resolution amplification system applying same |
| CN103390396A (en) * | 2013-06-28 | 2013-11-13 | 京东方科技集团股份有限公司 | Multi-terminal synchronous display method and device and display device cascading system |
| CN104601935A (en) * | 2013-10-31 | 2015-05-06 | 深圳市朗驰欣创科技有限公司 | Frame splicing method and device |
| CN107172365A (en) * | 2017-04-25 | 2017-09-15 | 西安诺瓦电子科技有限公司 | Video source premonitoring device and method and video display processor |
| CN113467741A (en) * | 2018-04-18 | 2021-10-01 | 海信视像科技股份有限公司 | Screen transmission method, display device and screen transmission system thereof |
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2009
- 2009-12-18 CN CN2009202616760U patent/CN201600877U/en not_active Expired - Fee Related
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102903320A (en) * | 2012-08-17 | 2013-01-30 | 深圳市华星光电技术有限公司 | 4K2K resolution amplification method and 4K2K resolution amplification system applying same |
| WO2014026418A1 (en) * | 2012-08-17 | 2014-02-20 | 深圳市华星光电技术有限公司 | 4k2k resolution amplification method and 4k2k resolution amplification system employing same |
| CN102903320B (en) * | 2012-08-17 | 2015-02-18 | 深圳市华星光电技术有限公司 | 4K2K resolution amplification method and 4K2K resolution amplification system applying same |
| CN103390396A (en) * | 2013-06-28 | 2013-11-13 | 京东方科技集团股份有限公司 | Multi-terminal synchronous display method and device and display device cascading system |
| CN103390396B (en) * | 2013-06-28 | 2015-10-21 | 京东方科技集团股份有限公司 | A kind of multiple terminals synchronous display method, display unit and display unit cascade system |
| US9766851B2 (en) | 2013-06-28 | 2017-09-19 | Boe Technology Group Co., Ltd. | Multi-terminal synchronous display method, display apparatus and display apparatus cascading system |
| CN104601935A (en) * | 2013-10-31 | 2015-05-06 | 深圳市朗驰欣创科技有限公司 | Frame splicing method and device |
| CN107172365A (en) * | 2017-04-25 | 2017-09-15 | 西安诺瓦电子科技有限公司 | Video source premonitoring device and method and video display processor |
| CN113467741A (en) * | 2018-04-18 | 2021-10-01 | 海信视像科技股份有限公司 | Screen transmission method, display device and screen transmission system thereof |
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Granted publication date: 20101006 Termination date: 20121218 |