CN201750632U - Each-layer rivet hole positioning structure of multilayer circuit board - Google Patents
Each-layer rivet hole positioning structure of multilayer circuit board Download PDFInfo
- Publication number
- CN201750632U CN201750632U CN2010202984962U CN201020298496U CN201750632U CN 201750632 U CN201750632 U CN 201750632U CN 2010202984962 U CN2010202984962 U CN 2010202984962U CN 201020298496 U CN201020298496 U CN 201020298496U CN 201750632 U CN201750632 U CN 201750632U
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- layer
- copper foil
- rivet hole
- circuit board
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Abstract
The utility model discloses an each-layer rivet hole positioning structure of a multilayer circuit board, which is formed on a board edge at one surface of the circuit board of each layer and comprises a copper foil area which has an area covering the board edge of one surface of a substrate of the circuit board of each layer larger than that of a rivet hole; an internal hole of the copper foil area is provided with a circular space and a ring-shaped space which is positioned at the periphery of the circular space, and the circular space and the ring-shaped space are concentric; the copper foil area between the circular space and the ring-shaped space forms a ring-shaped copper foil layer, and the outer diameter of the ring-shaped copper foil layer is the same as the diameter of the rivet hole; the rivet hole positioning structure is integrally formed with a circuit layer by etching on the copper foil layer of the surface of the substrate, i.e. etching process that is conventionally called in the industry; and the copper foil area before etching forming is a part of the copper foil layer to be etched on the surface of the substrate, the substrate after etching forming, below the ring-shaped space and the circular space, is exposed, and the material of the substrate commonly adopts prepreg (PP for short).
Description
Technical field
The utility model relates to each interlayer positioning field of multilayer circuit board, especially a kind of each layer rivet hole location structure of multilayer circuit board.
Background technology
Multi-layer sheet is 6 on each laminate limit or 8 rivet holes (according to the plate size) contraposition riveted successively to be formed by rivet in the PCB technology; This rivet hole is that diameter is the circle center hole of 3.175mm, come outbreak out with diameter 3.175mm drill point again, existing rivet hole location structure as shown in Figure 1, after the boring intuitively the identification rivet hole whether bore partially, if bore inclined to one side, can't see at that time, and had only and know just that according to X-ARY heavy industry is just pretty troublesome more at that time after riveted is finished by the time; As heavy industry not or be disinclined to heavy industry, layer inclined to one side risk then arranged and cause scrapping.
Summary of the invention
In order to overcome above-mentioned defective, the utility model provides a kind of each layer rivet hole location structure of multilayer circuit board, and whether the identification rivet hole bores partially intuitively, prevents that layer partially.
The utility model for the technical scheme that solves its technical problem and adopt is:
Each of a kind of multilayer circuit board layer rivet hole location structure, be formed on the edges of boards of each layer wiring board one side, comprise the Copper Foil zone of the area of substrate one panel edges that is covered in each layer wiring board greater than rivet hole, the annular space that this Copper Foil zone inner opening is formed with the circular space of concentric and is positioned at the circular space periphery, Copper Foil zone between this circular space and the annular space forms annular copper foil layer, the overall diameter of this annular copper foil layer is identical with the aperture of rivet hole, being molded in the actual fabrication of rivet hole location structure is and the etching moulding on the copper foil layer of substrate surface of line layer one, promptly conventional in the industry said etch process, Copper Foil zone before the etching moulding is substrate surface and treats a part in the etched copper foil layer, above-mentioned annular space after the etching moulding and the substrate under the circular space expose, substrate material is generally mylar (prepreg is called for short PP).
As further improvement of the utility model, the overall diameter of described annular copper foil layer is 3.175mm
As further improvement of the utility model, the distance between the inner and outer rings limit of described annular space is 5mil.
As further improvement of the utility model, be formed with six described rivet hole location structures on the edges of boards of described each layer wiring board one side.
As further improvement of the utility model, be formed with eight described rivet hole location structures on the edges of boards of described each layer wiring board one side.
The beneficial effects of the utility model are: after adopting the utility model rivet hole location structure, during boring, still use the drill point of 3.175mm, bore the annular space of a remaining circle 5mil, whether the identification rivet hole bores partially intuitively, inclined to one side feelings row occurs boring and can proofread and correct the brill target drone immediately, prevents that layer partially.
Description of drawings
Fig. 1 is the prior art structural representation that the utility model contrasted;
Fig. 2 is a structural representation of the present utility model.
Embodiment
Embodiment: each of a kind of multilayer circuit board layer rivet hole location structure, be formed on the edges of boards of each layer wiring board one side, comprise the Copper Foil zone 1 of the area of substrate one panel edges that is covered in each layer wiring board greater than rivet hole, the annular space 12 that this Copper Foil zone 1 inner opening is formed with the circular space 11 of concentric and is positioned at the circular space periphery, Copper Foil zone 1 between this circular space 11 and the annular space 12 forms annular copper foil layer 10, the overall diameter of this annular copper foil layer 10 is identical with the aperture of rivet hole, being molded in the actual fabrication of rivet hole location structure is and the etching moulding on the copper foil layer of substrate surface of line layer one, promptly conventional in the industry said etch process, Copper Foil zone 1 before the etching moulding is substrate surface and treats a part in the etched copper foil layer, above-mentioned annular space after the etching moulding and the substrate under the circular space expose, substrate material is generally mylar (prepreg is called for short PP).
The overall diameter of described annular copper foil layer 10 is 3.175mm
Distance between the inner and outer rings limit of described annular space 12 is 5mil.
Be formed with six described rivet hole location structures on the edges of boards of described each layer wiring board one side.
Be formed with eight described rivet hole location structures on the edges of boards of described each layer wiring board one side.
Claims (5)
1. each layer rivet hole location structure of a multilayer circuit board, be formed on the edges of boards of each layer wiring board one side, it is characterized in that: comprise the Copper Foil zone (1) of the area of substrate one panel edges that is covered in each layer wiring board greater than rivet hole, this Copper Foil zone (1) inner opening is formed with the circular space (11) of concentric and is positioned at the annular space (12) of circular space periphery, Copper Foil zone (1) between this circular space (11) and the annular space (12) forms annular copper foil layer (10), and the overall diameter of this annular copper foil layer (10) is identical with the aperture of rivet hole.
2. each of multilayer circuit board according to claim 1 layer rivet hole location structure, it is characterized in that: the overall diameter of described annular copper foil layer (10) is 3.175mm.
3. each of multilayer circuit board according to claim 1 and 2 layer rivet hole location structure, it is characterized in that: the distance between the inner and outer rings limit of described annular space (12) is 5mil.
4. each of multilayer circuit board according to claim 1 layer rivet hole location structure is characterized in that: be formed with six described rivet hole location structures on the edges of boards of described each layer wiring board one side.
5. each of multilayer circuit board according to claim 1 layer rivet hole location structure is characterized in that: be formed with eight described rivet hole location structures on the edges of boards of described each layer wiring board one side.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010202984962U CN201750632U (en) | 2010-08-19 | 2010-08-19 | Each-layer rivet hole positioning structure of multilayer circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010202984962U CN201750632U (en) | 2010-08-19 | 2010-08-19 | Each-layer rivet hole positioning structure of multilayer circuit board |
Publications (1)
Publication Number | Publication Date |
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CN201750632U true CN201750632U (en) | 2011-02-16 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN2010202984962U Expired - Fee Related CN201750632U (en) | 2010-08-19 | 2010-08-19 | Each-layer rivet hole positioning structure of multilayer circuit board |
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CN (1) | CN201750632U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104363695A (en) * | 2014-10-20 | 2015-02-18 | 深圳崇达多层线路板有限公司 | Rivet hole site arranged on PCB (printed circuit board) core board and production method of rivet hole site |
CN105764272A (en) * | 2016-03-25 | 2016-07-13 | 柏承科技(昆山)股份有限公司 | HDI board high-concentration alignment manufacture method |
-
2010
- 2010-08-19 CN CN2010202984962U patent/CN201750632U/en not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104363695A (en) * | 2014-10-20 | 2015-02-18 | 深圳崇达多层线路板有限公司 | Rivet hole site arranged on PCB (printed circuit board) core board and production method of rivet hole site |
CN104363695B (en) * | 2014-10-20 | 2017-06-27 | 深圳崇达多层线路板有限公司 | A kind of rivet hole position on PCB core plate and preparation method thereof |
CN105764272A (en) * | 2016-03-25 | 2016-07-13 | 柏承科技(昆山)股份有限公司 | HDI board high-concentration alignment manufacture method |
CN105764272B (en) * | 2016-03-25 | 2018-12-18 | 柏承科技(昆山)股份有限公司 | HDI plate concentration degree returns contraposition manufacturing method |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110216 Termination date: 20130819 |