CN201322775Y

CN201322775Y - Any vector pulse stretching circuit

Info

Publication number: CN201322775Y
Application number: CNU2008202237717U
Authority: CN
Inventors: 何映洪; 曾亮
Original assignee: HEXIN MICROELECTRONICS (SHANGHAI) CO Ltd
Current assignee: IPGoal Microelectronics Sichuan Co Ltd
Priority date: 2008-12-25
Filing date: 2008-12-25
Publication date: 2009-10-07
Anticipated expiration: 2018-12-25

Abstract

The utility model discloses an any vector pulse stretching circuit, which comprises two circuits which are the same; each circuit comprises a trigger for time delay, a counter module used to judge the pulse and a comparator used to compare signals, which are subsequently connected; the comparators of the two circuits are finally connected with an output control circuit; the triggers are connected with a clock and a signal input end; and the any vector pulse stretching circuit can acquire the spike pulse of any vector in continuously changing signals, and realize higher precision by adopting a double-edge trigger method.

Description

Any vector stretch circuit

Technical field

The utility model relates to the microelectric technique and the communications field, particularly any vector stretch circuit.

Background technology

The pulse strenching technology is used to detect single vector pulse, be used for realizing the signal sharp cutting edge of a knife or a sword pulse that this signal of broadening occurs when a certain state is constant, its principle of work is: judge whether pulse produces, if produce the purpose that then reaches pulse strenching by time-delay output, its workflow as shown in Figure 1.

Because the segment count of prior art is made up of single counter, so only be applicable to the signal of single variation handled, when the pulse that runs into uncertain change direction, it can only not be suitable for the spike pulse signal that occurs when the broadening signal becomes China continuously to the pulse signal of a certain direction wherein its structures shape.

The utility model content

The utility model provides any vector stretch circuit for addressing the above problem, and circuit structure is simple, the spike that occurs in can broadening continually varying signal.

The technical solution of the utility model is as follows:

Any vector stretch circuit, it is characterized in that: comprise the circuit that two-way is identical, described circuit by the trigger that is used to delay time, be used to judge that the counter module of pulse, the comparer that is used for comparison signal connect to form successively, the comparer of described two-way circuit all connects on the output control circuit at last, and described trigger connects clock and signal input.

Described counter module is made up of 2 counters, can monitor the height pulse of input signal simultaneously, judges whether the saltus step of signal belongs to pulse.

The trigger front end of described one road circuit also is connected with reverser.

The principle of work of vector stretch circuit is as follows arbitrarily:

The triggering major clock that the clock input changes as signal, trigger (only plays time-lag action, purpose is that the signal before and after the clock period is judged, judge whether it changes) be used for input signal clock period of time-delay, in order to judge whether input signal variation has taken place, if variation (by a state transition to another state) has taken place in input signal, then carry out timing and handle (effect of timing is to judge whether this change procedure is a pulse) by counter, do not continue to change in the time of one section permission in the back if change, think that then this variation is the normal change of signal and non-pulse signal, if input signal less than the permission time (according to the design, the user can be according to oneself requiring to set maximum permission pulse width by outside input is own) in variation has taken place has thought that then this is a spike signal, this part judgement is finished by comparer (one tunnel comparer is used for the signal that rising edge clock collects is compared, and the comparer on another road is used for the signal that the clock negative edge collects is compared).The two-way trigger, counter, the function of comparer is identical with effect, only clock is the trigger through another road of inserting behind the reverser, counter, comparer so just can guarantee if spike is equally can be collected when the input clock negative edge arrives.Therefore how concern regardless of the forward position (the variation edge of pulse signal) of input narrow pulse signal and the relative time of time clock, its output stretched pulse width be pulse width control circuit (comparer) time counting value (N is the time counting value, can be imported by the outside) with the input burst pulse the forward position add time clock the forward position or the back along poor.Although do not change the clock cycle of pulse-width controlled counting circuit, but because the forward position of input burst pulse has only half clock cycle (note: the dutycycle of clock pulse signal is 1: 1) with the maximum time difference of control counting circuit time clock rising edge, so the width error of stretched pulse signal approximates clock cycle greatly half.

The beneficial effects of the utility model are as follows:

The utility model can be gathered the spike of any vector in the continually varying signal, employing simultaneously is two can to reach higher precision along the triggering mode method.

Description of drawings

Fig. 1 is the workflow diagram of background technology traditional structure

Fig. 2 is a structure principle chart of the present utility model

Fig. 3 is a structural representation of the present utility model

Fig. 4 is the imitative town of a sequential of the present utility model waveform synoptic diagram

Fig. 5 is a practical application synoptic diagram of the present utility model

Embodiment

Shown in Fig. 2-3, any vector stretch circuit, comprise the circuit that two-way is identical, described circuit by the trigger that is used to delay time, be used to judge that the counter module of pulse, the comparer that is used for comparison signal connect to form successively, the comparer of described two-way circuit all connects on the output control circuit at last, and described trigger connects clock and signal input.

The principle of work of vector stretch circuit is as follows arbitrarily:

The triggering major clock that the clock input changes as signal, trigger 1 (plays time-lag action, purpose is that the signal before and after the clock period is judged, judge whether it changes) be used for input signal clock period of time-delay, in order to judge whether input signal variation has taken place, if variation (by a state transition to another state) has taken place in input signal, then carry out timing and handle (effect of timing is to judge whether this change procedure is a pulse) by counter 1, do not continue to change in the time of one section permission in the back if change, think that then this variation is the normal change of signal and non-pulse signal, if input signal less than the permission time (according to the design, the user can be according to oneself requiring to set maximum permission pulse width by outside input is own) in variation has taken place has thought that then this is a spike signal, this part judgement is finished by comparer (comparer 1 is used for the signal that rising edge clock collects is compared, and comparer 2 is used for the signal that the clock negative edge collects is compared).Trigger 2, counter 2, the function of comparer 2 with the effect respectively with trigger 1, counter 1, comparer 1 is identical, and only clock is the trigger 2 through inserting behind the reverser, counter 2, comparer 2 so just can guarantee if spike is equally can be collected when the input clock negative edge arrives.Therefore how concern regardless of the forward position (the variation edge of pulse signal) of input narrow pulse signal and the relative time of time clock, its output stretched pulse width be pulse width control circuit (comparer) time counting value (N is the time counting value, can be imported by the outside) with the input burst pulse the forward position add time clock the forward position or the back along poor.Although do not change the clock cycle of pulse-width controlled counting circuit, but because the forward position of input burst pulse has only half clock cycle (note: the dutycycle of clock pulse signal is 1: 1) with the maximum time difference of control counting circuit time clock rising edge, so the width error of stretched pulse signal approximates clock cycle greatly half.

As shown in Figure 4, CLOCK is a clock input signal, IN is an input signal, OUT is the output signal after the pulse strenching, can from simulation waveform, see clearly when input signal changes, whether the variation of exporting back according to input signal is that the spike signal is made corresponding variation, and no matter input signal changes still negative edge variation at the rising edge of clock, can both whether be the spike signal by correct affirmation, if, output then can be broadened, and broadened signal also can be accurate to half the clock period.Through the actual use of FPGA, the result that result who obtains and simulation waveform obtain is in full accord.

As shown in Figure 5, detect high speed panel output status signal.When the test high-speed serial bus, because the state output signal of high speed panel should be to remain unchanged when not changing the control input in theory, but output status signal has uncertain spike output when not changing input signal for some reason, and then influence the total system operate as normal, because the express extremely uncertainty of spike signal speed makes and is difficult to measure these pulses by conventional method in measurement, but use any pulse vector widening circuit that it is received the LED lamp of normal use by FPGA, when suitable this signal certain hour of broadening then can be normal the measurement, only need observe the LED lamp and whether glimmer and know just whether this state output signal reaches requirement.

Claims

1, any vector stretch circuit, it is characterized in that: comprise the circuit that two-way is identical, described circuit by the trigger that is used to delay time, be used to judge that the counter module of pulse, the comparer that is used for comparison signal connect to form successively, the comparer of described two-way circuit all connects on the output control circuit at last, and described trigger connects clock and signal input.

2, according to the described any vector stretch circuit of claim 1, it is characterized in that: described counter module is composed in parallel by 2 counters.

3, according to the described any vector stretch circuit of claim 1, it is characterized in that: the trigger front end of described one road circuit also is connected with reverser.