CN201111932Y - Internal storage choosing device - Google Patents
Internal storage choosing device Download PDFInfo
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- CN201111932Y CN201111932Y CNU2007201826349U CN200720182634U CN201111932Y CN 201111932 Y CN201111932 Y CN 201111932Y CN U2007201826349 U CNU2007201826349 U CN U2007201826349U CN 200720182634 U CN200720182634 U CN 200720182634U CN 201111932 Y CN201111932 Y CN 201111932Y
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- static random
- access memory
- random access
- management controller
- baseboard management
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Abstract
The utility model discloses a memory selecting device which is applied to an electronic device provided with a first static random-access memory and a second static random-access memory, wherein, the first static random-access memory and the second static random-access memory are respectively provided with a first input pin and a second input pin. The memory selecting device comprises a baseboard management controller and a conversion unit, wherein, the baseboard management controller is provided with a first output pin and a second output pin; the first output pin is electrically connected with the first input pin of the first static random-access memory and the second static random-access memory and the second output pin is electrically connected with the second input pin of the second static random-access memory; the conversion unit is electrically connected with the second output pin of the baseboard management controller and the second input pin of the first static random-access memory and is used for carrying out conversion process of selection signals output from the baseboard management controller, causing the electronic device to select the first static random-access memory or the second static random-access memory through activation signals and the selection signals.
Description
Technical field
The utility model relates to a kind of internal memory selecting device, more detailed it, relate to and a kind ofly can between first, second static random access memory of electronic installation, carry out the internal memory selecting device that internal memory is chosen action.
Background technology
Along with continually developing of computer technology and high-speed equipment, also more and more higher to the requirement of data storage volume and data transmission rate.And because the difference of transmission mode, can various high-speed equipments realize that reliable exchanges data just seems very important when operation.Wherein, the appearance of at a high speed two SRAM (Static Random Access Memory, static random access memory) then provides reliable exchanges data usefulness for high-speed equipment.With common SRAM model C Y62128 is example, it is BMC (Baseboard Management Controller, baseboard management controller) SRAM that provides, the capacity of a CY62128 is 128K X 8Bit, the capacity of the CY62128 of monolithic can not satisfy the needs of system, so in electronic installation, can use two CY62128,, in selected SRAM, carry out corresponding read-write motion for electronic installation so the chip of BMC need carry out choosing of memory chip to these two SRAM.
See also Fig. 1, show and used in the prior artly for example carry out the design circuit figure that internal memory is chosen among the SRAM of CY62128 in two.As shown in the figure, for a SRAM10, first output connecting pin 120 of this BMC12 and second output connecting pin 122 electrically connect by for example pin CS_N of first converting unit 14 with a SRAM10, wherein, this first output connecting pin 120 is in order to produce first control signal, this second output connecting pin 122 is in order to produce second control signal, this first control signal and second control signal produce the pin CS_N that a selection signal with first state value exports a SRAM10 to after the signal Processing of this first converting unit 14, for choosing a SRAM10; And for the 2nd SRAM11, first output connecting pin 120 of this BMC12 and second converting unit 16 electrically connect, and together with of the pin CS_N electric connection of second output connecting pin 122 by the 3rd converting unit 18 and the 2nd SRAM11, wherein, this first control signal and second control signal produce one after the signal Processing of this second, third converting unit 14,16 has the selection signal of second state value and exports the pin CS_N of the 2nd SRAM12 to, for choosing the 2nd SRAM12.In present embodiment, this first, the 3rd converting unit the 14, the 18th, for example by or door (OR Gate) and peripheral electronic component thereof and circuit formed, this second converting unit 16 for example is made up of not gate (NOT Gate) and peripheral electronic component thereof and circuit.So the logic between the signal is closed and can be described below, when second control signal was high levels, first, second SRAM10,11 all can not be activated, when second control signal is low level, the first, the 3rd converting unit 14,18 or door be unlocked.And when first control signal is low level, then have the pin CS_N of the selection signal (low level signal) of first state value to a SRAM10 via producing after the conversion of signals of this first converting unit 14, use and choose a SRAM10, use a SRAM 10 for this electronic installation; And when first control signal is high levels, via producing the pin CS_N that has the selection signal (low level signal) of second state value and export the 2nd SRAM11 to after the conversion of signals of this second, third converting unit 16,18, use the 2nd SRAM 11 for this electronic installation.
But, in foregoing circuit figure, only utilize the single pin CS_N of SRAM, be about to the single pin CS_N that this control signal all inputs to this SRAM and choose operation to finish internal memory.For this reason, need additional configuration by for example by or the first, the 3rd converting unit 14,18 formed of door and peripheral electronic component thereof and circuit and formed second converting unit 16 by not gate and peripheral electronic component thereof and circuit, have the selection signal of first state value and the selection signal of second state value with conversion of signals and the generation that realizes control signal, use and choose a SRAM 10 or the 2nd SRAM11, cause selecting circuit too cumbersome, and increase comparatively speaking, the whole cost of circuit design.
Therefore, how to provide a kind of circuit simple internal memory selecting device, use and overcome existing internal memory and choose complex circuit designs in the design, element is various and cost is higher drawback, and can corresponding saving design space, present problem demanding prompt solution become then.
The utility model content
In view of the defective of above-mentioned prior art, fundamental purpose of the present utility model is to provide a kind of internal memory selecting device, chooses action carrying out internal memory between first, second static random access memory of electronic installation.
Another purpose of the present utility model is the internal memory selecting device that a kind of simplicity of design is provided and can saves arrangement space.
For achieving the above object and other purpose, the utility model promptly provides a kind of internal memory selecting device, be applied to one and have first, second static random access memory (Static RandomAccess Memory, SRAM) in the electronic installation, wherein, this is first years old, second static random access memory has the first input pin and the second input pin respectively, this internal memory selecting device comprises: baseboard management controller, have first output connecting pin and second output connecting pin, wherein, first output connecting pin of this baseboard management controller be with this first, the first input pin of second static random access memory electrically connects, second output connecting pin of this baseboard management controller is to import pin with second of this second static random access memory to electrically connect, this baseboard management controller is in order to producing activation signal and via this first output connecting pin output, and produces one and have the selection signal of first state value via this second output connecting pin output; And converting unit, electrically connect with second output connecting pin of this baseboard management controller and the second input pin of first static random access memory, carry out conversion process in order to selection signal to this baseboard management controller output, should select signal to be converted to second state value by first state value, and the selection signal of this second state value is exported to the second input pin of this first static random access memory, thereby when this first, the first input pin of second static random access memory receives the activation signal of this baseboard management controller output and when being in state of activation, selection signal by the output of this baseboard management controller with first state value and through the selection signal that this converting unit conversion is exported with second state value choose this first, person one of in second static random access memory uses for this electronic installation.
Be electrically connected with a resistive element between the second input pin of second output connecting pin of above-mentioned this baseboard management controller and this second static random access memory.
The embodiment of the converting unit in the above-mentioned internal memory selecting device comprises not gate, provide power supply to give the power supply of this not gate and be located at electric capacity between this not gate and the earth terminal.
The embodiment of above-mentioned internal memory selecting device is meant that this activation signal is a low level, and the selection signal of first state value is a low level, and the selection signal of second state value is high levels, then chooses this first static random access memory; And be low level according to this activation signal, the selection signal of first state value is a high levels, and the selection signal of second state value is low level, then chooses this second static random access memory.
Than prior art, internal memory selecting device of the present utility model mainly is by with first output connecting pin of baseboard management controller and this first, the first input pin of second static random access memory electrically connects, and the second input pin of second output connecting pin of baseboard management controller and this second static random access memory electrically connected and via the second input pin electric connection of a converting unit and first static random access memory, thereby when first, the first input pin of second static random access memory receives the activation signal of this baseboard management controller output and when being in state of activation, selection signal by the output of this baseboard management controller with first state value and through the selection signal with second state value of converting unit conversion and output choose this first, person one of in second static random access memory, use for this electronic installation, than prior art, internal memory selecting device of the present utility model needn't must make first of baseboard management controller as prior art, second output connecting pin by a plurality of converting units and be electrically connected to this first, the input pin of second static random access memory can realize that identical internal memory chooses function, therefore can simplify circuit structure, and reach the saving electronic component, manufacturing cost and the effect of saving the design space.
Description of drawings
Fig. 1 is the design circuit synoptic diagram of prior art one in order to two internal memories are chosen;
Fig. 2 A is the basic framework synoptic diagram of internal memory selecting device of the present utility model; And
Fig. 2 B is a circuit example of realizing internal memory selecting device of the present utility model in order to explanation.
The main element symbol description
10 the one SRAM
11 the 2nd SRAM
12BMC
120 first output connecting pins
122 second output connecting pins
14 first converting units
16 second converting units
18 the 3rd converting units
20 first internal memories
21 second internal memories
200,210 first input pins
202,212 second input pins
220 first output connecting pins
222 second output connecting pins
22 baseboard management controllers
24 converting units
240 not gates
242 power supplies
244 electric capacity
26 resistive elements
Embodiment
Below by specific instantiation embodiment of the present utility model is described, those skilled in the art can understand other advantage of the present utility model and effect easily by the content that this instructions disclosed.The utility model also can be implemented or be used by other different instantiation, and the every details in this instructions also can be based on different viewpoints and application, carries out various modifications and change under the spirit of the present utility model not deviating from.
See also Fig. 2 A, it shows the basic framework synoptic diagram of internal memory selecting device of the present utility model, internal memory selecting device of the present utility model is to be applied to one have in the electronic installation of first static random access memory 20 and second static random access memory 21, wherein, this first static random access memory 20 has the first input pin 200 and the second input pin 202 respectively, and this second static random access memory 21 has the first input pin 210 and the second input pin 212 respectively.In present embodiment, this electronic installation is PC, notebook computer, or is other data processing equipments such as server.This first, second static random access memory the 20, the 21st, (Static Random Access Memory SRAM) describes for example with the static random access memory of model C Y62128.
Shown in Fig. 2 A, internal memory selecting device of the present utility model comprises baseboard management controller with first output connecting pin 220 and second output connecting pin 222 (Baseboard ManagementController, BMC) 22 and converting unit 24.
This baseboard management controller 22 has first output connecting pin 220 and second output connecting pin 222 at least, wherein, this first output connecting pin 220 is and electrical 200,210 electric connections of the first input pin of this first, second static random access memory 20,21 that this second output connecting pin 222 is to import pin 212 with second of this second static random access memory 21 to electrically connect.This baseboard management controller 22 is in order to producing activation signal and via these first output connecting pin, 220 outputs, and produces one and have the selection signal of first state value and via these second output connecting pin, 222 outputs.
This converting unit 24 is to electrically connect with second output connecting pin 222 of this baseboard management controller 22 and the second input pin 202 of first static random access memory 20, carries out conversion process in order to the selection signal to these baseboard management controller 22 outputs and exports to produce a selection signal with second state value.In present embodiment, this converting unit 24 for example is made up of not gate and peripheral electronic component thereof and circuit.
Therefore, by above-mentioned internal memory selecting device, thereby when the first input pin 200,210 of this first, second static random access memory 20,21 receives the activation signal of this baseboard management controller 22 outputs and when being in state of activation, choose this first or second static random access memory by the selection signal with first state value of these baseboard management controller 22 outputs and via the selection signal with second state value of these converting unit 24 outputs, use for this electronic installation.
See also Fig. 2 B again, it is the circuit diagram that shows a specific embodiment of internal memory selecting device of the present utility model, below cooperates Fig. 2 B to describe the annexation and the principle of work thereof of each element in the preferred circuit structure of internal memory selecting device of the present utility model in detail.
Shown in Fig. 2 B, in present embodiment, the pin CS_N that for example general static random access memory chip of the first input pin 200,210 of this first, second static random access memory 20,21 is possessed, and the second input pin the 202, the 212nd, the pin CS that for example general static random access memory chip is possessed, wherein, this first input pin 200,210 is that low level is effective, this second input pin 202,212 is effective for high levels.This baseboard management controller 22 is for example to be that (Baseboard Management Controller, BMC), it has first output connecting pin 220 and second output connecting pin 222 to a baseboard management controller at least.Wherein, this first output connecting pin 220 is to import pin 200,210 with first of this first, second static random access memory 20,21 to electrically connect; And this second output connecting pin 222 is to import pin 212 with second of this second static random access memory 21 to electrically connect.In present embodiment, be electrically connected with a resistive element 26 between the second input pin 212 of second output connecting pin 222 of this baseboard management controller 22 and this second static random access memory 21.
This converting unit 24 is to electrically connect with second output connecting pin 222 of this baseboard management controller 22 and the second input pin 202 of first static random access memory 20.In present embodiment, this converting unit 24 comprises not gate (NOT Gate) 240, the power supply 242 that power supply gives this not gate 240 is provided and be located between this not gate 240 and the earth terminal electric capacity 244 for filtering, with the accurate conversion process of selection signal execute bit that this second output connecting pin 222 is exported to produce the selection signal output with second state value.In present embodiment, this activation signal is that low level is effective, therefore, the selection signal of first output connecting pin 220 first state value that is output as of this baseboard management controller 22, wherein this first state value is a low level, and this not gate 240 of process makes this first state value transfer high levels to form the selection signal of this second state value, so with regard to the pin CS of first static random access memory 20, the selection signal of this second state value is that high levels is effective by low level.
The principle of work of present embodiment circuit structure is as described below: when first, second static random access memory 20,21 the first input pin 200, during activation signal (low level signal) that 210 first output connecting pins 220 that receive this baseboard management controller 22 are exported and be in state of activation, because first, second static random access memory 20,21 pin CS_N is an effective status when being in the low level signal, and when the selection signal of being exported when second output connecting pin 222 of this baseboard management controller 22 is high levels, promptly produce selection signal (high levels signal) to second of this second static random access memory 21 and import pin 212 with first state value, because the pin CS of second static random access memory 21 is an effective status when being in the high levels signal, so choose this second static random access memory 21, use for this electronic installation; And the selection signal of being exported when second output connecting pin 222 of this baseboard management controller 22 is a low level, then conversion of signals (transferring high levels to by low level) the back generation via this converting unit 24 has the second input pin 202 of the selection signal (high levels signal) of second state value to this first static random access memory 20, because the pin CS of first static random access memory 20 is the effect state when being in the high levels signal, so choose this first static random access memory 20, use for this electronic installation.
In sum, than prior art, internal memory selecting device of the present utility model is by with first output connecting pin of baseboard management controller and this first, the first input pin of second static random access memory electrically connects, and the second input pin of second output connecting pin of baseboard management controller and this second internal memory electrically connected and via the second input pin electric connection of a converting unit and first static random access memory, thereby when first, the first input pin of second static random access memory receives the activation signal of this baseboard management controller output and when being in state of activation, choose this first static random access memory or second static random access memory by the selection signal with first state value of this baseboard management controller output and the selection signal with second state value of converting unit output, use for this electronic installation, than prior art, the input pin that internal memory selecting device of the present utility model only need utilize internal memory to provide is used as the judgement that internal memory is chosen, and needn't must make first of baseboard management controller as prior art, second output connecting pin by a plurality of converting units and be electrically connected to this first, the input pin of second static random access memory, therefore, internal memory selecting device of the present utility model is when realizing that internal memory is chosen function, also can reach the simplification circuit structure, save the purpose of electronic component and manufacturing cost, and can corresponding saving design space.
The foregoing description is illustrative principle of the present utility model and effect thereof only, but not is used to limit the utility model.Any those skilled in the art all can be under spirit of the present utility model and category, and the foregoing description is modified and changed.Therefore, rights protection scope of the present utility model should be foundation with the scope of claims.
Claims (4)
1. internal memory selecting device, be applied to one and have in the electronic installation of first, second static random access memory, wherein, this first, second static random access memory has the first input pin and the second input pin respectively, it is characterized in that this internal memory selecting device comprises:
Baseboard management controller, have first output connecting pin and second output connecting pin, wherein, first output connecting pin of this baseboard management controller is to import pin with first of this first, second static random access memory to electrically connect, second output connecting pin of this baseboard management controller is to import pin with second of this second internal memory to electrically connect, this baseboard management controller is in order to producing activation signal and via this first output connecting pin output, and produces one and have the selection signal of first state value and via this second output connecting pin output; And
Converting unit, electrically connect with second output connecting pin of this baseboard management controller and the second input pin of first static random access memory, carry out conversion process in order to selection signal to this baseboard management controller output, should selecting signal to be converted to second state value, and the selection signal of this second state value is exported to the second input pin of this first internal memory by first state value; Thereby when the first input pin of this first, second static random access memory receives the activation signal of this baseboard management controller output and when being in state of activation, the selection signal with first state value by the output of this baseboard management controller and one of choose in this first, second static random access memory the person through the selection signal with second state value that this converting unit conversion export is for this electronic installation use.
2. internal memory selecting device according to claim 1 is characterized in that: be electrically connected with a resistive element between the second input pin of second output connecting pin of this baseboard management controller and this second static random access memory.
3. internal memory selecting device according to claim 1 is characterized in that: this converting unit comprises not gate, provide power supply to give the power supply of this not gate and be located at electric capacity between this not gate and the earth terminal.
4. internal memory selecting device according to claim 1 is characterized in that: in this activation signal is low level, and the selection signal of first state value is a low level, and the selection signal of second state value is high levels, then chooses this first static random access memory; In this activation signal is low level, and the selection signal of first state value is a high levels, and the selection signal of second state value is low level, then chooses this second static random access memory.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007201826349U CN201111932Y (en) | 2007-10-17 | 2007-10-17 | Internal storage choosing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007201826349U CN201111932Y (en) | 2007-10-17 | 2007-10-17 | Internal storage choosing device |
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| CN201111932Y true CN201111932Y (en) | 2008-09-10 |
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| CNU2007201826349U Expired - Fee Related CN201111932Y (en) | 2007-10-17 | 2007-10-17 | Internal storage choosing device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101770275A (en) * | 2008-12-27 | 2010-07-07 | 鸿富锦精密工业（深圳）有限公司 | Method for enhancing efficiency of memory power supply |
| CN102457392A (en) * | 2010-10-18 | 2012-05-16 | 英业达股份有限公司 | Baseboard management controller sharing server system and method |
-
2007
- 2007-10-17 CN CNU2007201826349U patent/CN201111932Y/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101770275A (en) * | 2008-12-27 | 2010-07-07 | 鸿富锦精密工业（深圳）有限公司 | Method for enhancing efficiency of memory power supply |
| CN102457392A (en) * | 2010-10-18 | 2012-05-16 | 英业达股份有限公司 | Baseboard management controller sharing server system and method |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080910 Termination date: 20121017 |