CN1996248A - User program guiding method and system - Google Patents
User program guiding method and system Download PDFInfo
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- CN1996248A CN1996248A CN 200610167187 CN200610167187A CN1996248A CN 1996248 A CN1996248 A CN 1996248A CN 200610167187 CN200610167187 CN 200610167187 CN 200610167187 A CN200610167187 A CN 200610167187A CN 1996248 A CN1996248 A CN 1996248A
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Abstract
A user program guiding method comprises storing user program and its feature parameters in the NAND FLASH, with the microprocessor reading out the said feature parameter, based on which restructure the visit operation of the NAND FLASH, and read out user program through restructured visit operation. It also provides a user program introduction system, which comprises microprocessor and NAND FLASH. It can realize the introduction from microprocessor and all kinds of NAND FLASH to be compatible with various types of NAND FLASH.
Description
Technical field
The present invention relates to chip system (SoC, System on Chip) technology, relate in particular to user program bootstrap technique and user program guidance system.
Background technology
Along with fast development of information technology, various electronic products emerge in an endless stream, as MP3, MP4, PMP etc.In these consumer electronics products, all comprise a SoC system usually.Referring to shown in Figure 1, the SoC system mainly comprises such as the microprocessor of miniature control module (MCU) and memory bank two parts.Described memory bank can be nonvolatile memory NOR FLASH or NAND FLASH etc.Wherein, store the prerequisite codes of chip such as some guidance codes (boot code), code decode algorithm code in the microprocessor, be mainly used in the guiding of the initialization of finishing chip, user program and code decode algorithm etc.; Memory bank is mainly used in storage user program and large batch of data, as the MP3 data etc.
At present, that use is many in the SoC system is NOR FLASH, and MCU can directly move the user program of storing among the NOR FLASH.But along with the continuous rising of the NAND FLASH ratio of performance to price, the use of NAND FLASH in consumer electronics product (as MP3, MP4, PMP etc.) more and more widely has the trend that replaces NOR FLASH greatly.
Usually, MCU takes mode reading of data from storer of directly address, i.e. MCU output physical address, storer output data.The mode of this directly address mode obvious and NAND FASH utility command reading of data is inconsistent, this has also just caused MCU can not directly move the user program of storing among the NANDFLASH, and the guiding of MCU from NAND FLASH finished in the middle operation of the random access memory (RAM) that the user program of storing among the NAND FLASH must be read MCU inside.
The code that MCU reads NAND FLASH generally designs at the NAND FLASH of particular type, is stored in the storer of MCU inside, has the characteristic that can not revise, and produces prior to the NAND FLASH in the system.That is to say that MCU can only could realize correct visit to the NAND FLASH of the particular type that is complementary with it, and NANDFLASH that can't compatible other type.
But, because NAND FLASH's is of a great variety in actual applications, and different NANDFLASH has different visit orders, different address sizes, different characteristics such as access cycle, therefore, for different NAND FLASH, want to realize correct visit, just must use different access methods.
In sum, existing user program bootstrap technique can not adapt to the requirements for access of all kinds NANDFLASH, and can only finish the guiding of particular type NAND FLASH.
Summary of the invention
In view of this, fundamental purpose of the present invention is to provide a kind of user program bootstrap technique and user program guidance system, in using the SoC system of NAND FLASH as the code storage medium, realizes the guiding of microprocessor from all kinds NAND FLASH.
For achieving the above object, user program bootstrap technique provided by the invention is as follows:
Storage user program and unique characteristics parameter thereof in NAND FLASH, microprocessor reads described characteristic parameter from NANDFLASH, reconfigure the accessing operation of NAND FLASH according to the characteristic parameter that reads, and from NAND FLASH, read user program by the accessing operation that reconfigures and in the internal random storer, move.
Wherein, described microprocessor further comprised read characteristic parameter from NAND FLASH before: the access cycle that microprocessor access NAND FLASH is set;
Described microprocessor reads characteristic parameter and comprises from NAND FLASH:
A, microprocessor be according to writing read command to NAND FLASH the access cycle that is provided with, and write the memory address of characteristic parameter to NAND FLASH;
Whether B, microprocessor judges NAND FLASH are ready to characteristic parameter, if, then according to from NAND FLASH, reading all characteristic parameters the access cycle that is provided with; Otherwise, continue to carry out this step.
Described access cycle is more than or equal to 50ns.
Described read command is order 0;
Described microprocessor comprises to the memory address that NAND FLASH writes characteristic parameter: microprocessor writes 68 address 0 continuously to NAND FLASH.
Further comprise before the described step B:
Microprocessor judges that in the time of predetermined length whether NAND FLASH is preparing characteristic parameter, if, execution in step B then; Otherwise, confirm order, execution in step B again according to writing to NAND FLASH the access cycle that is provided with.
Whether described microprocessor judges NAND FLASH comprises at the preparation characteristic parameter: whether the READY pin of microprocessor judges NAND FLASH is low level;
Whether described microprocessor judges NAND FLASH is ready to characteristic parameter comprises: whether the READY pin of microprocessor judges NAND FLASH is high level.
Described affirmation order is 0x30.
Described characteristic parameter is stored in the zero page of NAND FLASH the 0th piece.
Described characteristic parameter comprises: the physical location of the order of column address width, row address width, page capacity, read operation, the foundation of signal and retention time, data buffering time and bad block table.
Described microprocessor is miniature control module MCU.
In addition, the present invention also provides a kind of user program guidance system, and this system comprises: NAND FLASH and microprocessor, wherein,
NAND FLASH is used to store user program and unique characteristics parameter thereof;
Microprocessor, be used for reading described characteristic parameter from NAND FLASH, reconfigure the accessing operation of NAND FLASH according to the characteristic parameter that reads, and from NANDFLASH, read user program by the accessing operation that reconfigures and in the internal random storer, move.
Described characteristic parameter is stored in the zero page of NAND FLASH the 0th piece.
Described microprocessor is miniature control module MCU.
This shows, the present invention stores the characteristic parameter of himself by NAND FLASH, in bootup process, microprocessor reads this characteristic parameter from NAND FLASH, reconfigure the accessing operation of NAND FLASH according to the characteristic parameter that reads, rather than the accessing operation of NAND FLASH is configured be solidificated in the microprocessor in advance.Like this, microprocessor just can be carried out different accessing operations at dissimilar NAND FLASH, finishes the correct visit of all kinds NAND FLASH, realizes the guiding from all kinds NAND FLASH, can be compatible mutually with the NANDFLASH of arbitrary type.
Description of drawings
Fig. 1 is a SoC system architecture synoptic diagram of the prior art.
Fig. 2 is the user program guidance system structural representation among the present invention.
Fig. 3 is the user program bootstrap technique process flow diagram in the embodiment of the invention.
Embodiment
For making purpose of the present invention, technical scheme and advantage clearer, the embodiment that develops simultaneously with reference to the accompanying drawings is described in further detail the present invention.
The basic thought of user program bootstrap technique provided by the invention is: storage user program and unique characteristics parameter thereof in NAND FLASH, microprocessor reads described characteristic parameter from NAND FLASH, reconfigure the accessing operation of NAND FLASH according to the characteristic parameter that reads, and from NAND FLASH, read user program by the accessing operation that reconfigures and in the internal random memory RAM, move.
Because under original state, microprocessor is not also known the type of current NAND FLASH, and therefore the unified characteristic that need be had according to dissimilar NAND FLASH is determined a NAND FLASH model the most basic.Such as, microprocessor give tacit consent to address width that current NAND FLASH has 6 bytes, support read command (general all is 0), have 8 bit wides the data-interface width, have slow access speed etc.Perhaps this model also can support to confirm order (that general is 0x30).By this basic model, microprocessor can successfully read the characteristic parameter of NAND FLASH, use these characteristic parameters to set up the model of current NAND FLASH then, obtain the characteristic parameter that adapts with current NANDFLASH, that is to say, reconfigure the accessing operation of NANDFLASH according to these characteristic parameters.
Corresponding user program bootstrap technique provided by the invention, the present invention also provides a kind of user program guidance system, and referring to shown in Figure 2, this system comprises: NAND FLASH and microprocessor.Wherein, NANDFLASH is used to store user program and unique characteristics parameter thereof; Microprocessor is used for reading described characteristic parameter from NAND FLASH, reconfigures the accessing operation of NAND FLASH according to the characteristic parameter that reads, and reads user program by the accessing operation that reconfigures from NAND FLASH and move in internal RAM.
Wherein, described microprocessor is process chip such as MCU.
The characteristic parameter of described NAND FLASH comprises: the physical location of the order of column address width, row address width, page capacity, read operation, the foundation of signal and retention time, data buffering time and bad block table etc.
Because the zero page of NAND FLASH has to guarantee being intact singularity, therefore, the characteristic parameter of NAND FLASH can be kept at the zero page of NAND FLASH the 0th piece, promptly note the characteristic parameter of this NAND FLASH at 0 place, address of NAND FLASH.
For the purpose of more clear, be example with this microprocessor of MCU below, bootstrap technique provided by the invention is elaborated.Wherein, the characteristic parameter of NAND FLASH is kept at the zero page of NAND FLASH the 0th piece.
Referring to shown in Figure 3, the user program bootstrap technique in the present embodiment mainly may further comprise the steps:
After step 301:MCU powers on, reset, initialized operation.
Step 302:MCU at first goes into read command to the NANDFLASH slow write in order to obtain the characteristic parameter of NAND FLASH.
In this step, described read command is 0.In the prior art, be generally 50ns the access cycle of read-write NAND FLASH.And among the present invention since under original state the MCU default access to as if the most basic NAND FLASH, therefore in order to improve reliability and compatibility, the MCU long access NAND FLASH that should try one's best.Among the present invention, can set in advance the access cycle of MCU visit NAND FLASH, this access cycle is more than or equal to 50ns, as being that the cycle slow write is gone into read command with 20 times of 50ns.
Step 303:MCU writes the address of characteristic parameter in NAND FLASH that need read at a slow speed to NAND FLASH.
The address width of present NAND FLASH is the address word joint number, generally is not wait to 5 bytes from 3 bytes.Consider compatibility backward, can select to write continuously at a slow speed 68 address 0 here.For unnecessary address, NAND FLASH can ignore automatically, therefore needn't worry misoperation to occur owing to redundant address causes NAND FLASH.
Step 304:MCU judges in the time of predetermined length NAND FLASH whether preparing characteristic parameter, judges promptly whether NAND FLASH is in busy state, if then execution in step 306; Otherwise, execution in step 305.
Generally in actual applications, MCU judges whether the READY pin of NAND FLASH is low level, if represent that then NAND FLASH is in busy condition; If be high level, represent that then NAND FLASH is in idle condition, also do not begin to prepare the needed characteristic parameter of MCU.Wherein, under the original state, the READY pin of NAND FLASH is a high level.
And MCU repeatedly inquires about the level signal of the READY pin of NANDFLASH in predefined one or more clock period, if all be high level at every turn, judges that then NANDFLASH is in idle condition.
Step 305:MCU writes at a slow speed to NAND FLASH and confirms order (as order 0x30), represents that once more MCU wishes to read the characteristic parameter among the NAND FLASH.
Step 306:MCU judges whether NAND FLASH has been ready to characteristic parameter, whether becomes high level again such as the READY pin of judging NAND FLASH, if then execution in step 307; Otherwise, continue to carry out this step.
Step 307:MCU reads all characteristic parameters at a slow speed from NAND FLASH.
In this step, MCU sends a read signal to NAND FLASH at every turn, then reads the characteristic parameter of a byte from NANDFLASH.
Step 308:MCU reconfigures the accessing operation of NAND FLASH according to the characteristic parameter of reading.
Step 309:MCU reads user program in the RAM of self inside by the accessing operation that reconfigures from NAND FLASH.
Step 310:MCU makes program pointer jump to the section start of RAM, the instruction that brings into operation and import from NANDFLASH.
So far, MCU has just successfully finished from the guiding of NAND FLASH.
The above has carried out further detailed description to purpose of the present invention, technical scheme and beneficial effect; institute is understood that; the above is not in order to restriction the present invention; within the spirit and principles in the present invention all; any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (13)
1, a kind of user program bootstrap technique is characterized in that, this method comprises:
Storage user program and unique characteristics parameter thereof in NAND FLASH, microprocessor reads described characteristic parameter from NANDFLASH, reconfigure the accessing operation of NAND FLASH according to the characteristic parameter that reads, and from NAND FLASH, read user program by the accessing operation that reconfigures and in the internal random storer, move.
2, method according to claim 1 is characterized in that, described microprocessor further comprised read characteristic parameter from NANDFLASH before: the access cycle that microprocessor access NAND FLASH is set;
Described microprocessor reads characteristic parameter and comprises from NAND FLASH:
A, microprocessor be according to writing read command to NAND FLASH the access cycle that is provided with, and write the memory address of characteristic parameter to NAND FLASH;
Whether B, microprocessor judges NAND FLASH are ready to characteristic parameter, if, then according to from NAND FLASH, reading all characteristic parameters the access cycle that is provided with; Otherwise, continue to carry out this step.
3, method according to claim 2 is characterized in that, described access cycle is more than or equal to 50ns.
4, method according to claim 2 is characterized in that, described read command is order 0;
Described microprocessor comprises to the memory address that NAND FLASH writes characteristic parameter: microprocessor writes 68 address 0 continuously to NAND FLASH.
5, method according to claim 2 is characterized in that, further comprises before the described step B:
Microprocessor judges that in the time of predetermined length whether NAND FLASH is preparing characteristic parameter, if, execution in step B then; Otherwise, confirm order, execution in step B again according to writing to NAND FLASH the access cycle that is provided with.
6, method according to claim 5 is characterized in that, whether described microprocessor judges NANDFLASH comprises at the preparation characteristic parameter: whether the READY pin of microprocessor judges NAND FLASH is low level;
Whether described microprocessor judges NAND FLASH is ready to characteristic parameter comprises: whether the READY pin of microprocessor judges NAND FLASH is high level.
7, method according to claim 5 is characterized in that, described affirmation order is 0x30.
8, method according to claim 1 is characterized in that, described characteristic parameter is stored in the zero page of NANDFLASH the 0th piece.
9, according to each described method of claim 1 to 8, it is characterized in that described characteristic parameter comprises: the physical location of the order of column address width, row address width, page capacity, read operation, the foundation of signal and retention time, data buffering time and bad block table.
According to each described method of claim 1 to 8, it is characterized in that 10, described microprocessor is miniature control module MCU.
11, a kind of user program guidance system is characterized in that, this system comprises: NAND FLASH and microprocessor, wherein,
NAND FLASH is used to store user program and unique characteristics parameter thereof;
Microprocessor, be used for reading described characteristic parameter from NAND FLASH, reconfigure the accessing operation of NAND FLASH according to the characteristic parameter that reads, and from NANDFLASH, read user program by the accessing operation that reconfigures and in the internal random storer, move.
12, system according to claim 11 is characterized in that, described characteristic parameter is stored in the zero page of NANDFLASH the 0th piece.
13, system according to claim 11 is characterized in that, described microprocessor is miniature control module MCU.
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| CN102279757A (en) * | 2010-06-11 | 2011-12-14 | 无锡中星微电子有限公司 | Method and device for starting system program |
| CN102622305A (en) * | 2012-01-19 | 2012-08-01 | 苏州希图视鼎微电子有限公司 | Method for processing width parameters of hardware access addresses in NAND flash memory |
| CN102622243A (en) * | 2012-01-19 | 2012-08-01 | 苏州希图视鼎微电子有限公司 | Method for executing solidified codes supporting various NAND flash memories |
| CN102779049A (en) * | 2011-05-09 | 2012-11-14 | 联咏科技股份有限公司 | Master chip starting method |
| CN103150184A (en) * | 2013-03-12 | 2013-06-12 | 青岛中星微电子有限公司 | Method for operating flash memory and system chip |
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| CN107894903A (en) * | 2017-12-07 | 2018-04-10 | 北京兆易创新科技股份有限公司 | The I O method and device of SPI NAND configuration file |
| CN111782290A (en) * | 2020-06-02 | 2020-10-16 | 青岛信芯微电子科技股份有限公司 | Data processing method and equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| TWI228220B (en) * | 2002-03-08 | 2005-02-21 | Samsung Electronics Co Ltd | System boot using NAND flash memory and method thereof |
| KR100678047B1 (en) * | 2004-05-06 | 2007-02-02 | 삼성전자주식회사 | Mobile communication terminal having nand flash memory and booting method thereof |
| CN100470681C (en) * | 2004-06-01 | 2009-03-18 | 深圳市朗科科技股份有限公司 | Method for implementing user program booting based on NAND flash memory |
| US7971046B2 (en) * | 2005-01-14 | 2011-06-28 | Telefonaktiebolaget L M Ericsson (Publ) | Method and device for initializing a booting procedure of a mobile device |
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2006
- 2006-12-26 CN CNB200610167187XA patent/CN100458697C/en not_active Expired - Fee Related
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| CN102279757B (en) * | 2010-06-11 | 2016-08-17 | 无锡中感微电子股份有限公司 | The method and device that a kind of system program starts |
| CN102279757A (en) * | 2010-06-11 | 2011-12-14 | 无锡中星微电子有限公司 | Method and device for starting system program |
| CN102779049B (en) * | 2011-05-09 | 2016-04-20 | 联咏科技股份有限公司 | Master chip starting-up method |
| CN102779049A (en) * | 2011-05-09 | 2012-11-14 | 联咏科技股份有限公司 | Master chip starting method |
| CN102622243A (en) * | 2012-01-19 | 2012-08-01 | 苏州希图视鼎微电子有限公司 | Method for executing solidified codes supporting various NAND flash memories |
| CN102622305A (en) * | 2012-01-19 | 2012-08-01 | 苏州希图视鼎微电子有限公司 | Method for processing width parameters of hardware access addresses in NAND flash memory |
| CN103150184A (en) * | 2013-03-12 | 2013-06-12 | 青岛中星微电子有限公司 | Method for operating flash memory and system chip |
| CN103150184B (en) * | 2013-03-12 | 2016-11-09 | 青岛中星微电子有限公司 | A kind of method and system chip that flash memory is operated |
| CN107678686A (en) * | 2017-09-19 | 2018-02-09 | 山东存储之翼电子科技有限公司 | The method and its data storage device of the FTL functions of flash memory are realized based on hardware |
| CN107678686B (en) * | 2017-09-19 | 2020-07-14 | 山东存储之翼电子科技有限公司 | Method for realizing FT L function of flash memory based on hardware and data storage device thereof |
| CN107894903A (en) * | 2017-12-07 | 2018-04-10 | 北京兆易创新科技股份有限公司 | The I O method and device of SPI NAND configuration file |
| CN107894903B (en) * | 2017-12-07 | 2021-08-03 | 北京兆易创新科技股份有限公司 | IO method and device for configuration file of SPI-NAND |
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