The AC plasma display adaptive brightness logic method of controlling wave form generation
Technical field
The present invention relates to logic control in the gas discharge technology, particularly relate to a kind of production method with AC plasma display logical control waveform of still image detection and adaption brightness control function.
Background technology
AC plasma display (AC Plasma Display Panel) utilizes gas discharge to realize that image shows in giant-screen flat pannel display field huge competitive power is arranged.At present, AC PDP generally adopts how sub-field technology to realize that the multi-grayscale of image shows, being about to a two field picture is divided into a plurality of sons and shows, different son fields have different weights, the son field of different weights can realize that by sub combination to different weights many grades gray scale of image shows corresponding to different luminance weights (corresponding in the circuit realization is the number of times of keeping discharge pulse).
In the display device that adopts sub-field technology realization multi-grayscale, can produce the image fault of so-called dynamic false contours (Dynamic False Contour).The reason that produces dynamic false contours also is the aftermath of the integrating effect of human eye on the one hand by adopting sub-field technology to cause simultaneously.
The present the whole bag of tricks that proposed reduces dynamic false contours to the influence that image shows, comprises adaption brightness control method, cuts apart the weight method that reaches, an adjustment DISPLAY ORDER method, compensated pulse method, error-diffusion method etc.Diverse ways all has its advantage and weak point.Wherein, adaption brightness control method is adjusted sub-number of fields and sub-field pulse number according to the luminance level of image itself, is reducing aspect dynamic false contours and the increase image demonstration contrast remarkable advantages is arranged.
Based on a son separation display technique, the ultimate principle of adaption brightness control is: the luminance level of some two field pictures of statistics front, to this luminance level divided rank; When statistics picture average brightness level is low, reduces the sub-number of fields order of present frame, and then can increase the led pulse sum; This moment, so dynamic false contour is not obvious, the increase of led pulse sum can also strengthen the contrast of image because average brightness level is lower.On the contrary, when statistics picture average brightness level is higher, increase the sub-number of fields order of present frame; Sub-number of fields order increases, and owing to the time of initial period, address period and erasing period in every son field is all constant, will inevitably reduce the T.T. of the phase of keeping, and then reduce total umber of pulse of keeping, and the brightness of image level of present frame is decreased.Simultaneously, the increase of sub-number of fields purpose makes weight uniform distribution of each son under the same grayscale grade, thereby dynamic false contour is effectively suppressed.
In AC PDP display device field, adaption brightness control method mainly realizes by producing the logical controlling waveform.Traditional adaption brightness control method is divided into several grades with the brightness of image complanation, and each grade is corresponding to a kind of sub-field mode, and the logical control waveform data storage of every kind of sub-field mode is in a storer; Determine the sub-field mode of current frame image by the luminance level statistics of the some two field pictures in front, select a corresponding waveform data memory then, obtain the logical controlling waveform.Like this, a plurality of storeies will inevitably take a lot of logical resources, and design or also very complicated when revising waveform.
Simultaneously, in traditional adaption brightness control method, the most significant digit of the Wave data in the waveform data memory (referring to binary number here) is set at waveform state delay sign, is the time-delay of waveform state or waveform state in order to judge this Wave data.Like this, must add more corresponding modules in the waveform address generation module judges and handles Wave data.This is also very unfavorable to design and modification logical control waveform.
In addition, in traditional adaption brightness control method, preparatory stage, address period in the son, the waveform status data of keeping phase, erasing period are storages continuously, middle not at interval; In design, if increase or reduce one or several logical control waveform status data, then the sequence number of all waveform status data in back all needs to adjust.Be unfavorable for so very much design fast and adjust logical control waveform.
In addition, there is not the still image measuring ability in traditional adaption brightness control method, if and display image is when being the long-time still image that continues, the fluorescent powder of brightness higher position (such as white portion) is owing to lighting the aging rapidly even damage that causes local fluorescent powder for a long time continuously, and this life-span for ACPDP is very unfavorable.
Summary of the invention
The objective of the invention is to propose a kind of AC PDP adaptive brightness logic method of controlling wave form generation; promptly dynamically adjust a son display mode (comprise sub-number of fields and keep umber of pulse) of next frame image according to the luminance level of the some two field pictures in front; and produce logical control waveform by the method for tabling look-up and control time-delay; added the still image measuring ability simultaneously; can be applied directly in the AC PDP control system as embedded system easily, realize having and suppress dynamic false contour and strengthen the image presentation control function of picture contrast and the defencive function of display screen.
In order to realize above purpose, the technical solution used in the present invention is:
AC PDP adaptive brightness logic method of controlling wave form generation of the present invention, this method has been introduced still image detection module 100, brightness of image statistical module 200 and drive control signal generation module 300;
100 pairs of some two field pictures of still image detection module are analyzed, and judge whether display image is still image, and give brightness of image statistical module 200 with judged result; Brightness of image statistical module 200 is at first judged the result that still image detection module 100 provides, if still image then tapers to the brightness of image level code a smaller value, and gives drive control signal generation module 300; If not still image, then the luminance level of each two field picture is added up, calculate the luminance level coding of image, and give drive control signal generation module 300; Drive control signal generation module 300 is encoded according to the luminance level of image and is produced control signal corresponding.
Wherein, the still image detection module is once added up plurality of sub area image data in the two field picture for 100 p.s.s, by calculating the related coefficient of the statistics of facing several times mutually, with the same predetermined value of this coefficient relatively, if this coefficient represents then that greater than predetermined value present image is not a still image, if this coefficient represents then that less than predetermined value present image is a still image.
Brightness of image statistical module 200 is at first judged the testing result that still image detection module 100 is brought, if present image is a still image, then current luminance level coding is added 1, reduce to keep umber of pulse with this, thereby reduce the display brightness of image, when showing still image, can play the effect of a protection like this display screen; If present image is not a still image, then carry out normal adaption brightness control, promptly some frame image datas are added up, calculate its average brightness level, and providing this luminance level corresponding codes, this coding is exported to drive control signal generation module 300.
The luminance level that drive control signal generation module 300 is brought according to brightness of image statistical module 200 encodes to determine sub-number of fields, and keeps the umber of pulse of keeping that reads current son field the umber of pulse storer 330 from the son field according to a sub-number of fields and a current sub sequence number; Logical control waveform address generating module 310 produces the address of searching of waveform state data-carrier store 340 and sub-field wave shape attitude delay memory 350 according to logical order; The data of reading from waveform state data-carrier store 340 are exactly output data, i.e. the data splitting of each control signal; The data of reading from sub-field wave shape attitude delay memory 350 are given waveform state time delay expansion judge module 320,320 pairs of these data of waveform state time delay expansion judge module are carried out the subtraction counting, when count value is zero, will allow the sign of address change to give logical control waveform address generating module 310, decide the address of searching of next moment waveform state data-carrier store 340 and sub-field wave shape attitude delay memory 350 again by logical control waveform address generating module 310; The mode of employing segmentation is stored preparatory stage, address period in the son field respectively, is kept the logical control waveform status data of phase and erasing period, and wherein the logical control waveform status data is stored in the waveform state data-carrier store 340.
The employing segmented mode is stored preparatory stage, address period in the son field respectively, is kept the logical control waveform state of phase and erasing period; Determine to keep pulse number according to the brightness statistics characteristic of some frame image signals, and then produce the logical controlling waveform by look-up table as the sub-number of fields order and the Zi Chang of last frame image signal.
This method can adopt the FP6A chip of low and middle-end to realize, only needs corresponding VHDL language program and corresponding image data procesisng program to realize.
The present invention uses considerably less logical resource to realize than complex image adaption brightness control function and still image defencive function, and has adopted sectional type, parameterized waveform state storage organization, makes control waveform flexible design, simple.Adopt the present invention for the construction cycle that shortens the design of AC PDP control waveform, effectively reducing cost of development all has positive meaning.
Description of drawings
Fig. 1 is a composition module relationship block diagram of the present invention;
Fig. 2 is a still image detection module surveyed area synoptic diagram;
Fig. 3 is the inner structure block diagram of brightness of image statistical module;
Fig. 4 is the counting module structured flowchart in the brightness of image statistical module;
Fig. 5 is the structured flowchart of drive control signal generation module;
Fig. 6 is the data store organisation synoptic diagram in the sub-field wave shape attitude data-carrier store, horizontal ordinate express time wherein, and ordinate is represented the address of storer;
Below in conjunction with accompanying drawing the present invention is described in further detail.
Embodiment
With reference to Fig. 1 and shown in Figure 5, the relation between each module has been described among the figure.100 pairs of some two field pictures of still image detection module are analyzed, and judge whether display image is still image, and give brightness of image statistical module 200 with judged result; Brightness of image statistical module 200 is at first judged the result that still image detection module 100 provides, if still image then tapers to the brightness of image level code a smaller value, and gives drive control signal generation module 300; If not still image, then the luminance level of each two field picture is added up, calculate the luminance level coding of image, and give drive control signal generation module 300; Drive control signal generation module 300 is encoded according to the luminance level of image and is produced control signal corresponding.
Wherein, as shown in Figure 2, in a two field picture, take out M * N square subregion, with the detection sampling zone of the view data in these subregions as still image detection module 100.Still image detection module 100 every t second (for example 1 second) once add up respectively the view data of this M * N sub regions, and M * N statistical value of correspondence be stored in one group of register, two groups of registers are set store the statistics of facing twice mutually.Suppose to face mutually twice statistics and be respectively { a
1, a
2..., a
mAnd { b
1, b
2..., b
m(m=M * N), twice statistics calculated its related coefficient wherein:
This related coefficient and predetermined value r are compared, if y>r, presentation video is not static but changes, and exports result ' 0 ' this moment; If y<r represents that two two field pictures are static relatively, promptly present image is a still image, exports result ' 1 ' this moment.
Brightness of image statistical module 200 every t second (for example 1 second) read the result that still image detection module 100 is sent here, if read n individual ' 1 ' continuously, represent that promptly present image is a still image, at this moment, the luminance level coding is increased to a predetermined value (for example every t adds ' 1 ' second) gradually, shows to enter the brightness protected mode; When reading result that still image detection module 100 sends here for ' 0 ' time, presentation video moves, then enter normal adaption brightness control model, promptly the luminance level of some two field pictures is added up, calculate the luminance level coding of image, and give the logical control waveform address generating module 310 in the drive control signal generation module 300.
A logical control waveform address generating module 310, this module is connected with sub-field wave shape attitude data-carrier store, be provided with preparatory stage, address period respectively, keep the start address and the end address marking signal of phase and erasing period, according to these signs, produce the control signal waveform in each stage respectively.Logical control waveform address generating module B reads sub the data of keeping in the umber of pulse storer according to brightness of image level code signal, keeps the recurrent pulses of phase thereby produce.Simultaneously, this module determines whether waveform transformation to next waveform state according to the output of waveform state time delay expansion judge module.
Umber of pulse storer 330 is kept in a son field, and the difference of storing under the various sub-field modes is kept umber of pulse, here corresponding the and brightness of image level code of sub-field mode.
A sub-field wave shape attitude data-carrier store 340, each different conditions of stored logic control waveform, the output of this storer also is the output of native system.This table is stored in different physical address sections respectively according to preparatory stage, address period, the waveform state of keeping phase and erasing period four-stage, leaves certain space between each section, uses when revising the waveform state in the future.
A waveform state delay memory 350 is stored the delay data of each different wave state, and is corresponding one by one with the data in the sub-field wave shape attitude data-carrier store.
A waveform state time delay expansion judge module 320 is judged signal according to the output generation waveform state time delay expansion of waveform state delay memory.
With reference to shown in Figure 3, the principle of key diagram image brightness statistical module 200.Comprising a picture count module Counter, four 8bit shift register Dff, a totalizer.Counting module Counter counts (generally just passable to high two countings) to all the sub-pixel step-by-steps in every frame image signal, and carries out the weighted sum computing, output 8bit count results; Four shift register Dff carry out cascade, are shifted at the falling edge of field sync signal; Totalizer ADDer carries out the arithmetic mean computing to the output of four Dff, the statistics APL that obtains; Control module Control detects the Flag as a result that the still image detection module is sent here, judges whether ' 1 ' continuous appearance, if having, then presentation video is a still image, so current APL value is increased to a predetermined value and output gradually; If there is not ' 1 ' continuous appearance, then with APL output, i.e. brightness of image level code APL_out.
With reference to shown in Figure 4, key diagram is as the principle of counting module Counter.R[7..0 among the figure], G[7..0], B[7..0] represent 8 bits of the red, green, blue three primary colours of composition diagram picture respectively, this number can characterize the gray-scale value of red, green, blue three primary colours.And for one 8 bit, its highest two can characterize 75% of its gray-scale value, so to R[7..0], G[7..0], B[7..0] high two add up the luminance level of token image substantially just, and relatively simple for structure.The resolution of supposing image is m*n, and the brightness of 1 two field picture is divided into L luminance level, and counter CountH sum counter CountL is respectively the up counter of N system and 2N system, N=m*n/L here; Respectively to R[7..0], G[7..0], B[7..0] most significant digit and time high-order ' 1 ' number count, its carry end c is as the counting input of back counter CountS.When counter CountH count down to N, its output carry end c was become ' 1 ' by ' 0 '; Counter CountS detects the carry end c of CountH when rising edge clock, then count when detecting c for ' 1 ', otherwise do not count; Because the difference of weight, CountH is a N system counter, and CountL is a 2N system counter; Totalizer ADDer just obtains the luminance level of statistical picture to the count results summation output of 6 counter CountS.
With reference to shown in Figure 5, the principle of drive control signal generation module is described.In drive control signal generation module 300, the brightness of image level code that logical control waveform address generating module 310 is brought according to brightness of image statistical module 200 is determined sub-number of fields, and keeps the umber of pulse of keeping that reads current son field the umber of pulse storer 330 from the son field according to a sub-number of fields and a current sub sequence number; Logical control waveform address generating module 310 produces the address of searching of waveform state data-carrier store 340 and sub-field wave shape attitude delay memory 350 according to certain logical order; The data of reading from waveform state data-carrier store 340 are exactly output data, i.e. the data splitting of each control signal; The data of reading from sub-field wave shape attitude delay memory 350 are given waveform state time delay expansion judge module 320,320 pairs of these data of waveform state time delay expansion judge module are carried out the subtraction counting, when count value is zero, will allow the sign of address change to give logical control waveform address generating module 310, decide the address of searching of next moment waveform state data-carrier store 340 and sub-field wave shape attitude delay memory 350 again by logical control waveform address generating module 310.
With reference to shown in Figure 6, the principle of logical control waveform address generating module is described.At first, each drive waveforms of sub is divided into four periods, is respectively preparatory stage, address period, keeps phase and erasing period.In one section continuous storage space of the control waveform data storage in each period in waveform state data-carrier store 340, and the address in each period is promptly not overlapping also non-conterminous, there is the storage space of one section reservation the centre, and certain waveform increases in period or reduces the control waveform state and different other waveform Wave data in period of revising to make things convenient for therein.Ordinate among Fig. 6 is the value of the address counter in the logical control waveform address generating module, and this address counter begins counting from the preparatory stage start address of each son field, until the preparatory stage end address; When the value of address counter equals the preparatory stage during end address, the address period start address is composed to address counter, from then on address counter continues counting in the address then, until the address period end address; When the value of address counter equals the address period end address, will keep the phase start address and compose to address counter and to subfield counter and count, from then on address counter continues counting in the address then, until the recurrent pulse start address.Owing to have periodically keeping interim, the middle pulse of keeping, only store the just passable of one-period so produce the control waveform data of recurrent pulse.Address counter, is counted keeping impulse meter when equaling the recurrent pulse end address from recurrent pulse start address counting; At this moment, if keeping the value of impulse meter equals son when beginning and keeps the current son field of reading the umber of pulse storer 330 from the son field and keep umber of pulse, then address counter continues counting, up to keeping the phase end address, counts again otherwise address counter jumps to the recurrent pulse start address.When the value of address counter equals to keep the phase during end address, address counter jumps to the erasing period start address and counts, up to the erasing period end address.When the value of address counter equals the erasing period end address, if during the sub-number of fields of this that the value of subfield counter equals that brightness of image statistical module 200 brings, then address counter keeps currency, otherwise address counter jumps back to the preparatory stage start address, continues the generation of next son field control waveform.
Be that core illustrates the whole system operation principle with logical control waveform address generating module 310 (abbreviation address generating module) below.Still image detection module 100 detects whether present image is static relatively, gives brightness of image statistical module 200 with testing result; Brightness of image statistical module 200 is added up the luminance level of the some field picture in fronts, and gives logical control waveform address generating module 310 with luminance coding, is used for controlling the display mode when the front court, comprises sub-number of fields and keeps umber of pulse; Address generating module is started working at the rising edge of field sync signal, produces initial address, and promptly the preparatory stage start address receives the luminance coding that brightness of image statistical module 200 is brought simultaneously; Order produces the control waveform address of preparatory stage then; When the preparatory stage finishes, the address jumped to the address period start address, then the order control waveform address that produces address period; Before address period finished, address generating module was kept the umber of pulse of keeping that reads this child field the umber of pulse storer according to the statistics of brightness of image statistical module 200 from the son field, as the counting initial value of being kept pulse the phase of keeping; After address period finished, address generating module jumped to the address and keeps the phase start address; Because keeping the characteristics of phase is that an irregular broad pulse is respectively arranged in front and back, middle some pulses are recurrent pulses, so waveform is divided into three sections storages; Equally, after the phase of keeping finishes, the control waveform address that produces erasing period.The control waveform data are exported by sub-field wave shape attitude data-carrier store, and wherein the time-delay length of each waveform state is then represented by corresponding value in the waveform state delay memory.Waveform state time delay expansion judge module carries out subtraction counting to this value, and when counting was 0, the output time-delay finished to judge that signal ext_end is 1, and address generating module is just to allow to produce next control waveform address at 1 o'clock at this signal only.Like this, by identical control method, as long as the data of adjusting in the storer 330,340,350 just can produce AC PDP logical control waveform desirable, that have the adaption brightness control function.