CN1670580A - 半导体芯片和利用其的显示设备 - Google Patents
半导体芯片和利用其的显示设备 Download PDFInfo
- Publication number
- CN1670580A CN1670580A CNA2005100550549A CN200510055054A CN1670580A CN 1670580 A CN1670580 A CN 1670580A CN A2005100550549 A CNA2005100550549 A CN A2005100550549A CN 200510055054 A CN200510055054 A CN 200510055054A CN 1670580 A CN1670580 A CN 1670580A
- Authority
- CN
- China
- Prior art keywords
- semi
- conductor chip
- wiring
- chip
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13454—Drivers integrated on the active matrix substrate
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0421—Structural details of the set of electrodes
- G09G2300/0426—Layout of electrodes and connections
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05553—Shape in top view being rectangular
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Optics & Photonics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims (17)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004074364 | 2004-03-16 | ||
JP2004074364A JP4228948B2 (ja) | 2004-03-16 | 2004-03-16 | 表示装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1670580A true CN1670580A (zh) | 2005-09-21 |
CN100480787C CN100480787C (zh) | 2009-04-22 |
Family
ID=34985307
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005100550549A Active CN100480787C (zh) | 2004-03-16 | 2005-03-15 | 半导体芯片和利用其的显示设备 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7251010B2 (zh) |
JP (1) | JP4228948B2 (zh) |
CN (1) | CN100480787C (zh) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101051013B1 (ko) * | 2003-12-16 | 2011-07-21 | 삼성전자주식회사 | 구동 칩 및 이를 갖는 표시장치 |
KR100632257B1 (ko) * | 2004-11-09 | 2006-10-11 | 삼성전자주식회사 | 액정 디스플레이 구동용 탭 패키지의 배선 패턴 구조 |
KR100736395B1 (ko) * | 2005-07-07 | 2007-07-09 | 삼성전자주식회사 | 액정 표시 장치의 드라이버 ic 및 이를 위한 패드 배치방법 |
JP4708148B2 (ja) | 2005-10-07 | 2011-06-22 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
KR100987479B1 (ko) * | 2005-12-19 | 2010-10-13 | 삼성전자주식회사 | 반도체 칩 및 이를 이용한 반도체 칩 패키지 |
KR100765261B1 (ko) * | 2006-07-11 | 2007-10-09 | 삼성전자주식회사 | 표시장치 |
KR100755975B1 (ko) * | 2006-08-23 | 2007-09-06 | 삼성전자주식회사 | 휴대 단말기의 정보 표시방법 |
JP5291917B2 (ja) * | 2007-11-09 | 2013-09-18 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP4585564B2 (ja) * | 2007-12-13 | 2010-11-24 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
KR101783953B1 (ko) * | 2010-12-27 | 2017-10-11 | 삼성디스플레이 주식회사 | 표시 장치 및 그 검사 방법 |
KR101879831B1 (ko) * | 2012-03-21 | 2018-07-20 | 삼성디스플레이 주식회사 | 플렉시블 표시 장치, 유기 발광 표시 장치 및 플렉시블 표시 장치용 원장 기판 |
WO2014013945A1 (ja) * | 2012-07-20 | 2014-01-23 | シャープ株式会社 | 表示装置 |
JP2015070086A (ja) * | 2013-09-27 | 2015-04-13 | シナプティクス・ディスプレイ・デバイス株式会社 | 集積回路モジュール及び表示モジュール |
CN104637409B (zh) * | 2014-12-26 | 2017-08-15 | 小米科技有限责任公司 | 窄边框及配置有窄边框的显示器 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3235617B2 (ja) | 1990-04-24 | 2001-12-04 | セイコーエプソン株式会社 | 半導体チップの実装体とそれを用いた表示装置 |
JP3235613B2 (ja) | 1990-04-24 | 2001-12-04 | セイコーエプソン株式会社 | 半導体チップの実装体とそれを用いた表示装置 |
WO1996021948A1 (fr) * | 1995-01-13 | 1996-07-18 | Seiko Epson Corporation | Dispositif semi-conducteur, support de bande et panneau d'affichage |
JP3405657B2 (ja) * | 1996-11-29 | 2003-05-12 | シャープ株式会社 | テープキャリアパッケージ及びそれを使った表示装置 |
JP3570165B2 (ja) | 1997-07-11 | 2004-09-29 | カシオ計算機株式会社 | 表示装置 |
JP4401461B2 (ja) | 1999-01-20 | 2010-01-20 | 三菱電機株式会社 | 液晶表示装置及びその製造方法 |
US6587177B2 (en) * | 2000-02-02 | 2003-07-01 | Casio Computer Co., Ltd. | Connection structure of display device with a plurality of IC chips mounted thereon and wiring board |
JP3648596B2 (ja) | 2000-10-17 | 2005-05-18 | カシオ計算機株式会社 | 半導体チップの接合構造およびその構造を備えた表示装置 |
JP2002366051A (ja) * | 2001-06-08 | 2002-12-20 | Sanyo Electric Co Ltd | 集積回路チップ及びこれを用いた表示装置 |
JP2003100982A (ja) | 2001-09-21 | 2003-04-04 | Matsushita Electric Ind Co Ltd | 半導体チップの実装構造及びその構造を使用した液晶表示装置 |
-
2004
- 2004-03-16 JP JP2004074364A patent/JP4228948B2/ja not_active Expired - Lifetime
-
2005
- 2005-03-11 US US11/077,031 patent/US7251010B2/en active Active
- 2005-03-15 CN CNB2005100550549A patent/CN100480787C/zh active Active
Also Published As
Publication number | Publication date |
---|---|
JP4228948B2 (ja) | 2009-02-25 |
JP2005268281A (ja) | 2005-09-29 |
US20050205888A1 (en) | 2005-09-22 |
US7251010B2 (en) | 2007-07-31 |
CN100480787C (zh) | 2009-04-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: JINZHEN CO., LTD. Free format text: FORMER OWNER: NEC CORP. Effective date: 20130423 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20130423 Address after: Samoa Apia hiSoft Center No. 217 mailbox Patentee after: Jinzhen Co.,Ltd. Address before: Tokyo, Japan Patentee before: NEC Corp. |
|
TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20230518 Address after: Floor 4, No. 15, Lane 168, Xingshan Road, Neihu District, Taipei City, Taiwan, China, 114762, China Patentee after: HANNSTAR DISPLAY Corp. Address before: Samoa Apia, hiSoft center, No. 217 mailbox Patentee before: Jinzhen Co.,Ltd. |