LED core and manufacture method thereof
Technical field
The invention belongs to technical field of semiconductors, particularly relate to a kind of LED core and manufacture method thereof.
Background technology
Figure 1 shows that a traditional LED core, this tube core has substrate 1a, the first resilient coating 2a, n type semiconductor layer 3a, active layer 4a, p type semiconductor layer 5a, N utmost point electrode 6a and P utmost point electrode 7a.The luminous component of light-emitting diode (also being LED, i.e. Light Emitting Diode) tube core is arranged on the active layer (Active Layer) between n type semiconductor layer and the p type semiconductor layer.Non-equilibrium minority carrier and majority carrier compound tense when injecting active layer will discharge the form of unnecessary energy with luminous energy with the form of radiation photon.It is only nondirectional that but active layer sends, and promptly to all directions identical emission probability arranged.General semi-conducting material and surrounding air or encapsulating material comparatively speaking have higher refraction coefficient (refraction coefficient n=2.2~3.8 of typical semi-conducting material).Therefore part light will be in emitting surface generation total reflection, and has the part total reflection light to continue to reflect in light-emitting diode, and the form that is converted to heat energy by crystal and other material absorbs, and this phenomenon can be described as the total reflection loss; Have part light to spill from other direction that is different from emitting surface in addition, this phenomenon can be described as and spills loss.Because total reflection is lost and spilt loss, the light that produces in the mobile layer of light-emitting diode can all not send from emitting surface, has reduced luminous efficiency (Luminous Efficiency); And the problem of also having brought luminous diode temperature to increase when light is by the absorbed in the diode has increased the difficulty that improves lumination of light emitting diode efficient.
Spilling of LED core lost and the total reflection loss in order to reduce in the prior art, a kind of method is between substrate and active layer Bragg reflecting layer to be set, the advantage of Bragg reflecting layer is the reflectivity height, but because it is necessary for the multiple stratification structure, and generally all be 10~20 layers structure, caused its complex manufacturing technology, cost is higher.Another kind method is on the die surfaces of the opposite side relative with surface of emission light LED core, the layer of metal reflector is set, this metallic reflector also can reduce and spills loss and total reflection is lost, but poor effect, because active layer sends shines metallic reflector and reflexed to the light of emitting surface by metallic reflector, experience the process that is absorbed by die material for twice.The patent application of this respect has: Chinese patent application 02146423.5 discloses a kind of manufacture method and light-emitting device thereof of white light emitting diode, this white light emitting diode is provided with a metallic reflector at base plate bottom, this application has also proposed to have the structure of resonant cavity, thereby can make luminous colourity better and increase luminous efficiency.
Semiconductor photoelectric device technology mainly comprises technologies such as extension, photoetching, etching, sputter, alloy, deposit dielectric film and optical coating.
Semiconductor deposits on the substrate that lattice constant is mated substantially with crystal habit or the process of growing is called epitaxial growth.It is different with common optical coating, the atom of deposition can be in the growing surface auto arrangement neat and with below the substrate atoms bonding, be the direct continuity of single crystalline substrate atomic arrangement.Main epitaxy method has molecular beam epitaxy (MBE), metal-organic chemical vapor deposition equipment extension (MOCVD) and liquid phase epitaxy types such as (LPE).What grow up the earliest is liquid phase epitaxial technique, it utilizes supersaturated solution to separate out crystallization to carry out material growth, too fast because of its speed of growth, difficult control of material component and adjustment are replaced by metal-organic chemical vapor deposition equipment epitaxy method and molecular beam epitaxial method gradually; The metal-organic chemical vapor deposition equipment epitaxy method utilizes the chemical reaction of metallo-organic compound gas and corresponding alkanes gas to carry out extension, the precision of control growing thickness reaches 1 micron, exactly because the appearance of metal-organic chemical vapor deposition equipment epitaxy method, just make multiple quantum trap (Multi-Quantum Well, MQW) technical applicationization, and be widely used on the products such as semiconductor laser; Molecular beam epitaxial method is by molecular beam scanning carrying out epitaxial growth, compare with metal-organic chemical vapor deposition equipment epitaxy method technology, growth rate is slow, but thickness and component that can more accurate control epitaxial loayer, so the metal-organic chemical vapor deposition equipment epitaxy technology more is used for producing, molecular beam epitaxy technique then more is used for scientific research.
Photoetching process is that the geometric figure that designs is transferred to the technical process that the skim material to the illumination sensitivity (also being photoresist, photoresist) of semiconductor wafer surface gets on.
Etching is the technical process of going on the thin layers of semiconductor material of the figure transfer on the photoresist below photoresist.The etching technics of semi-conducting material mainly is divided into two kinds of wet etching and dry method.Wet etching uses liquid chemical reagent to corrode, and damage for a short time, but to environment sensitivity relatively, machining accuracy is low; Dry etching uses the chemical reagent of gaseous state under the acting in conjunction of microwave and plasma semi-conducting material to be carried out etching, major technology ion etching technology (RIE) and plasma microwave coupling lithographic technique (ICP) two kinds that respond, the advantage of dry etching is the control precision height, the large tracts of land etching homogeneity is good, utilizes all right etching perpendicularity of plasma microwave coupling lithographic technique and all extraordinary minute surface of fineness; In the actual processing, often two kinds of lithographic methods are used.
Also comprise technologies such as sputter, alloy, deposit dielectric film and optical coating in the semiconductor photoelectric device technology, these technologies are also extremely important.The major function of sputter and alloy is to make good metal to contact with semiconductor; The deposit dielectric film also can be described as mask layer, is mainly used to do the zone of etch mask and the injection of control device electric current, and common insulating material is Si0
2And Si
3N
4, use the method deposit of plasma enhanced chemical vapor deposition technology (PECVD), the advantage of this method is the rete densification, refractive index and thickness can be controlled finely; Optically coated function is the photoelectric characteristic of trim, is one of main critical technological point in the making of semiconductor optical amplifier and super-radiance light emitting diode.
Aspect the electrode of making light-emitting diode, Chinese patent application 03120597.6 discloses a kind of manufacture method of gallium nitride based light emitting diode tube core, prepares the N electrode at substrate back.Chinese patent application 03106434.5 discloses a kind of manufacture method of gallium nitride based light emitting diode N type ohm contact electrode, method with dry etching or wet etching on the epitaxial structure that with the sapphire is the gallium nitride based light emitting diode on the substrate obtains an etched hole up to N type contact layer, again preparation N type electrode on the N type layer that is exposed.
Summary of the invention
Thereby the purpose of this invention is to provide and a kind ofly can the time reduce LED core and the manufacture method thereof that spills loss and total reflection loss raising luminous efficiency preferably in work.
Total technical conceive of the present invention is: special metallic mirror layer is set in LED core, when work, can come the active layer of orienting reflex LED core to be emitted to the light of mirror layer by this mirror layer, spill loss and total reflection loss with minimizing, thereby improve the luminous efficiency of light-emitting diode.
Realize providing a kind of technical scheme of LED core to be in the object of the invention: this LED core has substrate, first resilient coating, n type semiconductor layer, active layer, p type semiconductor layer, N utmost point electrode and P utmost point electrode; First resilient coating is arranged on the substrate, and active layer is arranged on the n type semiconductor layer, and p type semiconductor layer is arranged on the active layer, and N utmost point electrode is positioned on the n type semiconductor layer, and P utmost point electrode is positioned on the p type semiconductor layer; It is characterized in that: also have the mirror layer and second resilient coating; Mirror layer is arranged on first resilient coating, and mirror layer is by the metallic substrate layer with microwell array and be deposited on the surface of metallic substrate layer and the metallic reflector in the micropore of microwell array is formed; Second resilient coating is arranged between mirror layer and the n type semiconductor layer.
Above-mentioned second resilient coating is the composite construction layer of semiconductor monolayer or multiple quantum trap layer or semiconductor monolayer and multiple quantum trap layer, and second resilient coating is the transition zone of growth n type semiconductor layer.
The composite construction layer and the multiple quantum trap layer of the intrinsic gallium nitride layer that above-mentioned second resilient coating is a single layer structure or the intrinsic gallium nitride layer of single layer structure and multiple quantum trap layer are arranged on the intrinsic gallium nitride layer.
Above-mentioned substrate is sapphire, carborundum or silicon; First resilient coating is the intrinsic gallium nitride, and the thickness of first resilient coating is 1.0 μ m~2.0 μ m; N type semiconductor layer is the n type gallium nitride layer, and p type semiconductor layer is a P type gallium nitride layer, and active layer is the active layer of InGaN/GaN multiple quantum trap.
The metal of the metallic substrate layer of above-mentioned mirror layer is silver or copper, and the thickness of metallic substrate layer is 1.5 μ m~3 μ m; The metal of the metallic reflector of mirror layer is silver or aluminium, and the thickness of metallic reflector is 0.05 μ m~0.08 μ m; Micropore in the microwell array of metallic substrate layer is evenly arranged, and staggers between row and the row; The shape of each micropore is all identical in the microwell array, is circle or regular polygon.
Spacing between the adjacent micropore in the microwell array of above-mentioned metallic substrate layer is 2.8 μ m~3 μ m; The aperture of each micropore is 1.3 μ m~2.6 μ m, and the degree of depth of each micropore is 0.8 μ m~1.2 μ m.
The technical scheme that realizes the manufacture method that a kind of LED core is provided in the object of the invention has following steps: 1. adopt metal-organic chemical vapor deposition equipment extension or molecular beam epitaxial method to generate first resilient coating on substrate; 2. on first resilient coating, adopt metal-organic chemical vapor deposition equipment extension or molecular beam epitaxial method plated metal dielectric layer; 3. using plasma strengthens chemical gaseous phase depositing process deposition one deck silicon nitride or silicon dioxide or silicon as mask layer on metallic dielectric layer; 4. the method that adopts method that photoetching combines with wet etching or photoetching to combine with dry etching generates microwell array and makes metallic dielectric layer become metallic substrate layer at metallic dielectric layer; Use corrosive agent flush away mask layer then; 5. adopt metal-organic chemical vapor deposition equipment extension or molecular beam epitaxial method on the microwell array of metallic substrate layer the plated metal thin layer forming metallic reflector, thereby form mirror layer by metallic substrate layer and metallic reflector; 6. adopt metal-organic chemical vapor deposition equipment extension or molecular beam epitaxial method to generate second resilient coating on mirror layer, second resilient coating is the composite construction layer of semiconductor monolayer or multiple quantum trap layer or semiconductor monolayer and multiple quantum trap layer; 7. on second resilient coating successively extension generate n type semiconductor layer, active layer and p type semiconductor layer; 8. adopt the method for sputter on p type semiconductor layer, to generate P utmost point electrode, adopt the method for etching and sputter on n type semiconductor layer, to generate N utmost point electrode, thereby obtain light-emitting diode chip for backlight unit; 9. along the cutting apart of light-emitting diode chip for backlight unit that designs chip is divided into singulated dies with patterning method or scribing method.
The 1. middle substrate of above-mentioned steps is sapphire, carborundum or silicon, and first resilient coating of deposition is the intrinsic gallium nitride layer, and the thickness of intrinsic gallium nitride layer is 1.0 μ m~2.0 μ m; The step 2. metallic dielectric layer of middle deposition is the thin metal layer of silver or copper; The step 5. metallic reflector of middle deposition is the thin metal layer of silver or aluminium; Step 6. second resilient coating of middle growth is the intrinsic gallium nitride layer or the multiple quantum trap layer of single layer structure; The n type semiconductor layer that 7. step generates is the n type gallium nitride layer, and p type semiconductor layer is a P type gallium nitride layer, and active layer is the active layer of InGaN/GaN multiple quantum trap.
Above-mentioned steps 2. in, the thickness of metallic substrate layer is 1.5 μ m~3 μ m.
In the above-mentioned steps etching process 4., the micropore in the microwell array of generation evenly is arranged in the metallic dielectric layer, and staggers between row and the row; The shape of each micropore is identical, is circle or regular polygon, and the spacing between the adjacent micropore is 2.8 μ m~3 μ m; The aperture of each micropore is 1.3 μ m~2.6 μ m, and the degree of depth of each micropore is 0.8 μ m~1.2 μ m.Step 5. in, the thickness of metallic reflector is 0.5 μ m~0.8 μ m.
The present invention has positive effect: what be used for reflecting light in (1) LED core of the present invention is mirror layer, preferred aluminium of metal or silver that metallic reflector wherein adopts, in theory, the aluminum metal reflector of surface smoothing to wavelength at 400nm to the average reflectance of the light between the 800nm greater than 90%, the silver metal reflector of surface smoothing to wavelength at 400nm to the average reflectance of the light between the 20000nm then greater than 95%, so the mirror layer among the present invention has good reflecting effect.(2) have microwell array in the metallic substrate layer of the mirror layer in the LED core of the present invention, the thin metal layer that deposits in this micropore be positioned at the lip-deep thin metal layer of metallic substrate layer and connect into an integral body, form a continuous metallic reflector; This metallic reflector with shrinkage pool shape orienting reflex active layer preferably is emitted to the light of mirror layer, and that can effectively reduce light in the LED core spills loss and total reflection loss, the luminous efficiency of raising light-emitting diode.(3) manufacturing process of the mirror layer in the LED core of the present invention is compared with the manufacturing process of Bragg reflecting layer, and its manufacturing process is comparatively simple thereby manufacturing cost is lower; The light-emitting diode that adopts LED core of the present invention in use, it spills loss and the total reflection loss is less than the light-emitting diode that smooth metallic reflector is set bottom substrate.
Description of drawings
Fig. 1 is a kind of structural representation of traditional LED core.
Fig. 2 is the structural representation of the LED core of embodiment 1.
Fig. 3 is the structural representation of mirror layer among Fig. 2.
Fig. 4 is the schematic diagram of microwell array on the metallic substrate layer among Fig. 3.
Fig. 5 is the position view of mask layer among the embodiment 2.
Fig. 6 is the structural representation of another kind of LED core.
Fig. 7 is the relative light intensity with light-emitting diode of Fig. 6 structure a---wavelength graph.
Fig. 8 is the relative light intensity with light-emitting diode of Fig. 2 structure a---wavelength graph.
Embodiment
(embodiment 1, LED core)
See Fig. 2 to Fig. 4, the LED core of present embodiment have substrate 1, first resilient coating 2, mirror layer 3,, second resilient coating 4, n type semiconductor layer 51, active layer 52, p type semiconductor layer 53, N utmost point electrode 6 and P utmost point electrode 7.Mirror layer 3 is by the metallic substrate layer 31 with microwell array and be deposited on the surface of metallic substrate layer 31 and the metallic reflector 32 among the micropore 31-1 of microwell array is formed.First resilient coating 2 is arranged on the substrate 1, mirror layer 3 is arranged on first resilient coating 2, second resilient coating 4 is arranged on the mirror layer 3, n type semiconductor layer 51 is arranged on second resilient coating 4, active layer 52 is arranged on the n type semiconductor layer 51, p type semiconductor layer 53 is arranged on the active layer 52, and N utmost point electrode 6 is positioned on the n type semiconductor layer 51, and P utmost point electrode 7 is positioned on the p type semiconductor layer 53.
Second resilient coating 4 is the intrinsic gallium nitride layer of single layer structure, and second resilient coating 4 is the transition zone of growth n type semiconductor layer 51.
The substrate 1 of present embodiment is sapphire, carborundum or silicon; First resilient coating 2 is the intrinsic gallium nitride, and the thickness of first resilient coating 2 is 1.1 μ m, and the thickness of second resilient coating 4 is 1.0 μ m; N type semiconductor layer 51 is the n type gallium nitride layer, and p type semiconductor layer 53 is a P type gallium nitride layer, and active layer 52 is the active layer of InGaN/GaN multiple quantum trap.
The metal of the metallic substrate layer 31 of mirror layer 3 is silver or copper, and the thickness of metallic substrate layer 31 is 1.5 μ m.The metal of the metallic reflector 32 of mirror layer 3 is silver or aluminium, and the thickness of metallic reflector 32 is 0.08 μ m; Micropore 31-1 in the microwell array of metallic substrate layer 31 evenly arranges, and staggers between row and the row; The shape of each micropore 31-1 is all identical in the microwell array, is circle.Spacing between the adjacent micropore 31-1 in the micropore 31-1 array of metallic substrate layer 31 is 2.8 μ m~3 μ m; The aperture of each micropore is (when micropore is shaped as regular polygon, be the external diameter of a circle of regular polygon, regular polygon herein can be square, regular pentagon or regular hexagon) be 1.3 μ m~2.6 μ m, the degree of depth of each micropore is 0.8 μ m~1.2 μ m.
(method of embodiment 2, manufacturing LED core)
See Fig. 2 to Fig. 5, the manufacture method of the LED core of embodiment 1 has following steps:
1. adopt the metal-organic chemical vapor deposition equipment epitaxy method on substrate 1, to generate first resilient coating 2; In metal-organic chemical vapor deposition equipment epitaxial system (U.S. GS3200 of EMCORE company type), with sapphire as substrate 1, with homemade high-purity TMGa and NH
3As source material, with H
2As the gas that carries in MO (being metallo-organic compound, down together) source, with high-purity N
2As the adjustments of gas of vitellarium, growth one deck gallium nitride (GaN) crystal is as first resilient coating 2 on Sapphire Substrate 1; The relative growth technological parameter: growth temperature is 560 ℃, NH
3Adding speed is 3.1L/min; It is 20 μ mol/min that TMGa adds speed; N
2Adding speed is 3.8L/min; H
2Adding speed is 2.1L/min; Growth time is 2min; Obtain first resilient coating 2 of the gallium nitride of thick 1.1 μ m at last.
2. on first resilient coating 2, adopt metal-organic chemical vapor deposition equipment epitaxial deposition metallic dielectric layer 30; In metal-organic chemical vapor deposition equipment epitaxial system (U.S. GS3200 of EMCORE company type), with Cu-TMOD as source material, with H
2As the gas that carries in MO source, with high-purity CO
2As the adjustments of gas of vitellarium, growing metal dielectric layer 30 on resilient coating 2; The related process parameter: growth temperature is 380 ℃, CO
2Adding speed is 2.8L/min; It is 65 μ mol/min that Cu-TMOD adds speed; H
2Adding speed is 2.1L/min; Growth time is 10min; Obtain the copper metallic dielectric layer 30 of thick 1.5 μ m at last.
3. using plasma strengthens chemical gaseous phase depositing process deposition one deck silicon nitride or silicon dioxide or silicon as mask layer 33 on metallic dielectric layer 30; In plasma reinforced chemical vapor deposition system (PECVD1000C of Britain CEVP company), deposited silicon nitride is as mask layer 33 on metallic dielectric layer 30; Sedimentary condition: radio-frequency power is 80W; Depositing temperature is 280 ℃; The adding speed of He is 50sccm (ml/min, 20 ℃ of normal temperatures are under 1 standard atmosphere condition); SiH
4Adding speed be 1sccm; NH
3Adding speed be 30sccm; Sedimentation time is 20min; Obtain the silicon nitride mask layer 33 of thick 0.025 μ m at last.
4. the method that adopts method that photoetching combines with wet etching or photoetching to combine with dry etching generates microwell arrays and makes metallic dielectric layer 30 become metallic substrate layer 31 at metallic dielectric layer 30; Use corrosive agent flush away mask layer 33 then; Coating thickness is the photoresist (model is Shipley 6112) of 0.8 μ m on mask layer 33, adopts the single face contact to aim at photolithographicallpatterned at etching system (the German Karl Suss MA6 of company) then and carve evenly distributed array of circular apertures figure through exposure, development on photoresist layer; Then in ion etching system (the French Alcatel Nextral of company 100), with SF
6And O
2As etching gas, etching micropore 31-1 on silicon nitride mask layer 33; The technological parameter of etching: chamber pressure is 1.0Pa; Radio-frequency power is 500W; Bias voltage is 80V; SF
6Adding speed is 50cm
3/ s; O
2Adding speed is 80cm
3/ s; Etch rate is 5nm/min; Etch period is 20min; After the microwell array etching is good, then peel off residual part photoresist, use the residual part silicon nitride mask 33 of KOH corrosive liquid flush away again, obtain having the metallic substrate layer 31 of microwell array with acetone.Micropore 31-1 in the microwell array evenly is arranged in the metallic substrate layer 31, and staggers between row and the row; Micropore 31-1 is circular, and the spacing between the adjacent micropore 31-1 is 2.8 μ m; The aperture of each micropore 31-1 is 1.3 μ m, and the degree of depth of each micropore 31-1 is 0.8 μ m.
5. adopt metal-organic chemical vapor deposition equipment extension or molecular beam epitaxial method on the microwell array of metallic substrate layer 31 the plated metal thin layer forming metallic reflector 32, thereby form mirror layer 3 by metallic substrate layer 31 and metallic reflector 32; In metal-organic chemical vapor deposition equipment epitaxial system (U.S. GS3200 of EMCORE company type), with Ag-TMOD as source material, with H
2As the gas that carries in MO source, with high-purity CO
2As the adjustments of gas of vitellarium, plated metal silver is to form metallic reflector 32 on the microwell array of metallic substrate layer 31; Deposition process parameters: depositing temperature is 320 ℃, CO
2Adding speed is 3.2L/min, H
2Adding speed is 2.5L/min, and it is 25 μ mol/min that Ag-TMOD adds speed, and growth time is 10min, and obtaining thickness at last is the silver metal reflector 32 of 0.08 μ m, thereby makes metallic substrate layer 31 and metallic reflector 32 form mirror layer 3.
6. on mirror layer 3, adopt metal-organic chemical vapor deposition equipment extension or molecular beam epitaxial method to generate the gallium nitride of individual layer of thick 1.0 μ m as second resilient coating 4.
7. on second resilient coating 4, adopt metal-organic chemical vapor deposition equipment extension or the molecular beam epitaxial method active layer 52 and the P type gallium nitride semiconductor layers 53 of extension generation n type gallium nitride semiconductor layer 51, InGaN/GaN multiple quantum trap successively.
8. adopt the method for sputter on p type semiconductor layer 53, to generate P utmost point electrode 7, on P utmost point electrode layer, adopt metal-organic chemical vapor deposition equipment extension or molecular beam epitaxial method to generate mask layer then, then adopt etching method to remove mask layer, p type semiconductor layer 53, active layer 52 and the n type semiconductor layer 51 of part, n type semiconductor layer 51 is come out, then on the part n type semiconductor layer 51 that comes out, adopt the method for sputter on n type semiconductor layer 51, to generate N utmost point electrode 6, thereby obtain light-emitting diode chip for backlight unit.
9. along the cutting apart of light-emitting diode chip for backlight unit that designs chip is divided into singulated dies with patterning method or scribing method.
(embodiment 3, LED core)
All the other are identical with embodiment 1, and difference is: the thickness of first resilient coating 2 is 1.2 μ m; Second resilient coating 4 is the multiple quantum trap layer, and its thickness is 1.5 μ m; The thickness of metallic substrate layer 31 is 2.2 μ m.The degree of depth of the circular micropore of microwell array is 1.0 μ m, and diameter is 2.6 μ m, and the spacing between the adjacent micropore 31-1 is 3 μ m.
(method of embodiment 4, manufacturing LED core)
Present embodiment is the manufacture method of the LED core of embodiment 3, and all the other are identical with embodiment 2, and difference is: step 1. in, growth temperature is 545 ℃, NH
3Adding speed be 2.9L/min, N
2Adding speed be 3.9L/min; The thickness of the gallium nitride resilient coating 2 that obtains at last is 1.2 μ m.Step 2. in, growth temperature is 390 ℃, CO
2Adding speed be 2.9L/min; The thickness of the metallic dielectric layer 30 that obtains at last is 2.2 μ m.Step 3. in, depositing temperature is 270 ℃.Step 4. in, the diameter of controlling circular micropore 31-1 is 2.6 μ m, the degree of depth of micropore 31-1 is 1.2 μ m, the spacing between the adjacent micropore 31-1 is 3 μ m.Step 5. in, growth temperature is 300 ℃, CO
2Adding speed is 3.0L/min; Step 6. in, adopting metal-organic chemical vapor deposition equipment extension or molecular beam epitaxial method to generate second resilient coating, 4, the second resilient coatings 4 on mirror layer 3 is the multiple quantum trap layer.
(embodiment 5, LED core)
All the other are identical with embodiment 1, and difference is: second resilient coating 4 is the composite construction layer of gallium nitride semiconductor individual layer and InGaN/GaN multiple quantum trap layer; The gallium nitride semiconductor individual layer is positioned at the below, and the multiple quantum trap layer is positioned at the top.
(method of embodiment 6, manufacturing LED core)
Present embodiment is the manufacture method of the LED core of embodiment 5, all the other are identical with embodiment 2, difference is: step 6. in, on mirror layer 3, adopt metal-organic chemical vapor deposition equipment extension or molecular beam epitaxial method method to generate second resilient coating 4, second resilient coating 4 is the composite construction layer of gallium nitride semiconductor individual layer and InGaN/GaN multiple quantum trap layer, and InGaN/GaN multiple quantum trap layer generates on gallium nitride semiconductor layers.
(test example 1)
Figure 6 shows that a kind of tube core structure of traditional light-emitting diode, this light-emitting diode is compared with the light-emitting diode with embodiment 4 tube core structures, and difference only is to lack mirror layer.
Light-emitting diode with LED core shown in Figure 6 is tested, and device therefor is the full spectrum photoelectric color of LED comprehensive performance testing system (a Taiwan Yi Jia scientific ﹠ technical corporation), and test voltage is 3.3V, and measuring current is 20mA; Obtain relative light intensity shown in Figure 7---wavelength graph.Light-emitting diode to LED core structure with embodiment 4 is tested, and testing equipment and condition are identical with the said equipment and condition, obtain relative light intensity shown in Figure 8---wavelength graph.
Can learn light-emitting diode from Fig. 7 and Fig. 8 with structure of the present invention, its luminous intensity obviously increases, thereby has proved that LED core of the present invention can reduce the luminous efficiency that spills loss and total reflection loss raising light-emitting diode preferably when work.