CN1638070A - Airtight packaging method for planar carrier cavity in microelectronic circuit - Google Patents

Airtight packaging method for planar carrier cavity in microelectronic circuit Download PDF

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Publication number
CN1638070A
CN1638070A CNA2004100654647A CN200410065464A CN1638070A CN 1638070 A CN1638070 A CN 1638070A CN A2004100654647 A CNA2004100654647 A CN A2004100654647A CN 200410065464 A CN200410065464 A CN 200410065464A CN 1638070 A CN1638070 A CN 1638070A
Authority
CN
China
Prior art keywords
packaging method
microelectronic circuit
airtight packaging
planar carrier
scolder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2004100654647A
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Chinese (zh)
Inventor
黄飞明
李宗亚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meixin Semiconductor Wuxi Co Ltd
Original Assignee
Meixin Semiconductor Wuxi Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meixin Semiconductor Wuxi Co Ltd filed Critical Meixin Semiconductor Wuxi Co Ltd
Priority to CNA2004100654647A priority Critical patent/CN1638070A/en
Publication of CN1638070A publication Critical patent/CN1638070A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

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  • Ceramic Products (AREA)

Abstract

The present invention relates to packaging technology of microelectronic circuit, sensor, etc., and is especially cavity type airtight packaging method. According to the design scheme of the present invention, the airtight packaging process includes the following steps: mounting and bonding chip on planar carrier; aligning tube cap to the unit; and sealing the tube cap with the base board in specific atmosphere. The said planar carrier may be single-layered or multiple-layered ceramic board, silicon, glass or polymer; and the appearance may be unit or matrix of combined unit. The present invention has low cost, and is suitable for automatic operation for high production efficiency and product quality.

Description

The airtight packaging method for planar carrier cavity of microelectronic circuit
Technical field
The present invention relates to the encapsulation technology of microelectronic circuit and transducer etc., specifically relate to a kind of cavity type airtight packaging method.
Background technology
The microelectronic circuit principal mode of air-tight packaging has at present: a kind of is cavity type shell and plane cover plate; Another kind is convex base and pipe cap.Base material mainly comprises pottery, metal (alloy) and glass etc.Cover plate or pipe cap comprise following several typical process with welding between the base: parallel soldering and sealing, flange electric resistance welding, solder and low temperature glass sealing etc.
The deficiency of tradition air-tight packaging is: 1 shell cost height could form the air-tightness stereochemical structure because need multi-layer ceramics or multicomponent material to burn altogether; 2 production efficiencys are low, because shell is single, thereby automaticity is low.
Summary of the invention
The object of the present invention is to provide the airtight packaging method for planar carrier cavity of the microelectronic circuit of a kind of low cost, high efficiency.
Another object of the present invention is to provide a kind of pipe cap that is used for packaged chip.Atmosphere in the cavity can be vacuum, also can be the stable gas under the specified pressure.
Another object of the present invention is to provide a kind of plane chip carrier of direct packaged chip, can improve the encapsulation rate of finished products.
According to design provided by the present invention, this method may further comprise the steps:
A, carry out on flat carrier that chip is installed and bonding;
B, pipe cap is shelved on certain unit of flat carrier and aims at;
C, under particular atmosphere, pipe cap and base board unit are sealed.
Described in the present invention flat carrier can be the single or multiple lift ceramic substrate, also can be silicon, glass or other polymer.With regard to its external form, can be the individual unit that branch splits, also can be conjuncted matrix form unit combination;
Described in the present invention pipe cap can be metal/alloy or nonmetallic materials such as pottery etc.;
Described in the present invention sealing, its welding procedure can be the electric resistance weldings of forms such as parallel seam welding; It also can be the sealing by fusing welding procedure that adopts scolder.Wherein scolder can be welded in the pipe cap lower edge in advance, also can be with the scolder ring directly with pipe cap and base plate seals together.
Described in the present invention particular atmosphere both can be a vacuum, also can be the specific gas under the certain pressure.
In the present invention, because chip carrier is to be made of the plane formula substrate, structural cavities is directly to be formed by pipe cap in addition, has therefore greatly reduced production cost.Interconnect with matrix form owing to each unit again, thus be easy to full automatic working, thus improved production efficiency and rate of finished products.
Description of drawings
Fig. 1 is the schematic diagram that carries out Chip Packaging according to the present invention.
Wherein 1 is the chip that will encapsulate, and 2 is load glue, and 3 is bonding wire, and 4 is pipe cap, and 5 are the sealing cap scolder, and 6 is the leading foot on the chip carrier, and 7 is chip carrier such as ceramic substrate.
Embodiment
Method of the present invention is used in the microelectronic circuit packages process, uses the direct packaging technology of chip (CHIP ON BOARD) to carry out chip load and bonding, promptly by bonding or flip chip technology with chips welding on ceramic substrate, carry out pipe cap soldering and sealing moulding at last.
This schematic diagram has reflected the process of air-tight packaging, comprising:
The chip load: at first utilize load glue 2 that chip 1 is bonded on the ceramic substrate 7, heating makes its curing again;
Effect: chip 1 is fixed on carrier---ceramic substrate 7;
Bonding: adopt bonding wire that the I/O port on the chip 1 is connected with leading foot 6 on the ceramic substrate 7;
Effect: finish chip and carrier---being electrically connected between the ceramic substrate 7;
Sealing cap: shelve---will aim at and fix with the ceramic substrate 7 that has welded with the pipe cap 4 of scolder 5 in advance by specific clamping apparatus; Scolder 5 comprises the sealing of multi-element metal scolder scolders such as slicker solder, golden tin---the circuit that will shelve is sent into processings of heating in the high temperature furnace of certain atmosphere, thus the sealing of 7 of realization pipe cap 4 and ceramic substrates.This atmosphere can be inert gases such as vacuum or N2; Effect: protection chip and bonding line, and form the seal chamber of certain atmosphere of isolating with external environment.
By method of the present invention, can realize air-tightness cavity type microelectronic circuit packages cheaply.

Claims (9)

1, the airtight packaging method for planar carrier cavity of microelectronic circuit is characterized in that,
A, carry out on flat carrier that chip is installed and bonding;
B, pipe cap is shelved on certain unit of flat carrier and aims at;
C, under particular atmosphere, pipe cap and base board unit are sealed.
2, the airtight packaging method for planar carrier cavity of microelectronic circuit according to claim 1 is characterized in that, flat carrier is single or multiple lift ceramic substrate or silicon or glass or other polymer.Its shape is the individual unit that branch splits, or conjuncted matrix form unit combination.
3, the airtight packaging method for planar carrier cavity of microelectronic circuit according to claim 1 is characterized in that, pipe cap is made by metal or nonmetallic materials.
4, the airtight packaging method for planar carrier cavity of microelectronic circuit according to claim 1 is characterized in that, the welding procedure during sealing is the electric resistance welding of parallel seam welding; Or the sealing by fusing welding procedure of employing scolder; Wherein scolder is welded in the pipe cap lower edge in advance, or with the scolder ring directly with pipe cap and base plate seals together.
5, the airtight packaging method for planar carrier cavity of microelectronic circuit according to claim 1 is characterized in that, particular atmosphere comprises the stable gas under vacuum or the certain pressure.
6, the airtight packaging method for planar carrier cavity of microelectronic circuit according to claim 1 is characterized in that, when mounted, at first utilizes load glue (2) that chip (1) is bonded on the ceramic substrate (7), and heating makes its curing again;
7, the airtight packaging method for planar carrier cavity of microelectronic circuit according to claim 1 is characterized in that, when bonding: adopt bonding wire that the I/O port on the chip (1) is connected with leading foot (6) on the ceramic substrate (7);
8, the airtight packaging method for planar carrier cavity of microelectronic circuit according to claim 1, it is characterized in that, when sealing, advanced luggage frame: the pipe cap (4) that will have scolder (5) by specific clamping apparatus is in advance aimed at and is fixed with the ceramic substrate that has welded (7); Scolder wherein (5) comprises slicker solder, golden tin multi-element metal scolder; Carry out scolder sealing again: the circuit that will shelve is sent into processings of heating in the high temperature furnace of certain atmosphere, thus the sealing between realization pipe cap (4) and ceramic substrate (7).
9, the airtight packaging method for planar carrier cavity of microelectronic circuit according to claim 5 is characterized in that, stable gas is inert gas.
CNA2004100654647A 2004-12-01 2004-12-01 Airtight packaging method for planar carrier cavity in microelectronic circuit Pending CN1638070A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNA2004100654647A CN1638070A (en) 2004-12-01 2004-12-01 Airtight packaging method for planar carrier cavity in microelectronic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNA2004100654647A CN1638070A (en) 2004-12-01 2004-12-01 Airtight packaging method for planar carrier cavity in microelectronic circuit

Publications (1)

Publication Number Publication Date
CN1638070A true CN1638070A (en) 2005-07-13

Family

ID=34846490

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2004100654647A Pending CN1638070A (en) 2004-12-01 2004-12-01 Airtight packaging method for planar carrier cavity in microelectronic circuit

Country Status (1)

Country Link
CN (1) CN1638070A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101958252B (en) * 2009-07-21 2012-07-04 深迪半导体(上海)有限公司 Cavity type air-tight packaging method of planar carrier of microminiature microelectronic circuit
CN103021973A (en) * 2012-12-12 2013-04-03 中国电子科技集团公司第五十八研究所 Airtightness packaging radiating structure of integrated circuit
CN103633036A (en) * 2013-08-07 2014-03-12 中国科学院电子学研究所 Electric field sensor packaging element based on high-resistance material
CN105870777A (en) * 2016-05-17 2016-08-17 广东汉瑞通信科技有限公司 Cap presealing device and method of semiconductor laser
CN108098094A (en) * 2017-12-13 2018-06-01 中国电子科技集团公司第二十九研究所 A kind of self-adapting combined welding fixture and application method
CN112802643A (en) * 2020-07-31 2021-05-14 北京七一八友晟电子有限公司 Sealed precision chip type fixed resistor and manufacturing method thereof
CN114260533A (en) * 2021-11-30 2022-04-01 中国电子科技集团公司第五十五研究所 Method for air sealing cover of cavity type pipe cap millimeter wave module

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101958252B (en) * 2009-07-21 2012-07-04 深迪半导体(上海)有限公司 Cavity type air-tight packaging method of planar carrier of microminiature microelectronic circuit
CN103021973A (en) * 2012-12-12 2013-04-03 中国电子科技集团公司第五十八研究所 Airtightness packaging radiating structure of integrated circuit
CN103633036A (en) * 2013-08-07 2014-03-12 中国科学院电子学研究所 Electric field sensor packaging element based on high-resistance material
WO2015018310A1 (en) * 2013-08-07 2015-02-12 中国科学院电子学研究所 High-resistivity material-based packaging element for electric field sensor
CN103633036B (en) * 2013-08-07 2017-03-08 中国科学院电子学研究所 Electric-field sensor potted element based on highly resistant material
US10514406B2 (en) 2013-08-07 2019-12-24 Institute Of Electronics, Chinese Academy Of Sciences High resistivity material-based packaging element for electric field sensor
CN105870777A (en) * 2016-05-17 2016-08-17 广东汉瑞通信科技有限公司 Cap presealing device and method of semiconductor laser
CN108098094A (en) * 2017-12-13 2018-06-01 中国电子科技集团公司第二十九研究所 A kind of self-adapting combined welding fixture and application method
CN108098094B (en) * 2017-12-13 2020-04-21 中国电子科技集团公司第二十九研究所 Self-adaptive combined welding fixture and use method
CN112802643A (en) * 2020-07-31 2021-05-14 北京七一八友晟电子有限公司 Sealed precision chip type fixed resistor and manufacturing method thereof
CN114260533A (en) * 2021-11-30 2022-04-01 中国电子科技集团公司第五十五研究所 Method for air sealing cover of cavity type pipe cap millimeter wave module

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