CN1637973A - 陶瓷上的薄膜电容器 - Google Patents

陶瓷上的薄膜电容器 Download PDF

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CN1637973A
CN1637973A CNA2004100116540A CN200410011654A CN1637973A CN 1637973 A CN1637973 A CN 1637973A CN A2004100116540 A CNA2004100116540 A CN A2004100116540A CN 200410011654 A CN200410011654 A CN 200410011654A CN 1637973 A CN1637973 A CN 1637973A
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dielectric layer
conductive layer
capacitor
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W·J·宝兰德
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EIDP Inc
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EI Du Pont de Nemours and Co
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Abstract

在陶瓷基材上形成的薄膜电容器，它具有高电容密度和其他需要的电性质和物理性质。该电容器的介电层在高温下进行了热处理。

Description

陶瓷上的薄膜电容器
技术领域
本发明涉及薄膜电容器，具体涉及在陶瓷基材上形成的薄膜电容器。
背景技术
随着集成电路(IC)的工作频率越来越高，伴有电感和寄生电容的电力线与接地线中的噪音成为越来越严重的问题。噪音问题要求采用额外的去耦合电容器，用以向IC提供稳定的信号。更高的工作频率与更低的工作电压结合起来还要求对IC的电压响应时间要更快，允许的电压变化(波动)要更小。例如，当微处理器开始计算时就需要电力。如果电压供应的响应时间太慢，微处理器将经受超出允许电压波动的电压下降或功率下降，IC就会不正常工作。此外，随着IC动力消耗增加，响应时间慢会导致功率突增。功率下降和功率突增可通过采用电容器来控制，电容器能在适当响应时间内提供动力或吸收动力。
用于去耦合和缓冲功率下降或突增的电容器一般放置在尽可能靠近IC的位置，以改善其性能。常规设计是将电容器表面安装在印刷线路板(PWB)上，且集结在IC周围。在这样的结构中，大量电容器需要复杂的电路，会产生电感。随着频率增加和工作电压的持续下降，功率增加，并且必须在不断降低电感量的同时提供更高的电容。在PWB的背面(直接在IC下面)放置电容器可一定程度降低电感。然而，IC尺寸，速度、电压、功率和包装方面的趋势，意味着常规方法最终将不能在要求的电感和响应时间内充分提供电容。
Chakravorty等人的U.S.6,477,034揭示了一种电容器，具有其中的导电路径，在至少两个导电路径之间提供电容，该电容器包含：基材层；设置在基材层上的第一导电层，第一导电层的第一部分有第一电极区；第二导电层，第二导电层的一部分形成第二电极区；设置在第一和第二导电层之间的介电层，其中，在第一电极区和第二电极区之间形成电容区，在基材层上提供至少两个导电路径，以便电容器的两个相背的面之间有导电路径。
因此，本发明的目的是提供电容器及其制造方法，所述电容器具有要求的电性质和物理性质如低电感和响应时间。
发明概述
根据第一实施方式，制造电容器的方法包括提供具有第一导电层的陶瓷基材。在第一导电层上形成一层介电薄膜，形成上介电层的步骤是在第一导电层上形成介电层并在至少800℃将上介电层热处理。在上介电层上形成第二导电层，结果由第一导电层，介电层和第二导电层形成电容器。
按照上述方法构成的电容器一般具有高的电容密度和其他要求的电性能和物理性能。电容器可以例如安装在印刷线路板上和集成电路基材上，可用来形成集成电路包和集成无源器件。本领域技术人员在看了附图并阅读下面关于实施方式详细描述后，能理解本发明上述优点以及各种其他实施方式的其他优点和好处。
根据一般做法，下面讨论的附图的各个部分不一定按比例绘出。附图中各部分和元件的尺寸可以有意放大或缩小，为的是更清楚地说明本发明的实施方式。
附图简述
图1所示是制造第一实施方式电容器的方法的流程框图；
图2A-2C显示按照图1方法制造电容器的步骤；
图3A是在由图2所示电容器形成的多个电容器的图3B的3A-3A线截取的剖面图；
图3B是图3A所示多个电容器的顶视图。
图3C是具有多个连接到器件D的图3A和3B所示电容器的芯片包的正视图。
详细描述
现在描述在陶瓷和玻璃陶瓷基材上形成薄膜电容器的方法。所述电容器适合用于例如，插件(interposer)，集成无源器件，和用于其他用途。“插件”是指包含安装在印刷线路板上的电容器或其他无源元件的小基材。有一个或多个电容器的插件提供了电容，用来去耦合和/或控制模装在插件上的集成电路的电压。
在此说明书中讨论的插件实施方式可包括高电容密度的一些电容器。“高电容密度”一般是指电容密度至少为1微法拉/厘米2。为此说明书目的，陶瓷和玻璃-陶瓷基材一般称作“陶瓷基材”。
本发明实施方式的陶瓷基材上高电容的电容器具有要求的电性质和物理性质。一个要求的电性质是低的电感，因为电容器可直间置于IC下面。从而对电路的要求最小，明显减少回线电感。陶瓷电容器实施方式一个要求的物理性质是膨胀温度系数(TCE)的值，在有机印刷线路板的值(约17×10-6/℃)和集成电路的值(约4×10-6/℃)之间。这一性质使IC和印刷线路板之间的应力下降，提高了长期可靠性。此外，电容器的膨胀温度系数可以不同，取决于使用的陶瓷基材，要接近硅的膨胀温度系数或有机以色列顶部膨胀温度系数。
图1所示是本发明适合在陶瓷基材上制造电容器的方法的流程框图。
图2A-2C显示制造电容器的步骤。在下面将讨论的图1方法是在陶瓷基材上形成一单个电容器。然而，使用图1和2A-2C所示的方法，可以以批量模式形成数个电容器。
试看图1和2A，在步骤S110中，将一个具有光滑表面12的薄膜基材10，进行清洁，除去对电容器性能有不利影响的有机杂质或其他杂质。如果基材10的表面12粗糙，需将表面光滑化或抛光，确保均匀和平整，以便在其上形成薄膜电极和介电层，光滑化或抛光作为清洁过程的一部分。代替抛光的另一种平面化方法是，具有粗糙表面的基材，在形成第一导电电极层之前，在基材10的表面12上涂布一层或多层介电前体溶液然后进行热处理。
基材10的膨胀温度系数要与将在其上沉积的BaTiO3基介电层的膨胀温度系数相近。这种基材的例子包括氧化镁(MgO)、氧化铝(Al2O3)、钛酸钡(BaTiO3)、钛酸锶(SrTiO3)、铝酸镁(MgAl2O4)、氧化钇稳定的氧化锆(ZrO2)或玻璃陶瓷基材，例如使采用贵金属或贱金属进行金属化的任何商业低温共煅烧陶瓷基材，或使用钨或钼进行金属化的任何商业高温共煅烧陶瓷物系。使用这样的基材可确保介电薄膜从热处理过程冷却时不会经受高应力。高应力是不好的，因为它会在介电薄膜中引起碎裂。
步骤S120中，在陶瓷基材10上形成第一导电层20。第一导电层20用来形成最终电容器的第一电极。第一导电层20可覆盖全部基材或基材10的一部分。第一导电层20可以是贵金属如铂，或贱金属组合物如铜，可通过沉积方法如溅射或蒸发形成。当通过溅射或蒸发沉积第一导电层20时，可以在沉积金属层20之前在基材10上沉积一薄层的粘性增强材料(厚度在约20)。钛是粘性增强材料的一个例子。第一导电层20还可以通过印刷金属糊组合物厚膜或有机金属材料来形成。如果使用共煅烧的陶瓷基材10，第一电极作为基材的一部分已经存在，步骤S120就可以省去。
步骤S130中，在第一导电层20上形成介电前体层30。前体层30将形成最终电容器的介电层，可通过在第一导电层20上施加前体溶液来形成。前体溶液可包含形成钛酸钡(BaTiO3)晶体薄膜层的前体化学物质，可采用化学溶液沉积(CSD)技术形成前体层30。采用CSD技术是因为它简便且成本低。用来形成未掺杂(即“纯”)BaTiO3介电层的化学溶液可含有乙酸钡和异丙醇钛。可使用化学物质如乙酰丙酮、乙酸和甲醇，溶解前体组分并使前体溶液稳定。
在BaTiO3前体溶液中可加入掺杂剂阳离子，以改善其介电特性。例如可加入过渡金属阳离子。可以加入氧化物化学计量式为MO2的过渡金属阳离子，使BaTiO3的三相转变温度彼此接近，使制得的电容器的温度依赖性较为和缓，其中M是过渡金属阳离子(如，Zr、Hf、Sn、Ce)。可加入氧化物化学计量式为MO的金属阳离子，使介电居里点转移到较低温度，其中M是碱土金属(如Ca、Sr、Mg)。这样的MO和MO2掺杂剂对提高制成电容器的温度稳定性有用。可加入氧化物化学计量式为R2O3的稀土阳离子，为的是在化学上补偿前体层30在低氧分压热处理期间发生的氧损失，其中R是稀土阳离子(如Y、Ho、Dy、La、Eu)。还可以加入有多个优选价态的过渡金属如Mn，因为它们有化学上补偿氧损失的能力。这样的掺杂剂对使用贱金属电极如铜的电容器保持高绝缘电阻特别有用。
掺杂剂或其混合物以约为0-30摩尔％前体溶液浓度使用。各种掺杂剂和混合物的具体组合取决于所要求的介电性质、传输性质以及制成的介电层的温度依赖性的组合。
可使用下列化合物提供掺杂前体组合物中的阳离子：
Mn：乙酸锰四水合物
Y：乙酸钇水合物
Zr：丙醇锆
Ca：乙酸钙水合物
Sr：乙酸锶水合物
Ho：乙酸钬水合物
Dy：乙酸镝水合物
Hf：氯化铪
Fe：乙酸铁
Mg：乙酸镁四水合物。步骤S140中，将前体层30干燥除去溶剂。如果需要较厚的前体层30，重复步骤S130和S140，直到达到要求的前体层厚度。试看图1，在步骤S150中，将制成的制品热处理。在至少800℃进行热处理，此热处理过程除去残余的有机物，然后，使经干燥的介电前体层30致密化和结晶出来。试看图2B，由热处理过程得到介电层35和第一电极25。产生的介电层35的厚度在约0.2-2.0微米范围。制成的制品然后在步骤S160冷却之。
当使用贵金属如铂形成第一电极25时，可在高温空气炉内进行热处理。当使用贱金属如铜形成第一电极25时，可以在低氧分压的气氛中进行热处理。由相稳定图选择对热处理温度和金属合适的低氧分压，可避免贱金属层20的氧化。例如，如果使用铜电极，并在约900℃热处理，氧分压应小于10-8大气压。
在铜第一电极25的情况，低氧分压热处理不会使铜氧化为Cu2O或CuO。然而，降低氧分压并结合高的热处理温度如至少800℃，可产生氧空穴浓度较高的介电层35，致使介电层的绝缘电阻较低。介电层35因此需要aleovalent阳离子掺杂和再氧化过程。掺杂剂能补偿在低氧分压热处理期间产生的氧损失，再氧化过程以后产生具有优良绝缘电阻的介电层35。这样的掺杂剂例如有Mn、Y、Ho和Dy。
再氧化可对应于在低温和高氧分压下的短时间热处理，不能充分明显氧化第一电极25。例如，这样的再氧化可以在10-5大气压和10-2大气压之间的氧分压下于500℃进行几分钟。再氧化可以和高温热处理的冷却步骤S160合为一个步骤进行，或以分开的一个步骤进行。如果使用贵金属形成第一导电层或底部导电层20，该再氧化步骤并不是必须的，介电前体层可以在空气中热处理。
试看图2C，在步骤S170(图1)中，在产生的介电层35上形成第二电极即顶部电极40。第二电极即顶部电极40可通过例如溅射、蒸发、燃烧蒸气沉积、无电电镀、印刷或其他合适的沉积方法形成，并随后电镀至特定厚度，以获得要求的电性质。电容器100通过加入顶部电极40形成。
图3A和3B所示为多个电容器110、120、130，它们由步骤S170(图1)制成的制品形成。试看图2c与图3A和3B，电容器100的第二即顶部电极40可进行光蚀刻形成各个顶部电极41、42、43，从而形成电容器110、120、130。还可以采用光蚀刻步骤形成接地引线片150、160，电线连接片155、165、175，以及接地电线连接片185。电线连接片155、165、175用来连接到各个顶部电极41、42和43。
图3C是芯片包1000的正视图。芯片包1000包含图3A和3B的制品，它们通过粘结剂层1020安装在印刷线路板1010上。电容器110、120、130连接到器件d上。电容器110、120、130的电极41、42、43可用所谓的“C4”(可控皱缩芯片连接)技术连接到各动力引线200、210、220上。器件D的接地引线340、350同样连接到接地引线片150，160，再通过在电线连接片185形成的通孔250连接到第一即部电极25，因此完成向器件d提供电力的低电感线路。基材10上的电容器110、120、130形成一插件。
器件D可以是例如一个集成电路。一个或多个集成电路可连接到在陶瓷基材表面上的电容器110、120、130。还可以采用其他连接方法，如模连接、明焊芯片以及电线连接技术。
在上面的实施方式中，为说明目的，描述了少量的电容器、电线连接片、接地引线片和其他元件。然而，任何数量的这些元件可加入到向器件提供电力的结构中，或用于其他用途。
上面所示的这些电容器110、120、130可使用例如粘结剂连接到印刷线路板、集成电路和包装上。图3C的实施方式中，电线连接技术是将电容器110、120、130电连接到印刷线路板(PWB)的基材1010上。还可以采用其他结构和电连接到PWB基材的方法，包括使用通过陶瓷基材10的通孔，将电极和接地片连接到印刷线路板基材1010上。可以使用在排列成互连构形区域的粘结剂或焊剂进行这种连接。
顶部电极110、120、130和各种片还可以通过阻影掩模溅射、丝网印刷或其他技术形成，提供直接图案化的顶部电极结构。
如果需要，进行步骤S110至S170，并多次重复步骤S120至S170，可制造多层电容器。在每一过程中形成一个个电容器。需要多个电容器，是因为在一给定的伸出基材区域可达到总电容增加。
在上述薄膜电容器插件结构的顶部可加上另外的线路。例如，通过低温处理，如旋涂和固化，或通过印刷和固化聚合物介电材料如聚酰亚胺或环氧基材料，加上另外的低介电系数层。这些介电材料可以进行金属化，并采用封装工业的标准方法形成线路图案。
本发明薄膜电容器插件实施方式，通过在薄膜电容器顶部添加其他无源部件包括电感器、电阻器或其他电容器，可进一步制成集成无源器件。采用蚀刻或本领域已知的其他形成图案的技术，由顶表面金属化能容易地形成电感器。电阻器可采用本领域已知的许多技术形成，包括电阻金属的溅射、电镀、丝网印刷和固化或煅烧，以及其他工作。通过这些结构的组合可以形成许多集成无源器件。采用已知的方法如明焊芯片和电线连接，这些集成无源器件可组装或安装在集成电路包或印刷线路板上。
术语“薄膜”一般指厚度小于2微米的层。上述实施方式的电容密度超过1微法拉/厘米2。
本发明前面描述的内容说明了本发明。此外，所述内容仅描述了本发明优选的实施方式，但是应当理解，本发明能够采用各种其他组合、修改及环境，能够在此所示的本发明范围内，与上面揭示的内容相称和/或在相关领域的技术或知识范围内，进行变动或修改。

Claims (20)

1.在基材上制造一个或多个薄膜电容器的方法，包括：
提供一个陶瓷基材，其上面具有第一导电层的；
在第一导电层上形成介电层，形成介电层包括下面步骤：
在第一导电层上形成介电层；在至少800℃进行热处理；
在介电层上形成第二导电层，
第一导电层，介电层和第二导电层形成一个电容器。
2.如权利要求1所述的方法，其特征在于提供基材的步骤包括：
在基材上形成第一导电层。
3.如权利要求1所述的方法，其特征在于热处理产生包含结晶钛酸钡的介电层。
4.如权利要求1所述的方法，其特征在于第一导电层是至少一种选自下列的金属：镍、铜、锰、钼和钨。
5.如权利要求1所述的方法，其特征在于热处理步骤包括：
在800-1050℃范围进行热处理。
6.如权利要求5所述的方法，其特征在于热处理步骤包括：
在小于10-6大气压的氧分压的气氛中进行热处理。
7.如权利要求1所述的方法，其特征在于热处理步骤包括：
在氮气气氛中进行热处理。
8.如权利要求1所述的方法，其特征在于形成介电层的步骤包括：
提供一种介电前体溶液；
将介电前体溶液施加在第一导电层上。
9.如权利要求1所述的方法，其特征在于形成介电层的步骤包括：
对热处理产生的介电层进行再氧化。
10.如权利要求9所述的方法，其特征在于对介电层再氧化的步骤包括：
在450-600℃和10-2至10-5大气压的氧分压下对介电层进行再氧化。
11.如权利要求1所述的方法，其特征在于形成介电层的步骤包括：
形成掺杂的介电层。
12.如权利要求1所述的方法，其特征在于形成介电层的步骤包括：
形成厚约0.2-2.0微米的介电层。
13.如权利要求1所述的方法，其特征在于，
第一导电层是至少一种选自下列的金属：铂、钯、金和银；
在空气中进行800-1050℃热处理。
14.如权利要求1所述的方法，其特征在于形成第二导电层的步骤包括：
在介电层上溅射一层导电层；
用导电材料电镀该导电层。
15.如权利要求1所述的方法，其特征在于提供基材步骤包括：
提供至少一种选自下列的材料作为基材：氧化镁、氧化铝、玻璃-陶瓷、氧化锆、铝酸镁、钛酸锶和钛酸钡。
16.如权利要求1所述的方法，其特征在于，所述方法还包括：
由第二电极层形成多个电极，从而形成多个电容器。
17.一个或多个采用权利要求1所述方法制成的电容器，安装在印刷线路板上。
18.一个或多个采用权利要求1所述方法制成的电容器，安装在集成电路基材上。
19.集成电路包，包含一个或多个权利要求1所述方法制成的电容器。
20.集成无源器件，包含一个或多个权利要求1所述方法制成的电容器。
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JP2005210090A (ja) 2005-08-04
KR20050069913A (ko) 2005-07-05
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EP1551041B1 (en) 2007-03-07

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