CN1617453A - Built in self detector and method for analogue / digital converter - Google Patents
Built in self detector and method for analogue / digital converter Download PDFInfo
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- CN1617453A CN1617453A CN 200310114299 CN200310114299A CN1617453A CN 1617453 A CN1617453 A CN 1617453A CN 200310114299 CN200310114299 CN 200310114299 CN 200310114299 A CN200310114299 A CN 200310114299A CN 1617453 A CN1617453 A CN 1617453A
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Abstract
This invention discloses a built-in self test device and a method of an analog digital converter, among which, said device includes a digit analog converter, a low pass filter, a statistic patterm analyzer and a software engine. Said converter is for generating a first signal, said filter is used in smoothing said first signal to provide it to an analog digital converter to sample the smoothed first signal, among which, level of said second signal is greater or equal to the level of the first signal and frequency of the second signal is the multiple of that of the first signal. Said analyzer is connected to the output of said analog digital converter. The engine is linked to the output of the analyser to display property of the converter.
Description
Technical field
(Built In Self-Test, BIST) device and method is particularly about a kind of built-in self-test device and method that is applied to analog-digital converter (ADC) to the invention relates to a kind of built-in self-test.
Background technology
Along with the high integration development of integrated circuits, increasing circuit is in the system on a slice that is integrated into (SoC).The mixed signal circuit of many digital analog converters (DAC), analog-digital converter and combination simulation and digital function has been applied to as radio communication, data conversion system and satellite communication aspect.In recent years, foregoing circuit has developed and the built-in self-test technology, directly carries out the test of self hardware by built-in circuit, to save cost and to shorten the testing time.
The built-in self-test of traditional analog-digital converter is a nonlinear problem common when utilizing control circuit to produce random sample (pattern) with solution simulation and digital signal conversion.Yet,, often must adopt control circuit to produce random sample than multidigit for obtaining higher resolution.Therefore, utilize the mode that produces random sample to limit the extensive use of the built-in self-test device of analog-digital converter, and will increase the cost of computer hardware.
Summary of the invention
Main purpose of the present invention provides a kind of built-in self-test device and method of analog-digital converter, it is to utilize a digital analog converter than low speed and low resolution to cooperate this analog-digital converter to carry out linearisation and compensation, thereby can reduce the high-level hsrdware requirements of existing built-in self-test device, and then reduce cost.
For achieving the above object, the present invention discloses a kind of built-in self-test device of analog-digital converter, and it comprises a digital analog converter, a low pass filter, a statistics figure analyzer and a software engine.This digital analog converter is to be used to produce first signal.This low pass filter is to be used for this first signal smoothingization, first signal after utilizing a secondary signal at this smoothing for an analog-digital converter is taken a sample, wherein the figure place of this secondary signal is more than or equal to the figure place of first signal, and the frequency of this secondary signal is the multiple of the frequency of this first signal.The purpose of this sampling is to be used for defining the pairing voltage range of respectively encoding.This statistical chart analyzer is the output that is electrically connected to this analog-digital converter, is used for adding up each number of times of encoding and occurring of output signal of this analog-digital converter.This software engine is electrically connected to the output of this statistical chart analyzer, is used to show the characteristic of this analog-digital converter.
With regard to the step of carrying out, the built-in self-test method of analog-digital converter of the present invention can be summarized as follows: at first utilize a digital analog converter to produce one first signal and carry out smoothing; Secondly, first signal after utilizing a secondary signal at smoothing is taken a sample, with the coding that defines an analog-digital converter corresponding relation with voltage range, wherein the figure place of this secondary signal is more than or equal to the figure place of first signal, and the frequency of this secondary signal is the multiple of the frequency of this first signal.Afterwards, produce the statistical chart of this analog-digital converter output, and utilize the data pin of this statistical chart that the error that is caused between this analog-digital converter and the digital analog converter is compensated, to obtain respectively to encode pairing correct magnitude of voltage.At last, calculate the static parameter and the dynamic parameter of this analog-digital converter respectively.
Above-mentioned mistake compensation is that the mode of utilizing a software simulation algorithm to make voltage trim is carried out.If will encode as abscissa, voltage as ordinate, when the area statistics characteristic under the coding-voltage curve of the area statistics characteristic of coding-voltage curve under this voltage of pairing first signal of a voltage and the pairing secondary signal of this voltage equated, this voltage was the pairing correct magnitude of voltage of coding.
Description of drawings
The present invention will illustrate according to accompanying drawing, wherein:
Fig. 1 is the built-in self-test schematic representation of apparatus of analog-digital converter of the present invention;
Fig. 2 shows the voltage range of built-in self-test device of analog-digital converter of the present invention and the adquisitiones of corresponding coding thereof;
Fig. 3 (a) and 3 (b) show the distributed wave of statistical chart analyzer;
Fig. 4 is the combination schematic diagram of software engine of the present invention;
Fig. 5 shows the operation principles of compensation arrangement of the present invention;
Fig. 6 shows a test result of the built-in self-test device of analog-digital converter of the present invention;
Fig. 7 (a) shows that to 7 (c) waveform synthesizer of the present invention is converted to statistical chart the flow chart of time domain waveform.
Component symbol explanation among the figure:
| The built-in self-test device of 10 analog-digital converters | 101 analog-digital converters |
| 102 control units | 103 counters |
| 104 digital simulations are changeed slow device | 105 low pass filters |
| 106 first multiplexers | The built-in self-test device of 107 digital analog converters |
| 108 second multiplexers | 109 |
| 11 chips | 110 |
| 12 | |
| 41 | 42 static parameter |
| 43 | 44 dynamic parameter analytical equipments |
| The a dotted line | The b solid line |
| C, m, n, k curve | The d plotted point |
| H, i, j area |
Embodiment
The built-in self-test device 10 of Fig. 1 example analog-digital converter of the present invention, it is the selftest that is used for an analog-digital converter 101.With regard to the composition of the built-in self-test device 10 of this analog-digital converter, be broadly divided into hardware area and software area, it mainly is made of a chip 11 and a software engine 12 respectively.This chip 11 comprises built-in self-test device 107, one second multiplexer 108, a statistics figure analyzer 109, an internal memory 110 of this analog-digital converter 101, a control unit 102, a counter 103, a digital analog converter 104, a low pass filter 105, one first multiplexer 106, a digital analog converter.This first multiplexer 106 is to be used for selective reception by this digital analog converter 104 outputs and an analog signal or an external analog input signal after these low pass filter 105 smoothings, and its output connects this analog-digital converter 101.In actual manufacturing, this low pass filter 105 can be integrated in this digital analog converter 104 to simplify circuit.This counter 103 is the enumeration datas that are used to provide this digital analog converter 104 required.With 4 signals is example, and the signal that this counter 103 is sent will be successively from " 0000 ", " 0001 " ..., get back to " 0000 " more successively to " 1111 ".The output of this digital analog converter 104 is except connecting this low pass filter 105, other connects the built-in self-test device 107 of this digital analog converter, can proofread and correct guaranteeing the circuit normal operation, and whether the analog signal that can test after digital analog converter 104 conversions has abnormal error to produce in advance.This control unit 102 connects the built-in self-test device 107 of this counter 103, digital analog converter 104, first multiplexer 106 and digital analog converter, in order to control the action of each element.The input of this second multiplexer 108 connects the built-in self-test device 107 of this analog-digital converter 101 and digital analog converter, and its output then is connected to this statistical chart analyzer 109, as the selection and the transmission of signal therebetween.After being temporary in this internal memory 110, the data of being sent by this statistical chart analyzer 109 deliver to this software engine 12 to carry out follow-up analytical work.Because of this digital analog converter 104 in the present embodiment is to utilize the built-in self-test device 107 of a digital analog converter to proofread and correct and test, so this software engine 12 need have both the function of analyzing this digital analog converter 104 and analog-digital converter 101 characteristics simultaneously.
The built-in self-test device 107 of first multiplexer 106 of Fig. 1, second multiplexer 108, internal memory 110, control unit 102, counter 103, digital analog converter is not the necessary element of the built-in self-test device 10 of this analog-digital converter, yet if added in design, can be better on the effect.
The method of Fig. 2 example one regional linearisation (local linear stimulus) is used to illustrate the principle of the conversion of signals of 101 of this digital analog converter 104 and analog-digital converters.Suppose that one first signal that this digital analog converter 104 is exported is that 4 and frequency are f, a represents by dotted line.These analog-digital converter 101 6 of outputs and frequency are the secondary signal of 4f, and b represents by solid line.In other words, this first signal is low speed and low resolution compared to secondary signal.This low pass filter 105 can be with (a) the smoothing and form curve c of dotted line of this first signal.This solid line b and curve c will intersect at several plotted points d, promptly similarly be taken a sample with the frequency of 4f first signal (curve c) after at smoothing by this analog-digital converter 101, to obtain the corresponding relation of voltage range and coding.Afterwards, find out the interval under the voltage of external analog input signal, and corresponding its coding, be the output of this analog-digital converter 101.
The linearizing method of above-mentioned zone is to adopt the compound mode of so-called Ad-hoc, at first whole coding range is defined the absolute voltage value of coding on a large scale, cause regional linearisation through interval smoothing again, take a sample with the analog-digital converter that cooperates very fast frequency, obtain the interval of each its corresponding voltage of encoding.Thus, can utilize the less signal source of resolution to break through the problem that produces high-resolution universe linearity test signal.
In sum, the figure place of the signal of this digital analog converter 104 must be smaller or equal to the figure place of the signal of analog-digital converter 101, and its frequency need have the relation of multiple, is the characteristic of low speed and low resolution to meet this digital analog converter 104 compared to analog-digital converter 101.
This statistical chart analyzer 109 is that a statistical chart is added up and produced to number of times that each coding occurs, and wherein the number of times that occurs as abscissa, each coding of each coding is as ordinate.For a digital output signal that does not have too big error, its waveform that is shown in this statistical chart analyzer 109 will be very average, shown in Fig. 3 (a).If the waveform shock range that this statistical chart analyzer 109 demonstrates is very big, represent the digital output signal of this analog-digital converter 101 to have, shown in Fig. 3 (b) than mistake.
Fig. 4 is the combination schematic diagram of software engine 12 of the present invention, and it roughly comprises a compensation arrangement 41, a static parameter analytical equipment 42, a waveform synthesizer 43 and a dynamic parameter analytical equipment 44.This compensation arrangement 41 is to establish for remedying the error that this digital analog converter 104 and analog-digital converter 101 produced to each other.This static parameter analytical equipment 42 is that the output result according to this compensation arrangement 41 calculates known DNL and INL parameter, and wherein this DNL is a differential nonlinearity, is used for reflecting that this statistical chart respectively adds up the poor of intercolumniation, and INL then is the summation of DNL.This waveform synthesizer 43 is the trigonometric ratio statistical charts (trigonometric histogram) that earlier the output statistical chart of this compensation arrangement 41 are converted to probability territory (probability domain), mode with fixing sampling is converted into time domain waveform again, is used to eliminate known technology must be imported a sine wave in addition when carrying out dynamic analysis shortcoming.This dynamic parameter analytical equipment 44 is to utilize time domain waveform that this waveform synthesizer 43 formed as input, does not therefore need additionally to add a sine wave again, and it can be used for calculating known parameters such as signal to noise ratio (snr).The function mode of each device will details are as follows in this software engine 12.
Fig. 5 is the operation principle that is used to illustrate above-mentioned compensation arrangement 41.If be ordinate with voltage, be encoded to abscissa, and left and right curve m and k represent the correlation curve of secondary signal and first voltage of signals-coding respectively.With 4 signals is example, factor word signal be encoded to 0 to 15, and analog signal always has 16 voltage ranges, so curve k originally needs adjust according to proportional error between the two.Just curve k need multiply by
To get a curve n.Above-mentioned correction ratio can be according to general formula
Try to achieve, wherein n is a figure place.With regard to statistical significance, the area h under this curve m represents the number of all statistics posts.The oblique line area j of curve n under each coding section is the number of the statistics post of each coding.For instance, calculate quantization level and be 5 corresponding voltage, can suppose earlier to equal analog-digital converter output quantization step less than all statistics post numbers of 5 as the area h under the pairing curve m of magnitude of voltage 4.8 * LSB (least significant bit), obtaining its pairing curve n area i under this voltage again (represents with netting twine, it is overlapping with area j partly), the statistics post number that its expression is contributed by this digital analog converter 104.If area h is identical with area i, represent that promptly the pairing magnitude of voltage of 4.8 * LSB is quantization step 5 pairing correct magnitudes of voltage.If area h is not equal to area i, can with among coding 4.8 * LSB originally 4.8 take advantage of again after 0.05 slightly LSB (promptly 4.85 * LSB), repeat above-mentioned action again till both area is equal.With 10 signals is example, and for trying to achieve the pairing correct magnitude of voltage of each quantization step, said method must repeat (210-1=1023) 1023 times.Please note that above-mentioned so-called voltage adjustment is not to operate on hardware, but in software engine 12, try to achieve with computed in software.
The poor delta that static parameter DNL equals respectively to add up intercolumniation deducts LSB, i.e. DNL=delta-LSB, and DNL is the error between pairing magnitude of voltage of representation signal and LSB.
Table 1 shows that the present invention is applied to an embodiment of 4 analog-digital converters, wherein coding " 1 " representative " 0000 ", and coding " 2 " is " 0001 ", and the like.The built-in self-test of present embodiment is to adopt adjacent coding to analyze, so LSB is 1.
Table 1
The individual delta DNL of " 1 " of coding " 0 "
The number number
1????????300????????340????????????1??????????????0
2????????298????????342????????????1.006711409????0.006711
3????????293????????347????????????1.0238907850.??0?23891
4????????293????????347????????????1.023897085????0.023891
5????????292????????348????????????1.02739726?????0.027397
6????????296????????344????????????1.013513514????0.013514
7????????399????????241????????????0.751879699????-0.24812
8????????242????????398????????????1.239669421????0.239669
9?????????299????????341????????1.003344482????????0.003344
10????????286????????354????????1.048951049????????0.048951
11????????243????????397????????1.234567901????????0.234568
12????????396????????244????????0.757575758????????-0.24242
13????????296????????344????????1.013513514????????0.013514
14????????295????????345????????1.016949153????????0.016949
15????????300????????340????????1??????????????????0
Annotate: x is a or b
Fig. 6 is the curve chart of the embodiment of table 1, and the DNL value in encode " 7 " is about-0.2, obviously departs from a LSB, and saying originally in fact is 7, and in fact its value only is about 6.8, relatively makes its distance with coding " 8 " increase to 1.2.Similar situation also takes place in coding 11,12.It is excessive to judge that thus this coding " 7 " reaches the error of " 11 ", must compensate by correction circuit.
Of the present invention another be characterised in that and can utilize the input sample of a statistical chart as this static parameter analytical equipment 42 and this dynamic parameter analytical equipment 44, be used to eliminate known technology must be imported a sine wave separately when carrying out dynamic analysis shortcoming.Fig. 7 (a) is the output statistical chart of this compensation arrangement 41, via with the stack computing of a statistics formula P (n), as shown in Equation 1, and obtain the trigonometric ratio statistical chart in a probability territory, shown in Fig. 7 (b).
Fy=P (n) * fx, wherein * represents convolution algorithm ... (formula 1)
Wherein n is that sinusoidal wave amplitude, N are the figure place of this analog-digital converter 101 for coding, B for FSR full scale range, the A of this analog-digital converter 101.
Shown in Fig. 7 (c), the mode that this waveform synthesizer 43 is adopted fixing sampling is converted to time domain waveform (can be considered will each coding shown in the longitudinal axis of Fig. 7 (b) bar chart rotate 90 degree and stacked toward the X direction of Fig. 7 (c) gradually) with the statistical chart of this analog-digital converter 101 in the probability territory.This dynamic parameter analytical equipment 44 is to utilize time domain waveform that this waveform synthesizer 43 formed as input, does not therefore need additionally to add a sine wave again, and it can be used for calculating known parameters such as signal to noise ratio.
The present invention utilizes the digital analog converter of low speed and low resolution can solve the nonlinearized problem of the built-in self-test device of traditional analog digital quantizer, thus can reduce hsrdware requirements, and then save the cost expenditure.
Technology contents of the present invention and technical characterstic are open as above, yet the those of ordinary skill of art technology still may be done all replacement and modifications that does not deviate from spirit of the present invention based on announcement of the present invention and enlightenment.Therefore, protection scope of the present invention should be not limited to the content that embodiment discloses, and should comprise various do not deviate from replacement of the present invention and modifications, and is contained by the present patent application claim.
Claims (16)
1. the built-in self-test device of an analog-digital converter is characterized in that it comprises:
One digital analog converter, its figure place is less than or equal to the figure place of this analog-digital converter to be measured, and the frequency of this analog-digital converter to be measured is the multiple of the frequency of this digital analog converter;
One low pass filter is used for the output signal of level and smooth this digital analog converter, and exports this smoothing signal to this analog-digital converter to be measured;
One adds up figure analyzer, is electrically connected to the output of this analog-digital converter to be measured, is used to add up the number of times that each coding occurs;
One software engine is electrically connected to the output of this statistical chart analyzer, the characteristic of the analog-digital converter that is used to show that this is to be measured.
2. the built-in self-test device of analog-digital converter as claimed in claim 1 is characterized in that described software engine comprises:
One compensation arrangement is used to remove the error that is produced between this digital analog converter and analog-digital converter to be measured;
One static parameter analytical equipment;
One dynamic parameter analytical equipment.
3. the built-in self-test device of analog-digital converter as claimed in claim 2, it is characterized in that described software engine comprises a waveform synthesizer in addition, it is converted to the output statistical chart of this statistical chart analyzer the trigonometric ratio statistical chart in probability territory earlier, and the mode with fixing sampling is converted into a time domain waveform again.
4. the built-in self-test device of analog-digital converter as claimed in claim 3 is characterized in that described dynamic parameter analytical equipment is that the time domain waveform exported with this waveform synthesizer is as the input sample.
5. the built-in self-test device of analog-digital converter as claimed in claim 2 is characterized in that described compensation arrangement is to utilize the mode of the voltage trim pairing correct magnitude of voltage that obtains respectively to encode.
6. the built-in self-test device of analog-digital converter as claimed in claim 5 is characterized in that described compensation arrangement is to utilize the integration of the output encoder of this analog-digital converter to be measured and digital analog converter and voltage in the hope of the pairing correct magnitude of voltage of encoding.
7. the built-in self-test device of analog-digital converter as claimed in claim 1, it is characterized in that it comprises the built-in self-test circuit of a digital analog converter in addition, the output that it is connected in this digital analog converter is used for proofreading and correct and testing this digital analog converter.
8. the built-in self-test device of analog-digital converter as claimed in claim 1 is characterized in that it comprises a counter in addition, and the enumeration data that provides this digital analog converter required is provided.
9. the built-in self-test device of analog-digital converter as claimed in claim 1 is characterized in that it comprises an internal memory in addition, is used for the data that this statistical chart analyzer of buffer memory is exported.
10. the built-in self-test method of an analog-digital converter is characterized in that it comprises the following step:
Utilize a digital analog converter to produce one first signal;
With this first signal smoothingization;
Utilize a secondary signal to take a sample, with the coding that defines this analog-digital converter to be measured corresponding relation with voltage range at first signal of smoothing; Wherein the figure place of this secondary signal is more than or equal to the figure place of first signal, and the frequency of this secondary signal is the multiple of the frequency of this first signal;
Produce the statistical chart of this analog-digital converter to be measured output;
Compensate the error that is caused between this analog-digital converter to be measured and the digital analog converter, to obtain respectively to encode pairing correct magnitude of voltage;
Calculate the static parameter of this analog-digital converter to be measured;
Calculate the dynamic parameter of this analog-digital converter to be measured.
11. the built-in self-test method of analog-digital converter as claimed in claim 10 is characterized in that described static parameter and dynamic parameter are to use same group of statistical chart.
12. the built-in self-test method of analog-digital converter as claimed in claim 10 is characterized in that it comprises the following step in addition:
The employed statistical chart of this static parameter is converted to the trigonometric ratio statistical chart in probability territory earlier, and the mode with fixing sampling is converted to a time domain waveform again, is used for the input sample that calculates as this dynamic parameter.
13. the built-in self-test method of analog-digital converter as claimed in claim 10 is characterized in that described correct magnitude of voltage is to utilize the mode of voltage trim to obtain.
14. the built-in self-test method of analog-digital converter as claimed in claim 10, it is characterized in that this voltage is the pairing correct magnitude of voltage of coding when the coding and the integration of the coding of the integration of voltage and the pairing secondary signal of this voltage and voltage when equating of pairing first signal of a voltage under this voltage.
15. the built-in self-test method of analog-digital converter as claimed in claim 10 is characterized in that level and smooth function is to be integrated in this digital analog converter.
16. the built-in self-test method of analog-digital converter as claimed in claim 10, the step that it is characterized in that compensating the error, the static parameter of calculating this analog-digital converter to be measured and the dynamic parameter that are caused between this analog-digital converter to be measured and the digital analog converter is to utilize a software engine to be carried out.
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| CN 200310114299 CN1617453A (en) | 2003-11-12 | 2003-11-12 | Built in self detector and method for analogue / digital converter |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101876686A (en) * | 2009-04-28 | 2010-11-03 | Vega格里沙贝两合公司 | Be used to monitor the diagnostic circuit of analog-digital converter circuit |
| WO2014012343A1 (en) * | 2012-07-20 | 2014-01-23 | 中国科学院深圳先进技术研究院 | System on chip or system in package-based built-in self-test system |
| CN103941119A (en) * | 2014-03-27 | 2014-07-23 | 北京汇德信科技有限公司 | Multifunctional programmable signal generating parameter testing system |
| CN104993832A (en) * | 2015-07-02 | 2015-10-21 | 中国电子科技集团公司第四十一研究所 | Three-point relevance waveform smoothing method based on high speed sample data |
| CN105988077A (en) * | 2015-02-06 | 2016-10-05 | 中国科学院微电子研究所 | Built-in self-testing method and device and system on chip |
-
2003
- 2003-11-12 CN CN 200310114299 patent/CN1617453A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101876686A (en) * | 2009-04-28 | 2010-11-03 | Vega格里沙贝两合公司 | Be used to monitor the diagnostic circuit of analog-digital converter circuit |
| US9054724B2 (en) | 2009-04-28 | 2015-06-09 | Vega Grieshaber Kg | Diagnostic circuit for monitoring an analog-digital converter circuit |
| WO2014012343A1 (en) * | 2012-07-20 | 2014-01-23 | 中国科学院深圳先进技术研究院 | System on chip or system in package-based built-in self-test system |
| CN103941119A (en) * | 2014-03-27 | 2014-07-23 | 北京汇德信科技有限公司 | Multifunctional programmable signal generating parameter testing system |
| CN103941119B (en) * | 2014-03-27 | 2016-09-07 | 北京汇德信科技有限公司 | A kind of multifunction programable signal generation parameter test system |
| CN105988077A (en) * | 2015-02-06 | 2016-10-05 | 中国科学院微电子研究所 | Built-in self-testing method and device and system on chip |
| CN105988077B (en) * | 2015-02-06 | 2019-03-15 | 中国科学院微电子研究所 | Build-in self-test method, device and system on chip |
| CN104993832A (en) * | 2015-07-02 | 2015-10-21 | 中国电子科技集团公司第四十一研究所 | Three-point relevance waveform smoothing method based on high speed sample data |
| CN104993832B (en) * | 2015-07-02 | 2018-04-24 | 中国电子科技集团公司第四十一研究所 | A kind of 3 correlation waveform smoothing methods based on high-speed sample data |
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