CN1485739A - Internal storage testing method - Google Patents
Internal storage testing method Download PDFInfo
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- CN1485739A CN1485739A CNA021348367A CN02134836A CN1485739A CN 1485739 A CN1485739 A CN 1485739A CN A021348367 A CNA021348367 A CN A021348367A CN 02134836 A CN02134836 A CN 02134836A CN 1485739 A CN1485739 A CN 1485739A
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Abstract
The invention relates to an internal memory testing method to be performed by a computer, wherein the operating system can address in a range of 4G internal memory under the big real mode and clear the content of the high speed buffer, thus preventing the interference for the test and measurement, after the tested internal memory is confirmed, the internal memory block or the stationary memory unit can be tested, thus the time interval between the read-write of the internal memory can be adjusted at will, the testing time can also be saved.
Description
Technical field
The present invention relates to a kind of method of testing, especially about a kind of method of testing of internal memory.
Background of invention
Internal memory is the chief component of computer memory, and internal memory then is to form one of computer basic element of character, so internal memory directly determines the computer system performance.So, in case internal memory breaks down, promptly can cause the system read-write mistake, cause data to be lost, thereby regularly internally deposit into the row test and seem particularly important.And general internal storage testing method, drawback is more, sees also Fig. 1, this kind method ties up on the computer to be carried out, and its data storage that will test palpus earlier is stored in database and test in one memory storage with parameter in a database again, test then, its execution in step is as follows:
Step 201 activation manipulation system;
Step 202 makes computer system enter the protected mode of addressable 4G memory range and begins operation;
Step 203 is taken out parameters such as test duration of preestablishing, testing time from storer;
Step 204 is disposed the content of high-speed cache, in order to avoid its test to internal storage causes interference;
Step 205 shields cache memory;
Step 206 with random fashion, accesses a test template as test data from test database, with storing in the database for the memory test data, it places memory storage to this kind for test;
One group of template that step 207 will be extracted out at random is written in the tested memory block;
The content that writes when content that step 208 will be read from internal memory and test is made comparisons, and sees whether both conform to, if be not inconsistent, then execution in step 209, the display memory error message, and the expression internal memory is made mistakes;
Step 210 represents that then it is the non-defective unit of normal operation if conform to, and finishes test.
By the top testing procedure time interval of this kind method between can not the regulated at will memory read-write as can be seen, the mistake that also just can not judge the internal memory appearance is read error or write error, normal conditions, occurring promptly for the first time that the data of reading is not inconsistent with the data that writes is tangible read error, if it is correct for the first time, and after repeating to read several times, the situation that data is not inconsistent appears reading and writing, just can be defined as write error, the time interval of the method for testing of therefore general internal memory between can not the regulated at will memory read-write is exactly that what can not tell that internal memory occurs is read error or write error, makes troubles to test.In addition, this kind method can't be tested single internal storage location, will occur like this measuring EMS memory error information through the first run, and will reappear the once test of doing again from the beginning again when mistake fully locates errors information, this kind test waste plenty of time, and effect allows of no optimist.Once more, the operating system of this kind method ties up under the protected mode of addressable 4G memory range carries out, and the test data under this kind pattern finally also need be come out with descriptor " compiling ", just can discern, and has increased difficulty of test.
Summary of the invention
Purpose of the present invention, system provides a kind of internal storage testing method of function admirable, this method mainly ties up on the computer and carries out, and make operating system under the real pattern of addressable 4G byte of memory scope, see through access device again and take out parameter required when testing, load and deposit within to be measured, again the content of high-speed cache is removed, select test pattern simultaneously, seeing through the test mode of cooperation again, whether normal, when end of test (EOT) if testing reading of this internal memory to be measured, then again with in the data load high-speed cache, make its running, leave the real pattern of addressable 4G byte of memory scope, so with seasonal system, not only can regulated at will time interval between the read-write, and can test single storage unit.
Another object of the present invention, system provides a kind of internal storage testing method of function admirable, when system will test the whole unit of internal memory to be measured, then system can (data be that the deviser is according to the test needs in this database from being stored in data the database in advance, and some data as test of writing), extract at random mode, obtained data is loaded in all unit of internal memory to be measured again, the activationary time counter is set the stand-by period, after waiting for a period of time simultaneously, counter subtracts one (N=N-1), until counter is zero, in the time of will testing, by the data that internal memory to be measured read at every turn again, compare with the data in original loading internal memory to be measured, if both data do not conform to, then show the message of mistake, and stop test action; If both data conform to, data in then should internal memory to be measured is taken out, with with the reverse order of original loading internal memory to be measured, reload internal memory to be measured, and test, if both data do not conform to above-mentioned same steps as, the message that then shows mistake, and stop test action, if both data conform to, but then represent this interior non-defective unit that saves as normal operation to be measured.
The present invention's a purpose again, system provides a kind of internal storage testing method of function admirable, when system will be to internal memory to be measured when wherein a unit is tested, then system can (data be that the deviser is according to the test needs in this database from being stored in data the database in advance, and some data as test of writing), extract at random mode, obtained data is loaded in the unit of internal memory desire to be measured survey, from unit under test, read data then, and the data that is read in this unit to be measured of judgement, whether identical with the data in this unit of original loading, judge again by the data that read in this unit to be measured, compare with the data in this unit of original loading, if both data do not conform to, the message that then shows mistake, and stop test action, if both data conform to, activationary time counter then, set the stand-by period, in the time of one section behind the number, counter subtracts one (N=N-1), until counter is zero, finish to wait for, and the data of from internal storage location, reading previous loading internal storage location once more, judge the data that is read in this unit to be measured once more, whether identical with data in this unit of original loading, if both data do not conform to, then show the message of mistake, and stop test action, if both data conform to, then judge whether the testing time that reaches predetermined, if finish test, if not, continue to repeat above-mentioned test action, until reaching the presumptive test number of times, if the data of reading conforms to the test data of loading all the time, but then this internal storage location normal operation to be measured of expression, so, can reach the purpose that the arbitrary unit of internal memory to be measured is tested.
Description of drawings
Fig. 1 is the process flow diagram of prior art stored body examination method for testing;
Fig. 2 is the main program flow chart of the present invention's internal storage testing method;
Fig. 3 is a counterfoil test subroutine process flow diagram within the internal storage testing method of the present invention;
Fig. 4 is a certain fixed memory unit testing subroutine flow chart of internal storage testing method of the present invention.
Specific embodiment
See also shown in Figure 2, the present invention is a kind of internal storage testing method, it is a kind of method of testing of carrying out on counter, this method of testing mainly is data required will test in advance the time mode with module, be stored in the database, with this database and after when test, required parameter was stored in the storage device in the counter, test, its testing procedure is as follows again again:
Step 1 activation manipulation system;
Step 2 makes this system (Big Real Mode) in the real pattern of addressable 4G byte of memory scope, and this kind pattern is a kind of pattern between real pattern (Real Mode) and protected mode (Protect Mode).Press, have only two kinds of DOS operator schemes in the computer at present: a kind of is real pattern (Big Real Mode), and so-called real pattern is a kind of pattern under the DOS system, and its space has only 1M; The protected mode space is bigger, and 4G is arranged, but this pattern can not be with the command functions under the DOS; Another kind then is protected mode (Protect Mode).
And the real pattern of addressable 4G byte of memory scope has solved this problem, and this kind pattern is introduced into protected mode, determines the capacity of addressable 4G scope, withdraws from protected mode then, enters the real pattern state, promptly reaches the real pattern of addressable 4G internal memory.This kind pattern make common memory have can addressing the ability of 4G spatial content, so it not only has enough big addressing space, and can use the command functions under the DOS.
Step 3 is again by taking out required parameter in the storage device; For example, the test duration, testing time is after the parameters such as the internal memory of test;
Step 4 influences internal memory to be measured to some extent in order to eliminate high-speed cache, is removed holding within the high-speed cache;
Step 5 is shielded this high-speed cache again;
Step 6 is held removing fully within certain high-speed cache, once more high-speed cache is done the action of removing, and is clean to guarantee holding removing fully within this high-speed cache;
Step 7 judges whether the whole unit of internal memory to be measured are tested, and in this way, then continues the action of step 8, as not, then carries out the action of step 9;
Step 8 sees through tests corresponding first subroutine that matches to the whole unit of internal memory to be measured, and whether test reading of these all unit of internal memory to be measured normal;
Step 9 continues to judge whether internal memory to be measured is wherein tested a unit, in this way, then continues the action of step 10, as not, then carries out the action of step 12;
Step 12 is reloaded data in the high-speed cache, makes its running;
Step 13 makes system leave the real pattern of addressable 4G byte of memory scope;
Step 14 finishes everything, leaves system.
Please refer to shown in Figure 3ly, selecting when system is when the whole unit of internal memory to be measured are tested, and its testing procedure of first subroutine is as follows:
Step 801 system is from being stored in the data the database in advance, extracts a module data at random mode and comes out;
Step 802 will be loaded in all unit of internal memory to be measured by the obtained data of database;
Step 803 activationary time counter enters waiting status, make counter finish one period stand-by period after, be about to original setting-up time and subtract one (N=N-1), setting the stand-by period, is because internal storage has ageing behavior, usually some failure memory, read correct during beginning, but after waiting for a period of time, error situation occurs reading, but this kind wait is because of its latency period of regulated at will, so this kind waits for that action is used for detecting this kind EMS memory error just;
Step 804 is waited for action, is zero until counter;
When step 805 will be tested,,,, then carry out the action of step 808 at every turn, show the message of mistake, and stop test action if both data do not conform to the data comparison in original loading internal memory to be measured by the data that internal memory to be measured read;
Step 806 is if both data conforms to, the data taking-up in then should internal memory to be measured, with the reverse order of original loading internal memory to be measured, reload in the internal memory to be measured, makeing mistakes because of internal memory to be divided into read error and write error, correct for the first time, is not that internal memory is error-free, if after repeating to read, occur reading and write the situation that data is not inconsistent, can be defined as write error, therefore, again the write activity of this step can be used to judge whether internal memory has the type of error of write error;
Step 807 activationary time counter enters waiting status, make counter finish one period stand-by period after, be about to original setting-up time and subtract one (N=N-1);
Step 809 is waited for action, is zero until counter, finishes wait;
When step 810 will be tested,,,, then carry out the action of step 808 at every turn, show the message of mistake, and stop test action if both data do not conform to the data comparison in original loading internal memory to be measured by the data that internal memory to be measured read;
Step 811 is then got back to step 11 if both data conform to, and continues to carry out following action.
Please refer to shown in Figure 4ly, selecting when system is that its testing procedure of second subroutine was as follows when wherein a unit was tested to internal memory to be measured:
Whether step 104 is judged by the data that this single internal storage location to be measured read, with the data of this single internal storage location to be measured of original loading, identical;
When step 107 makes zero when counter, from this single internal storage location to be measured, read data once more;
Whether step 108 judges by this internal memory to be measured data of being read of a unit wherein, with this internal memory to be measured of original loading data of a unit wherein, identical, if both data do not conform to, the then action of execution in step 109, the message of demonstration mistake, and then execution in step 11, stop test action;
Thus, the method for testing that mat is above-mentioned, not only can regulated at will time interval between the read-write, and can test single storage unit.
Claims (5)
1, a kind of internal storage testing method ties up on the computer and carries out, and its execution in step is as follows:
Enter in the real pattern of addressable 4G byte of memory scope (Big Real Mode);
By taking out the parameter that original stored test is used in the storage device;
Removed holding within the high-speed cache;
This high-speed cache is shielded;
Judge whether the whole unit of internal memory to be measured are tested;
In this way, then carry out first subroutine that the whole unit of internal memory to be measured are tested;
As not, continue to judge whether internal memory to be measured is wherein tested a unit;
In this way, then carry out a wherein unit second subroutine of testing of internal memory to be measured,, then finish test as not;
Judge whether that all test actions finish,, then proceed test action as not;
In this way, then data is reloaded in the high-speed cache, made its running, make system leave the real pattern of addressable 4G byte of memory scope.
2, internal storage testing method according to claim 1 is characterized in that: after carrying out high-speed cache shielded, once more high-speed cache is done the action of removing.
3, internal storage testing method according to claim 1 is characterized in that: the testing procedure of described first subroutine is as follows:
By the data that is stored in advance in the database, extract a module data at random mode and come out;
Data with described database loads in all unit of internal memory to be measured simultaneously;
Next, system carries out a comparison step: the activationary time counter, make counter finish the default stand-by period after, read the data of this unit, judge by the data that this unit read, whether identical with the data of this unit of original loading,
If both data do not conform to, then show the message of mistake, and stop test action;
If both data conform to, then finish test.
4, as the internal storage testing method as described in the claim 3, it is characterized in that: if both data conform to, also the data in this internal memory to be measured can be taken out once more, with with the reverse order of this internal memory to be measured of original loading, reload in the internal memory to be measured, after described data is reloaded internal memory step to be measured and finished, can carry out above-mentioned comparison step once more;
If both data do not conform to, then show the message of mistake, and stop test action;
If both data conform to, then finish test.
5, as the internal storage testing method as described in claim 1 or 2 or 3 or 4, it is characterized in that: the testing procedure of described second subroutine is as follows:
In the data from be stored in database, extract a module data at random mode and come out;
The module data is loaded internal memory to be measured wherein in the unit;
Carry out a comparison step: the activationary time counter, make counter finish the default stand-by period after, read the data of this unit, judge by the data that this unit read, whether identical with the data of this unit of original loading;
If both data do not conform to, then show the message of mistake, and stop test action; If both data conform to, the verification test number of times is seen the testing time that whether reaches predetermined, then finishes test action in this way; As not, repeat comparison step.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB021348367A CN1332315C (en) | 2002-09-27 | 2002-09-27 | Internal storage testing method |
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| CNB021348367A CN1332315C (en) | 2002-09-27 | 2002-09-27 | Internal storage testing method |
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| CN1485739A true CN1485739A (en) | 2004-03-31 |
| CN1332315C CN1332315C (en) | 2007-08-15 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102135941A (en) * | 2010-08-26 | 2011-07-27 | 华为技术有限公司 | Method and device for writing data from cache to memory |
| CN102999409A (en) * | 2012-12-20 | 2013-03-27 | 迈普通信技术股份有限公司 | Memory test method and embedded equipment |
| CN103208314A (en) * | 2013-03-04 | 2013-07-17 | 深圳市硅格半导体有限公司 | Internal memory test method of embedded system and embedded system |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6446164B1 (en) * | 1991-06-27 | 2002-09-03 | Integrated Device Technology, Inc. | Test mode accessing of an internal cache memory |
| CN1129070C (en) * | 1998-02-06 | 2003-11-26 | 华为技术有限公司 | Recognition method for internal stored operation error in programming |
| FR2785695B1 (en) * | 1998-11-06 | 2003-01-31 | Bull Cp8 | METHOD OF COMPACTING AN INTERMEDIATE OBJECT CODE TYPE PROGRAM EXECUTABLE IN AN ON-BOARD SYSTEM PROVIDED WITH DATA PROCESSING RESOURCES, COMPACTING SYSTEM AND MULTI-APPLICATION ON-BOARD SYSTEM THEREOF |
| CN1194303C (en) * | 2001-01-17 | 2005-03-23 | 赵国强 | Anti-copy method for storage device |
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2002
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102135941A (en) * | 2010-08-26 | 2011-07-27 | 华为技术有限公司 | Method and device for writing data from cache to memory |
| CN102135941B (en) * | 2010-08-26 | 2013-09-11 | 华为技术有限公司 | Method and device for writing data from cache to memory |
| CN102999409A (en) * | 2012-12-20 | 2013-03-27 | 迈普通信技术股份有限公司 | Memory test method and embedded equipment |
| CN103208314A (en) * | 2013-03-04 | 2013-07-17 | 深圳市硅格半导体有限公司 | Internal memory test method of embedded system and embedded system |
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| CN1332315C (en) | 2007-08-15 |
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