CN1416594A - 以晶片级形成堆积管芯集成电路芯片封装件的方法 - Google Patents

以晶片级形成堆积管芯集成电路芯片封装件的方法 Download PDF

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CN1416594A
CN1416594A CN01806388A CN01806388A CN1416594A CN 1416594 A CN1416594 A CN 1416594A CN 01806388 A CN01806388 A CN 01806388A CN 01806388 A CN01806388 A CN 01806388A CN 1416594 A CN1416594 A CN 1416594A
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wafer
die
tube core
wire
tube
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CN1194408C (zh
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K·M·拉姆
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Atmel Corp
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Abstract

一种晶片级封装方法，该方法生产出堆积的双重/多重管芯集成电路封装件(91)。在该方法中，两块晶片中管芯尺寸较小的晶片可通过金属再分布工艺处理，然后附上焊球。然后该晶片被锯成各个管芯尺寸的球栅阵列封装件。在带较大尺寸管芯(25)的晶片上，在准备与管芯尺寸BGA封装件之一附接的每一管芯晶格位置正面，沉积了管芯附接粘料(18)。BGA管芯封装件背面放在该粘料上固化。引线接合操作把信号从管芯尺寸BGA封装件接到底部管芯电路。把环氧一类的涂料(18)沉积在晶片上以覆盖引线接合导线，然后固化组件。然后，把堆积管芯晶片分成各个堆积管芯IC封装件。

Description

以晶片级形成堆积管芯集成电路芯片封装件的方法
技术领域
本发明一般涉及集成电路芯片封装件，尤其涉及以晶片级形成堆积管芯集成电路封装件的方法。
背景技术
芯片封装件用于防止集成电路芯片遭沾污和损伤，并且提供耐用的电气引线***以将集成电路芯片或管芯连接到外部印刷电路板上或直接装入电子产品。在单片载体上提供多芯片集成电路(IC)封装件有许多优点。把多片芯片直接置于基底上，可在芯片与信号/电源线之间提供低电感与低电容连接，并提供极稠密的互连网，能提高封装密度和***性能。多芯片封装件使芯片间距减至最小，并减少了装在基底上诸芯片之间的感性与容性的断续性。另外，陶瓷基底上短而窄的导线的电容与电感比印刷电路板互连小得多。为了增大存储器而不增大覆盖区，即不增大IC封装件在电路板上的占用区域，通常把多块同样的IC芯片堆入同一个芯片封装件里是有利的。
在原有技术中，一般对每个独立的管芯对或管芯组制作一个封装件而构成多芯片封装件。其它实现的方法应有利于以晶片级，即在晶片上形成每个独立的管芯之后但在将晶片切成独立的芯片之前形成IC封装件。这样更便于大量生产芯片封装件，并且一次制造和测试以矩阵形式排列在晶片上的若干芯片封装件。这还能减少IC芯片在封装与测试过程中的时间和费用。
大多数原有技术的晶片级封装方法都涉及封装单一的IC管芯。涉及多管芯的其它封装方法往往试图通过堆积多块晶片来形成半导体器件，如授予Ball的美国专利No5,952,725揭示了通过堆积上下晶片来提高电路密度的方法，各晶片在其正面的特定区域具有制作的电路。上下晶片背对背接触，下晶片背面涂布一层粘剂。晶片经对准，使每块晶片上的互补电路垂向对准。接着把粘合的晶片对本身附着于黏膜，切割时使晶体固定不动。粘合的晶片对可切成独立的管芯对或含一个以上管芯对的晶片部分。授予Cronin等人的美国专利No.5,872,025揭示了一种通过堆积晶片而不是堆积各个器件而制备的堆积三维器件。芯片区形成在若干晶片上，各芯片区被充满沟道的绝缘体包围。然后把晶片堆起来，芯片区对准，并经层压联接在一起。层压晶片堆后，用蚀刻、切割等处理分开芯片堆。
在上述一类方法中，整个晶片要相互对准、粘合在一起，然后切成各个管芯对，一个问题是不能保证所有的独立管芯都“合格”，都能正常工作。如在对准晶片时，某一合格管芯可能对准一“坏“管芯或不能正常工作的管芯。包含合格管芯和坏管芯的组合堆积管芯封装件，最终会导致坏的堆积管芯封装件，不得不废弃，这要浪费不少合格的管芯。
本发明的一个目的是提供一种形成堆积管芯IC封装件的方法，它可以一次封装晶片上的所有硅管芯，并生产出堆积管芯封装件的覆盖区尽可能最小的IC封装件。
本发明的另一目的是提供一种形成堆积管芯IC芯片封装件的方法，结果只让合格的管芯组装在堆积管芯封装件里，尽量不浪费合格的管芯。
发明内容
上述目的通过一种晶片级封装法实现，该法让晶片上所有的半导体管芯一次封装，生产出堆积的双重/多重管芯IC封装件。生产的封装件是一种真正的芯片尺寸封装件，堆积管芯封装件可能的覆盖区最小。在该方法中，两块晶片中管芯尺寸较小的晶片可通过金属再分布工艺处理，然后附上焊球。晶片被锯成各个管芯尺寸的球栅阵列封装件。在带较大尺寸管芯的晶片上，在准备与管芯尺寸BGA封装件之一附接的每一管芯晶格位置正面，沉积了管芯附接粘料。BGA管芯封装件背面放在该粘料上固化。引线接合操作把信号从管芯尺寸BGA封装件接到形成在晶片上的底部管芯电路。把环氧一类的涂料沉积在晶片上以覆盖引线接合导线，然后固化组件。制成的堆积管芯仍保持晶片矩阵形式，有利于简化最后测试或平行测试的标引。然后，把堆积管芯晶片分成(singulate)各个堆积管芯IC封装件。本发明方法可把功能相同或不同的管芯组合入单个IC封装件。
附图简介
图1是第一与第二硅晶片的透视图，每片的上表面形成多个管芯。
图2和3是图1中第二晶片11沿2-2的截面图，表明第二晶片的金属再分布工艺。
图4是图1中第二晶片的管芯之一在附着焊球之后的透视图。
图5～8是图1中第一晶片沿5-5的截面图，表明在用本发明形成IC封装件时采用的各种加工步骤。
图9是图1的第一晶片完成图5～8的加工步骤后的顶视图。
图10是本发明方法形成的最终IC封装件的截面图。
实施发明的较佳方式
参照图1，图示出了第一和第二硅晶片21与11。尽管硅是典型材料，但是也可使用其它半导体材料。晶片21和11上面都制有多个微电路，微电路排列成各个芯片或管芯的阵列。如图1所示，第一晶片21上的管芯24、25大于第二晶片11上的管芯14、15。多个铝质接合片23、16围绕晶片21、11上各芯片的***排列。在保持晶片阵列形式的同时，测试诸芯片，以确定正常工作和不正常工作的芯片。
参照图2，第二晶片11的多个引线接合片16围绕上表面19排列。在封装入本发明的芯片封装件时，这些接合片16可用作每个管芯的连接点，或者晶片11的上表面19可经历金属再分布处理。金属再分布处理形成连接到引线接合片的金属迹线图案，然后将迹线通到每个管芯内的焊片位置。再分布层的冶金学应对硅管芯材料具有良好的粘合作用，并对器件应用具有充足的电学特性。在引线接合片连接点，冶金学应该应用铝线或金线作引线接合。在焊片处，冶金学应适于可靠地焊接到各管芯上。
参照图3，图示为一类金属再分布层，该层及其形成方法已在转让给本发明受让人的美国专利申请连续号09/434,711中作了揭示，该申请通过引用包括在这里。参照图3，在晶片表面形成一钝化层41，并在接合片16和钝化层41上形成三金属层结构40，该结构40包括一层铝43、一层镍45和一层铜47。然后，在三金属层40上形成第二钝化层49。该组件经蚀刻，形成铜材料的焊片52和铝材料的引线接合片60。接着把焊球50放在焊片52上。焊球50可通过预制焊球的机械传递放在焊片52上。或者通过对焊膏作丝网印刷或模板印刷形成焊球50。于是，焊料经回流而形成封装的焊球。焊球50按期望的常用图型施加，如晶片整个表面上的均匀全阵列。
此时，把第二晶片11切成各块芯片。参照图4和图1，每个管芯15的尺寸足够小，使之适合第一晶片21上的空间26，在管芯15堆积在第一晶片21上时，使其不侵占晶片21的管芯24、25的接合片23。如图4所示，多个焊球50和引线接合片60都排列在管芯15的上表面12上。
参照图5，图中示出了第一晶片21的截面5-5，铝接合片23位于晶片21的上表面。如上所述，晶片21排列为阵列状的各个管芯24、25。参照图6，第二晶片的管芯14、15排列在第一晶片21的上表面上。球栅阵列形式的管芯14、15可应用拾放机装在晶片21上，以在将每个顶管芯球栅阵列放置在底部晶片21上时提供精度。管芯14、15应排列成使晶片21每个管芯24、25上的引线接合片23露出。为了把管芯14、15附着于晶片21，在晶片21上表面沉积了膏状或预制膜的粘料18，如环氧或热塑料。沉积膏料可使用自动涂膏设备，或者若粘料为预制品，可使用拾放设备。管芯14、15的背面放在粘料18上，然后固化管芯接合粘料。
参照图7，接着作引线接合操作，以将信号从每个顶部管芯接到晶片21上的每个底部管芯。例如，为了连接上部管芯15与下部管芯25，可把金引线接合导线70从顶部管芯15的引线接合片60接至晶片21上底部管芯25的引线接合片23。这是用标准引线接合技术实现。接着参照图8，用环氧等涂料覆盖引线接合导线70。为了尽量少用垂向空间，使该涂料的最终高度减至最小很重要。然后，固化涂料80。此时，可按晶片阵列形式作封装测试。参照图9，顶部管芯15已置于晶片21各管芯25的顶部。引线接合导线70用于把上部管芯15的接合片16接至下部管芯25的接合片23。气密材料80覆盖所有的引线接合导线70，但不覆盖焊球50与管芯上表面12。
参照图10，接着把第一晶片分成或切成独立的芯片管芯封装件91。普通的分割技术是使用带金刚石或树脂锯片的晶片锯。在晶片分成独立的芯片封装件91后，再作封装件测试。本发明制成的堆积管芯BGA封装件91可用与原有技术BGA封装件同样的方法装到最终用户的印刷电路板上。本发明的堆积管芯BGA封装件包括较小管芯15和较大管芯25两种，并具有与较大管芯25一样的覆盖区，所以IC封装件不要求额外的空间。顺便提一下，由于把第二晶片的每个管芯独立地放在第一晶片上，这与把两个整块晶片堆在一起的原有技术方法不同，因而可将第一与第二晶片已知合格的管芯对准，为了不浪费合格的管芯。另外，为在单个IC封装件里堆积两个以上的管芯，还可对多个管芯重复本发明方法，从而增大IC封装件的存贮量而不增大在印刷电路板上要求使用的空间。

Claims (10)

1.一种以晶片级形成堆积管芯IC芯片封装件的方法，其特征在于，包括以下步骤：
提供第一与第二半导体晶片，每块晶片包括多个管芯，第二晶片多个管芯的尺寸比第一晶片多个管芯的尺寸更小，第一与第二晶片的其中每个管芯在其第一表面上有多个接合片，
把多个互连线附接到第二晶片多个管芯第一表面的多个接合片，
把第二晶片切成多个独立的管芯，
将第二晶片的各个管芯附着于第一晶片，其中把各个管芯的背面放置成附着于第一晶片的第一表面，在其上形成多个封装件结构，
把各个管芯的多个接合片连接至第一晶片多个管芯的多个接合片，并且
把第一晶片切成多个独立的堆积管芯IC封装件。
2.如权利要求1所述的方法，其特征在于还包括：在把多条互连线附接到第二晶片多个管芯第一表面的多个接合片的步骤之前，在第二晶片的第一表面先形成一金属再分布层，以形成多个引线接合片与互连片。
3.如权利要求2所述的方法，其特征在于把互连线附着于第二晶片金属再分布层上的互连片。
4.如权利要求2所述的方法，其特征在于把各个管芯的多个引线接合片接至第一晶片的多个接合片。
5.如权利要求1所述的方法，其特征在于把各个管芯的多个引线接合片接到第一晶片的多个接合片的步骤，通过多条接合导线完成。
6.如权利要求5所述的方法，其特征在于还包括：在把各个管芯的多个引线接合片接到第一晶片多个接合片的步骤之后，对多条接合导线加一涂料。
7.如权利要求6所述的方法，其特征在于涂料是环氧。
8.如权利要求1所述的方法，其特征在于还包括：在把各个管芯的多个引线接合片接到第一晶片的多个接合片的步骤之后，测试第一晶片上的封装件结构。
9.如权利要求1所述的方法，其特征在于多条互连线是多个焊球。
10.如权利要求1所述的方法，其特征在于各个管芯用粘料附接至第一晶片。
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US6344401B1 (en) 2002-02-05
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TW484214B (en) 2002-04-21
DE60101159T2 (de) 2004-08-26
MY134235A (en) 2007-11-30
HK1052579A1 (en) 2003-09-19
CA2400805A1 (en) 2001-09-13
NO20023891L (no) 2002-08-16
EP1269538A2 (en) 2003-01-02
KR20020086612A (ko) 2002-11-18
EP1269538B1 (en) 2003-11-05
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JP2003526922A (ja) 2003-09-09
NO20023891D0 (no) 2002-08-16

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