CN1320617C - 半导体器件的芯片规模表面安装封装及其制造方法 - Google Patents

半导体器件的芯片规模表面安装封装及其制造方法 Download PDF

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CN1320617C
CN1320617C CNB991261232A CN99126123A CN1320617C CN 1320617 C CN1320617 C CN 1320617C CN B991261232 A CNB991261232 A CN B991261232A CN 99126123 A CN99126123 A CN 99126123A CN 1320617 C CN1320617 C CN 1320617C
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metal
tube core
metal layer
encapsulation
wafer
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CN1288257A (zh
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费利克斯·赞德曼
Y·默罕穆德·卡塞姆
何约瑟
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VISHEY INTERTECHNOLOGY CORP
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VISHEY INTERTECHNOLOGY CORP
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Abstract

半导体器件的封装方法，包括在半导体管芯正面形成与连接焊盘接触的金属层。金属层伸到管芯与相邻管芯间的划线中。非导电顶盖附在晶片正面，从晶片后面磨从晶片背面进行切割露出金属层。在晶片背面形成非导电层，在非导电层上淀积第二金属层，第二金属层延伸到划线中，在该处第二金属层通过非导电层中的开口与第一金属层接触。第二金属层上形成焊台，使封装安装在印刷电路板上。用锯沿划线锯切顶盖分离各管芯，形成半导体器件封装。

Description

半导体器件的芯片规模表面安装封装及其制造方法
本发明涉及半导体器件封装及其制造方法，特别涉及半导体器件的芯片规模表面安装封装及其制造方法。
在已经完成半导体晶片的工艺处理之后，必须分离所获得的集成电路(IC)芯片或管芯并按可以与外部电路连接的方式进行封装。已有许多公知的封装技术。大多数封装技术包括在引线框架上安装管芯，通过引线键合或其它方式连接管芯焊盘与引线框架，然后把管芯和引线键合部分密封在塑料外壳中，保留从外壳中突出的引线框架。常常通过注塑进行密封。然后，修整引线框架，去除与它固定在一起的连杆，并按这样的方式弯曲引线，以便封装可以安装在平面上，一般安装在印刷电路板(PCB)上。
一般来说，这是昂贵且费时的方法，并且所获得的半导体封装比管芯本身大很多，用完了PCB上非适当量的难得的“不动产”。此外，易损坏引线键合并导致管芯焊盘与封装引线之间较大的电阻。
当被封装的器件是在管芯的反面上有引出线的“垂直型”器件时，会出现难以对付的问题。例如，功率MOSFET一般在管芯的正面侧上有其源极引出线和栅极引出线，而在管芯的背面侧上有其漏极引出线。同样，垂直二极管在管芯的一个面上有正极引出线，而在管芯的反面上有负极引出线。双极晶体管、结型场效应晶体管(JFET)和各种类型的集成电路(IC)也可以按“垂直”结构制造。
因此，需要比现有方法简单和不昂贵的方法，并且该方法应制造大致与管芯尺寸相同的封装。特别需要这样的方法和封装，该方法和封装可以用于在芯片的正面侧和背面侧两面上都有引出线的半导体管芯。
本发明的制造半导体器件封装的方法从半导体晶片开始，该晶片有正面侧和背面侧并包括由划线分开的多个管芯。各管芯包括半导体器件。各管芯的正面侧表面包括钝化层和至少一个与半导体器件的引出线电接触的连接焊盘。各管芯的背面侧也可以与半导体器件的引出线电接触。
该方法包括以下步骤：形成与连接焊盘电接触的第一金属层，第一金属层的一部分横向延伸过管芯的边缘；把顶盖附着在晶片的正面侧上；在划线区域中从晶片背面侧切穿半导体晶片，形成第一次切割，第一次切割有第一切口W1，并露出一部分第一金属层；在管芯的背面侧上形成非导电层；形成第二金属层，第二金属层有在非导电层上延伸的第一部分并与第一金属层电连接；和在划线区域中切穿顶盖，形成第二次切割，第二次切割的第二切口W2小于第一次切口W1，第二次切割保留了在第一和第二金属层之间进行接触的区域。
在许多实施例中，该方法还包括形成与半导体晶片的背面侧电接触的第二金属层的第二部分，第二金属层的第一部分和第二部分彼此电绝缘。该方法还包括研磨、抛光或腐蚀半导体晶片的背面侧，在把顶盖固定在晶片的正面侧后减小晶片的厚度。
在一个方案中，本发明包括在半导体管芯的第一侧面上的第一位置与半导体管芯的第二侧面上的第二位置之间进行电连接的方法。在管芯为半导体晶片的一部分时实施该方法。该方法包括形成第一金属层，第一金属层从管芯的第一侧面上的第一位置横向延伸至超过管芯边缘的晶片区域；把顶盖附着在晶片的第一侧面上；从晶片的第二侧面切穿半导体晶片，露出一部分第一金属层；形成第二金属层，第二金属层从管芯的第二侧面上的第二位置横向延伸并沿管芯的边缘延伸至超过管芯边缘的与第一金属层接触的区域；和切穿顶盖，同时完整无缺地保留在第一和第二金属层之间接触的区域。
本发明还包括半导体器件的封装。该封装包括宽度为X1的顶盖；包含半导体器件的半导体管芯，管芯附着于顶盖上，管芯的正面侧面对顶盖而管芯的背面侧背对顶盖，管芯的宽度X2小于X1；与半导体器件电接触的连接焊盘，接触是位于管芯与顶盖之间，并有不大于X2的宽度；与连接焊盘电接触的第一金属层，第一金属层的第一部分位于连接焊盘与顶盖之间，第一金属层的第二部分横向延伸过连接焊盘的边缘；有第一和第二部分的第二金属层，第二金属层的第一部分与第一金属层的第二部分接触，第二部分与晶片的背面侧电接触，第二金属层的第一和第二部分彼此电绝缘。
按照另一方案，本发明还包括半导体器件的封装，该封装包括包含半导体器件的半导体管芯，管芯的第一侧面包括连接焊盘；附着于管芯的第一侧面上的顶盖，顶盖的边缘横向延伸过管芯的边缘；与连接焊盘电接触的第一金属层，第一金属层横向延伸并终止在超过管芯边缘的第一凸缘；和第二金属层，第二金属层从管芯的第二侧面并沿管芯的边缘延伸并终止于超过管芯边缘的第二凸缘，第二凸缘与第一凸缘接触。
本发明的半导体封装不需要环氧树脂封壳或键合线；附着于管芯上的衬底用于保护管芯，并用作管芯的散热片；封装非常小(例如为模压封装尺寸的50％)而薄；特别是如果晶片被研磨得更薄，那么晶片对半导体器件产生很小的导通电阻；由于封装不需要模具或引线框架，所以封装在生产上是经济的；该封装可以用于各种半导体器件中，例如二极管、MOSFET、JFET、双极晶体管和各种类型的集成电路芯片。
通过参照以下附图(未按比例示出)，将更好地理解本发明，在附图中，相同的部件有相同的标号。
图1表示半导体晶片的俯视图。
图2A-2B至图4A-4B、图5、图6和图7A-7B至图12A-12B表示按照本发明制造半导体封装的方法的步骤。
图13表示本发明的半导体封装的剖面图。
图14表示包括焊球的半导体封装的实施例。
图1表示包括管芯(dice)100A、100B至100N的半导体晶片100的俯视图。实际上，晶片100包含上百或上千个管芯。由在Y方向行进的划线108和在X方向行进的划线110组成的划线的垂直网络分开各管芯。与外部电路元件连接的金属焊盘位于各管芯100A-100N的上表面上。例如，由于管芯100A-100N包括垂直功率MOSFET，所以各管芯有源极连接焊盘106S和栅极连接焊盘106G。
晶片100的厚度一般在15-30密耳的范围内。晶片100的材料一般为硅，但也可以是其它半导体材料，例如碳化硅或镓砷化物。
如上所述，在管芯100A-100N可以使用之前，必须按允许其与外部电路连接的方式来封装各管芯。
图2A-2B至图4A-4B、图5、图6和图7A-7B至图12A-12B表示本发明的方法，这些图示出作为半导体晶片100一部分的两个管芯100A和100B。在所用各附图中，标有“A”的图是晶片的俯视图或底视图；标有“B”的图是剖切“A”图中标有“B-B”部分的放大剖面图。如下所述，在处理过程中，晶片被附着于“顶盖”上，晶片的正面侧通常面对顶盖。尽管在处理中的某些时刻，其结构可以上下倒置，顶盖位于晶片之下，但在完成的封装中，晶片一般位于顶盖下面。除非文中清楚地指出之外，这里使用的“上”、“下”、“上面”、“下面”和类似术语指按完成形式的其顶盖在晶片之上的封装。
本发明还描述了垂直功率MOSFET的封装，该封装一般在其正面侧上有源极引出线和栅极引出线，在其背面侧上有漏极引出线。但是，应该指出，本发明的基本原理可用于制造任何类型的半导体管芯的封装，该半导体管芯在其正面侧和背面侧或仅在其正面侧上有一个或多个引出线。这里使用的管芯或晶片的“正面侧”指管芯或晶片的一个面，在该面上固定电子器件和/或多个连接焊盘；“背面侧”指管芯或晶片的相反面。标有“Z”的箭头方向指晶片的正面侧，并确定晶片颠倒的附图。
参照图2A-2B，由于管芯100A和100B包含功率MOSFET(象征性地示出)，所以各管芯有覆盖在硅或其它半导体材料的上表面上的栅极金属层102G和源极金属层102S。栅极金属层102G和源极金属层102S分别与管芯100A和100B内功率MOSFET的栅极引出线和源极引出线(未示出)电连接。在图2A中，用虚线表示层102G和层102S之间的分离部分。
尽管也使用铜层，但一般来说金属层102G和102S包括铝。在本发明的大多数实施例中，需要改进金属层102G和102S，以便它们可粘接在诸如锡/铅之类的金属焊料上，其理由如下所述。如果在金属上有自然氧化层，那么必须首先去除该自然氧化层。然后，在露出的金属上淀积可焊金属，例如金、镍或银。借助许多已知的方法可以去除氧化层和淀积的可焊金属。例如，可以溅射-腐蚀铝层，去除自然铝氧化层，然后把金、银或镍溅射在铝上。另外，也可以把管芯浸渍在液体腐蚀剂中，去除氧化层，然后通过化学镀敷或电解镀敷，淀积可焊金属。化学镀敷包括使用“锌酸盐化(zincating)”方法，置换氧化物，随后镀敷镍以置换锌酸盐。
在一个实施例中，金属层102G和102S包括被1000TiN子层和500Ti子层覆盖的3μm Al子层。
钝化层104覆盖在栅极金属层102G和源极金属层102S的一部分上，钝化层104中的开口限定栅极连接焊盘106G和源极连接焊盘106S。钝化层104可以由厚度为1密耳的磷硅酸盐玻璃(PSG)形成。
按Y划线108分割管芯100A和100B，该划线可以宽6密耳。在管芯100A和100B的顶部和底部，垂直于划线108的X划线110可以宽4密耳。
在晶片100的正面侧上溅射钛子层202，在钛子层202上溅射铝子层204。例如，钛子层202可以厚500牛 磷硬 204可以厚3μm。然后，采用普通的光刻和腐蚀方法，掩模和腐蚀子层202和204，以便保留图3A和图3B所示的子层202和204的部分。子层202、204的部分202G、204G覆盖在栅极连接焊盘106G上，子层202、204的部分202S、204S覆盖在源极连接焊盘106S上。部分202G、204G与部分202S、204S电绝缘。如图所示，子层202G、202S和204G、204S横向延伸进入Y划线108的区域中。
然后，将10μm的镍子层206化学镀敷于铝子层204G和204S的上表面上，把0.1μm金子层208镀敷在镍子层206上。所获得的结构如图4A和图4B所示，用子层206和208的部分206G和208G分别覆盖栅极连接焊盘106G，用子层206和208的部分206S和208S分别覆盖源极连接焊盘106S。部分206G、208G与部分206S、208S电绝缘。
各管芯中的子层202、204、206和208一起形成第一金属层209。在其它实施例中，第一金属层209可以包括少于或多于四个的子层，可以通过任何已知的方法来淀积子层，例如溅射、蒸发、化学镀敷或电解镀敷、模板印刷或丝网印刷。子层202、204、206和208在这里有时统称为“第一金属层209”。
用非导电粘接层210将顶盖212附着于晶片100的正面侧上。层210可以厚25μm，并可以是环氧树脂。顶盖212可以由玻璃、塑料或铜构成，并可以厚250-500μm。该结构如图5所示，晶片100从上述附图中位置颠倒，顶盖212在晶片100下面。
然后，如图6所示，从晶片100的背面侧有选择地研磨该晶片到3-4密耳的厚度，或在不损害管芯内半导体器件(例如，可以是沟道栅MOSFET)内部微结构的情况下，使其尽可能变薄。例如，可以使用从Strausbaugh得到的研磨机。由于通过顶盖212提供支撑，所以这是可以做到的。研磨降低了从晶片100的正面侧到背面侧的电阻。
作为研磨的供选择的替代物，可通过抛光或腐蚀晶片的背面侧，使晶片100变薄。
然后，最好使用锥形锯，沿Y划线108从晶片100的背面侧进行切割，在切割的位置上保留约1密耳厚度的硅。用W1表示锯切的切口。接着，利用已知的硅腐蚀剂腐蚀保留的硅厚度，露出延伸至Y划线108区域中的第一金属层209的部分。在这种情况下，最先露出钛子层202。切割未完全延伸过第一金属层209达到附着层210和顶盖212。所获得的结构如图7A和7B所示。
将由聚酰亚胺、PSG、非导电性环氧树脂或其它非导电性材料构成的绝缘层214淀积在晶片100的背面侧上。通过旋转涂敷、分散(dispensing)或丝网印刷，可以淀积绝缘层214，并且其厚度可以达到1密耳。如图8A和8B所示，利用普通的光刻和腐蚀技术，掩模和腐蚀绝缘层214，以便除去覆盖在第一金属层209上的绝缘层214的部分和晶片100的背面侧部分。
在一些实施例中，实际上，如果利用绝缘层(例如，钝化层)已经覆盖在背向顶盖的晶片侧面上，那么可以省略绝缘层的淀积。
然后，将钛子层216溅射在晶片100的背面侧上，把铝子层218溅射在钛子层216上。例如，钛子层216可以厚500牛
Figure C9912612300151
浐磷硬
Figure C9912612300152
218可以厚3μm。然后，采用普通的光刻和腐蚀方法，掩模和腐蚀子层216和218，以便保留图9A和图9B所示的子层216和218的部分。在划线区域108中子层216、218的部分216G、218G与第一金属层209接触，并利用第一金属层209，部分216G、218G与栅极连接焊盘106G电接触。在划线区域108中子层216、218的部分216S、218S与第一金属层209接触，并利用第一金属层209与源极连接焊盘106S电接触。子层216、218的部分216D、218D与表示MOSFET漏极引出线的芯片100A和100B的背面侧接触。部分216G、218G和部分216S、218S以及216D、218D彼此电绝缘。
然后，将10μm的镍子层220化学镀敷在铝子层218G、218S和218D的上表面上，把0.1μm金子层222镀敷在镍子层220上。所获得的结构如图10A和图10B所示，子层220和222的部分220G和222G分别覆盖在部分216G、218G上；子层220和222的部分220S和222S分别覆盖在部分216S、218S上；子层220和222的部分220D和222D分别覆盖在部分216D、218D上。
在各管芯100A和100B中的子层216、218、220和222一起形成第二金属层223。在其它实施例中，第二金属层223可以包括少于或多于四个的子层，可以通过任何已知的方法来淀积子层，例如溅射、蒸发、化学镀敷或电解镀敷或丝网印刷。其中子层216、218、220和222有时统称为“第二金属层223”。
如图11A和图11B所示，在第二金属层224上丝网印刷焊膏，然后进行回流，形成焊台224G、224S和224D。焊台可以厚4-5密耳。焊膏224G、224S和224D彼此电绝缘。可以使用焊球、柱或层代替焊台。
最后，如图12A和图12B所示，通过沿Y划线108，最好是与第一次切割相同的方向，从管芯的背面侧至正面侧锯切顶盖212来分割开管芯100A和100B。切割的切口(W2)小于W1，以致伸入划线区域的第一金属层209的部分和第二金属层223的部分保留在原位。还沿X划线110分割管芯。作为锯切的替代方法，可以采用其它公知的方法切割顶盖212，例如光刻构图和腐蚀。
图13表示所获得的包括管芯100A的半导体封装226的剖面图。封装226与管芯100A上的顶盖212A取向一致。如图所示，顶盖212A有宽度X1。把管芯100A附着于顶盖212A上，此时管芯100A的正面侧面向顶盖212A和管芯100A的背面侧背向顶盖212A。管芯100A的宽度X2小于X1。连接焊盘106G与管芯100A内的半导体器件电接触。栅极金属层102G和栅极连接焊盘106G位于管芯100A和顶盖212A之间。第一金属层209与栅极连接焊盘106G电接触。第一金属层209的第一部分209A位于栅极金属层102G和顶盖212A之间，而第一金属层209的第二部分209B横向延伸过栅极金属层102G的边缘。第二金属层223有第一部分223A和第二部分223B。第二金属层223的第一部分223A在超过管芯100A边缘的位置上与第一金属层209的第二部分209B接触，并通过绝缘层214与管芯100A的背面侧绝缘。第二金属层223的第一部分223A还包括沿管芯100A的边缘按倾斜角延伸的倾斜部分223X。第二金属层223的第二部分223B与管芯100A的背面侧电接触。
显然，第一金属层209终止于第一“凸缘”209F中，该凸缘延伸过管芯100A的边缘，第二金属层沿管芯100A的边缘延伸，并终止于超过管芯100A边缘的第二“凸缘”223F中，第一凸缘209F和第二凸缘223F彼此接触，并在平行于管芯100A侧面的方向上从管芯100A向外纵向延伸。
封装226可以被容易地安装在例如使用焊台224G和224D的PCB上。在图13中未示出焊台224S，但它也应该连接在PCB上，以便MOSFET的源极、栅极和漏极引出线可以连接在外部电路上。漏极引出线在管芯100A的背面侧上，通过第二金属层223的部分223B进行电连接。如图所示，封装226不包含引线键合，可以使用整个晶片按批处理进行制造。
图14表示使用焊球230代替焊台的半导体封装的实施例。通过淀积和回流焊膏或通过其它方法，例如丝网印刷或焊料喷射(例如使用可从PacTech GmbH，Am Schlangenhorst 15-17，14641 Nauen，Germany购置的设备)，或利用可从Shibuya Kogyo Co.，Ltd.，Mameda-Honmachi，Kanazawa 920-8681，Japan购置的晶片级焊球安装机，可以按普通方式施加焊球。导电性聚合物凸点是另一供选择的替代物，使用例如热固性聚合物、B态粘接剂或热塑性聚合物。
尽管已经说明了本发明的特定实施例，但所述实施例用以展示本发明而非限定性的。本领域的技术人员显然可知，在本发明的宽广范围内可以有许多变形实施例。

Claims (71)

1.一种制造半导体器件封装的方法，包括：
配置半导体晶片，该半导体晶片有正面侧和背面侧并包括由划线分开的多个管芯，各管芯包括半导体器件，各管芯正面侧的表面包括钝化层和至少一个与半导体器件接触的连接焊盘，其中第一方向上的第一组划线具有第一宽度，在垂直于该第一方向的第二方向上的第二组划线具有比该第一宽度小的第二宽度；
形成与至少一个连接焊盘电接触的第一金属层，第一金属层的一部分横向延伸过管芯的边缘进入第一组划线的区域；
把顶盖粘附于晶片的正面侧上；
在第一组划线的区域中而非第二组划线的区域中从晶片背面侧切穿半导体晶片，形成第一次切割，第一次切割有第一切口W1，并露出第一金属层的一部分，其中该第一切口W1大于该第二宽度；
在管芯背面侧的至少一部分上形成非导电层；
形成第二金属层，第二金属层与第一金属层电接触，并有在非导电层上延伸的第一部分；和
在第一组划线的区域中切穿顶盖，形成第二次切割，第二次切割的切口W2小于第一次切口W1，第二次切割保留在第一和第二金属层之间进行接触的区域。
2.如权利要求1的方法，其中，半导体器件为MOSFET，管芯的正面侧包括源极连接焊盘和栅极连接焊盘，第一金属层的源极部分与源极连接焊盘接触，第一金属层的栅极部分与栅极连接焊盘接触，第一金属层的源极部分和栅极部分彼此电绝缘，第二金属层的第一部分与第一金属层的源极部分接触，第二金属层包括与第一金属层的栅极部分接触的第二部分和与管芯背面侧上漏极引出线接触的第三部分，第二金属层的第一、第二和第三部分彼此电绝缘。
3.如权利要求1的方法，其中，形成第一金属层包括溅射第一金属子层和在第一金属子层上溅射第二金属子层。
4.如权利要求3的方法，其中，第一金属子层包括钛，而第二金属子层包括铝。
5.如权利要求4的方法，其中，形成第一金属层包括在第二金属子层上镀敷第三金属子层。
6.如权利要求5的方法，其中，第三金属子层包括镍。
7.如权利要求6的方法，其中，形成第一金属层包括在第三金属子层上镀敷第四金属子层。
8.如权利要求7的方法，其中，第四金属子层包括金。
9.如权利要求1的方法，其中，由从玻璃、塑料、铝和铜组成的组中选择的材料来构成顶盖。
10.如权利要求1的方法，其中，将顶盖附着于晶片的正面侧上包括用非导电性粘接剂粘附顶盖。
11.如权利要求1的方法，还包括在把顶盖附着于晶片的正面侧后，使半导体晶片变薄。
12.如权利要求11的方法，其中，使半导体晶片变薄包括研磨晶片的背面侧。
13.如权利要求11的方法，其中，使半导体晶片变薄包括抛光晶片的背面侧。
14.如权利要求11的方法，其中，使半导体晶片变薄包括腐蚀晶片的背面侧。
15.如权利要求11的方法，其中，使晶片变薄包括在不损害晶片内半导体器件内部微结构的情况下使晶片尽量变薄。
16.如权利要求1的方法，其中，从晶片的背面侧切穿半导体晶片包括用锥形锯切割和腐蚀。
17.如权利要求1的方法，其中，第一次切割未完全延伸穿过第一金属层。
18.如权利要求1的方法，其中，在管芯的背面侧上形成非导电层，包括：
淀积非导电性材料层；
在非导电性材料层上淀积掩模层；
除去一部分掩模层，以便在掩模层中形成开口，该开口在管芯背面侧的第二部分和因第一次切割露出的一部分第一金属层上；和
通过掩模层中的开口腐蚀非导电材料层。
19.如权利要求1的方法，其中，在管芯背面侧上形成非导电层包括丝网印刷。
20.如权利要求1的方法，其中，形成第二金属层包括溅射第一金属子层和在第一金属子层上溅射第二金属子层。
21.如权利要求20的方法，其中，第一金属子层包括钛，第二金属子层包括铝。
22.如权利要求21的方法，其中，形成第二金属子层包括在第二金属子层上镀敷第三金属子层。
23.如权利要求22的方法，其中，第三金属子层包括镍。
24.如权利要求23的方法，其中，形成第二金属层包括在第三金属子层上镀敷第四金属子层。
25.如权利要求24的方法，其中，第四金属子层包括金。
26.如权利要求1的方法，还包括在第二金属层的至少一部分上形成至少一个焊台。
27.如权利要求1的方法，还包括在第二金属层的至少一部分上形成至少一个焊球。
28.如权利要求27的方法，其中，形成至少一个焊球包括丝网印刷。
29.如权利要求27的方法，其中，形成至少一个焊球包括焊料喷射。
30.如权利要求1的方法，还包括在第二金属层的至少一部分上形成至少一个导电性聚合物球。
31.如权利要求1的方法，其中，切穿顶盖包括锯切。
32.如权利要求1的方法，其中，切穿顶盖包括光刻构图和腐蚀。
33.如权利要求1的方法，还包括在第二组划线的区域内切穿晶片和顶盖，形成具有第二切口W2的第三次切割，从而分割开芯片。
34.如权利要求33的方法，其中，第一切口W1基本上等于第一宽度，且第二切口W2基本上等于第二宽度。
35.如权利要求1的方法，其中，半导体器件包括MOSFET。
36.如权利要求1的方法，其中，半导体器件包括二极管。
37.如权利要求1的方法，其中，半导体器件包括JFET。
38.如权利要求1的方法，其中，半导体器件包括双极晶体管。
39.如权利要求1的方法，其中，半导体器件包括IC。
40.一种制造功率MOSFET封装的方法，包括：
配置半导体晶片，该半导体晶片有正面侧和背面侧并包括由划线分开的多个管芯，各管芯包括功率MOSFET，管芯的正面侧表面包括钝化层、栅极连接焊盘和源极连接焊盘，管芯的背面侧包括漏极引出线，其中第一方向上的第一组划线具有第一宽度，在垂直于该第一方向的第二方向上的第二组划线具有比该第一宽度小的第二宽度；
形成与栅极连接焊盘电接触的正面侧栅极金属层，正面侧栅极金属层的一部分横向延伸过管芯的边缘进入第一组划线的区域；
形成与源极连接焊盘电接触的正面侧源极金属层，一部分正面侧源极金属层横向延伸过管芯的边缘进入第一组划线的区域，正面侧栅极金属层和正面侧源极金属层彼此电绝缘；
把顶盖附着在晶片的正面侧上；
在第一组划线的区域中而非第二组划线的区域中从晶片的背面侧切穿半导体晶片，形成第一次切割，第一次切割有第一切口W1并露出一部分正面侧栅极金属层和正面侧源极金属层，其中第一切口W1大于第二宽度；
在一部分管芯背面侧上形成非导电层，非导电层保留MOSFET的正面侧栅极金属层的未覆盖的露出部分、正面侧源极金属层的露出部分和漏极引出线的露出部分；
形成背面侧栅极金属层，背面侧栅极金属层在非导电层上延伸，并在接触的第一区域中与正面侧栅极金属层电接触；
形成背面侧源极金属层，背面侧源极金属层在非导电层上延伸，并在接触的第二区域中与正面侧源极金属层电接触；
在管芯背面侧上形成与MOSFET的漏极引出线电接触的背面侧漏极金属层；
在第一组划线的区域中切穿顶盖，形成第二次切割，第二次切割有小于第一切口W1的第二切口W2，第二次切割保留接触的第一和第二区域位置；和
在垂直于第一次切割和第二次切割的方向上切穿晶片和顶盖，分割开管芯。
41.如权利要求40的方法，其中，第一次切割不完全延伸过第一金属层和第二金属层。
42.一种在半导体管芯的第一侧面上的第一位置与半导体管芯第二侧面上的第二位置之间进行电连接的方法，在管芯是半导体晶片的一部分时实施该方法，管芯由划线分隔开，其中第一方向上的第一组划线具有第一宽度，在垂直于该第一方向的第二方向上的第二组划线具有比该第一宽度小的第二宽度，该方法包括：
形成第一金属层，第一金属层从管芯的第一侧面上的第一位置横向延伸到超过管芯边缘的晶片区域从而进入第一组划线的区域；
把顶盖附着在晶片的第一侧面上；
在第一组划线的区域中而非第二组划线的区域中从晶片的第二侧面切穿半导体晶片，露出一部分第一金属层；
形成第二金属层，第二金属层从管芯的第二侧面上的第二位置沿管芯的边缘横向延伸到超过管芯边缘且与第一金属层接触的区域；和
在第一组划线的区域中切穿顶盖，完整无缺地保留第一和第二金属层之间的接触区域。
43.如权利要求42的方法，包括与管芯的第二侧面的至少一部分相邻地形成非导电层，其中，一部分第二金属层位于非导电层上。
44.如权利要求42的方法，其中，切穿半导体晶片包括腐蚀半导体晶片，露出一部分第一金属层。
45.一种半导体器件的封装，包括：
包含半导体器件的半导体管芯，管芯的正面侧包括与半导体器件的至少一个引出线电接触的至少一个连接焊盘，其中管芯包括彼此垂直的第一边缘和第二边缘；
被附着于管芯正面侧上的顶盖；
与连接焊盘电接触的第一金属层，第一金属层的第一部分位于管芯与顶盖之间，第一金属层的第二部分横向延伸过管芯的第一边缘；和
邻接一部分管芯背面侧的非导电层；和
包括第一部分的第二金属层，在超过管芯第一边缘的位置处第二金属层的第一部分与第一金属层的第二部分电接触，并在管芯第一边缘周围延伸至邻接管芯背面侧上非导电层的位置处。
46.如权利要求45的封装，其中，在不损伤半导体器件内部微结构的情况下，使管芯尽量变薄。
47.如权利要求45的封装，其中，第二金属层的第一部分包括邻接管芯边缘的倾斜部分。
48.如权利要求45的封装，其中，第一金属层包括多个子层。
49.如权利要求45的封装，其中，第一金属层包括至少一个溅射的子层。
50.如权利要求45的封装，其中，第一金属层包括至少一个镀敷的子层。
51.如权利要求45的封装，其中，第二金属层包括多个子层。
52.如权利要求45的封装，其中，第二金属层包括至少一个溅射的子层。
53.如权利要求45的封装，其中，第二金属层包括至少一个镀敷的子层。
54.如权利要求45的封装，其中，第二金属层包括与管芯背面侧上半导体器件的第二引出线电接触的第二部分，第二金属层的第二部分与第二金属层的第一部分电绝缘。
55.如权利要求45的封装，至少包括与第二金属层的第一部分接触的第一焊台，和与第二金属层的第二部分接触的第二焊台。
56.如权利要求45的封装，至少包括与第二金属层的第一部分接触的第一焊球，和与第二金属层的第二部分接触的第二焊球。。
57.如权利要求45的封装，至少包括与第一金属层接触的第一导电性聚合物球和与第二金属层接触的第二导电性聚合物球。
58.如权利要求45的封装，其中，顶盖的边缘横向延伸过管芯的边缘。
59.如权利要求45的封装，其中，顶盖有宽度X1，管芯有宽度X2，而X1大于X2。
60.如权利要求45的封装，其中，管芯包括垂直功率MOSFET。
61.如权利要求45的封装，其中，管芯包括二极管。
62.如权利要求45的封装，其中，管芯包括双极晶体管。
63.如权利要求45的封装，其中，管芯包括JFET。
64.如权利要求45的封装，其中，管芯包括IC。
65.一种MOSFET的封装，包括：
包含MOSFET并有宽度X2的半导体管芯，管芯的正面侧包括与源极引出线电接触的源极连接焊盘，与栅极引出线电接触的栅极连接焊盘，管芯的背面侧包括漏极引出线，其中管芯包括彼此垂直的第一边缘和第二边缘；
顶盖，有大于宽度X2的宽度X1，被附着于管芯的正面侧上；
与源极连接焊盘电接触的第一源极金属层，第一源极金属层的第一部分位于管芯和顶盖之间，第一源极金属层的第二部分横向延伸过管芯的第一边缘；
与栅极连接焊盘电接触的第一栅极金属层，第一栅极金属层的第一部分位于管芯和顶盖之间，第一栅极金属层的第二部分横向延伸过管芯的第一边缘；
邻接管芯背面侧一部分的非导电层；和
在超过管芯第一边缘的位置上与第一源极金属层的第二部分电接触的第二源极金属层，并在管芯第一边缘周围延伸至管芯背面侧上邻接非导电层的位置；
在超过管芯第一边缘的位置上与第一栅极金属层的第二部分电接触的第二栅极金属层，并在管芯第一边缘周围延伸至管芯背面侧上邻接非导电层的位置，第一和第二源极金属层与第一和第二栅极金属层电绝缘；和
与漏极引出线电接触的管芯背面侧上的漏极金属层。
66.如权利要求65的封装，还包括与第二源极金属层接触的至少一个焊台，与第二栅极金属层接触的至少一个焊台，和与漏极金属层接触的至少一个焊台。
67.如权利要求65的封装，还包括与第二源极金属层接触的至少一个焊球，与第二栅极金属层接触的至少一个焊球，和与漏极金属层接触的至少一个焊球。
68.如权利要求65的封装，还包括与第二源极金属层接触的至少一个导电聚合物球，与第二栅极金属层接触的至少一个导电聚合物球，和与漏极金属层接触的至少一个导电聚合物球。
69.一种半导体器件的封装，包括：
包含半导体器件的半导体管芯，管芯的第一侧面包括连接焊盘，其中管芯包括彼此垂直的第一边缘和第二边缘；
附着在管芯第一侧面上的顶盖；
与连接焊盘电接触的第一金属层，第一金属层横向延伸，并终止在超过管芯第一边缘的第一凸缘上；和
第二金属层，从管芯的第二侧面并沿管芯的边缘延伸过管芯的第一边缘然后终止在第二凸缘上，第二凸缘与第一凸缘接触。
70.如权利要求69的封装，其中，顶盖的边缘横向延伸过管芯的边缘。
71.如权利要求69的封装，其中，第一和第二凸缘在平行于管芯侧面的方向上从管芯向外纵向延伸。
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