CN1272846C - 在半导体装置中形成金属线的方法 - Google Patents
在半导体装置中形成金属线的方法 Download PDFInfo
- Publication number
- CN1272846C CN1272846C CNB2003101247412A CN200310124741A CN1272846C CN 1272846 C CN1272846 C CN 1272846C CN B2003101247412 A CNB2003101247412 A CN B2003101247412A CN 200310124741 A CN200310124741 A CN 200310124741A CN 1272846 C CN1272846 C CN 1272846C
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- Prior art keywords
- gas
- insulating film
- aperture unit
- interlayer insulating
- forming
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- 238000000034 method Methods 0.000 title claims abstract description 96
- 239000004065 semiconductor Substances 0.000 title claims abstract description 32
- 239000002184 metal Substances 0.000 title claims abstract description 15
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 15
- 230000008569 process Effects 0.000 claims abstract description 68
- 238000004140 cleaning Methods 0.000 claims abstract description 39
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 238000000137 annealing Methods 0.000 claims abstract description 13
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000001257 hydrogen Substances 0.000 claims abstract description 10
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 10
- 238000006722 reduction reaction Methods 0.000 claims abstract description 10
- 238000011065 in-situ storage Methods 0.000 claims abstract description 9
- 238000001816 cooling Methods 0.000 claims abstract description 7
- 229920000642 polymer Polymers 0.000 claims abstract description 4
- 239000004020 conductor Substances 0.000 claims abstract description 3
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 3
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 3
- 238000000059 patterning Methods 0.000 claims abstract description 3
- 239000007789 gas Substances 0.000 claims description 41
- 239000011229 interlayer Substances 0.000 claims description 39
- 239000010949 copper Substances 0.000 claims description 20
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 14
- 229910052802 copper Inorganic materials 0.000 claims description 14
- 238000005530 etching Methods 0.000 claims description 10
- 230000009977 dual effect Effects 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 6
- 239000010410 layer Substances 0.000 claims description 5
- 230000004888 barrier function Effects 0.000 claims description 4
- 238000009713 electroplating Methods 0.000 claims description 4
- 238000000280 densification Methods 0.000 claims description 3
- 239000010408 film Substances 0.000 description 64
- 238000006243 chemical reaction Methods 0.000 description 10
- 229920002120 photoresistant polymer Polymers 0.000 description 8
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 5
- 229910052799 carbon Inorganic materials 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 235000012431 wafers Nutrition 0.000 description 5
- 230000006866 deterioration Effects 0.000 description 4
- 230000009467 reduction Effects 0.000 description 4
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 2
- 239000005751 Copper oxide Substances 0.000 description 2
- 229910000431 copper oxide Inorganic materials 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000000053 physical method Methods 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 230000003685 thermal hair damage Effects 0.000 description 2
- 229910020177 SiOF Inorganic materials 0.000 description 1
- 229910020175 SiOH Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000006117 anti-reflective coating Substances 0.000 description 1
- 230000003667 anti-reflective effect Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000013039 cover film Substances 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 229910021426 porous silicon Inorganic materials 0.000 description 1
- 238000010926 purge Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/76808—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02046—Dry cleaning only
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/905—Cleaning of reaction chamber
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (11)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR85499/2002 | 2002-12-27 | ||
KR10-2002-0085499A KR100483594B1 (ko) | 2002-12-27 | 2002-12-27 | 반도체 소자의 금속배선 형성방법 |
KR85499/02 | 2002-12-27 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1516264A CN1516264A (zh) | 2004-07-28 |
CN1272846C true CN1272846C (zh) | 2006-08-30 |
Family
ID=32653175
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2003101247412A Expired - Fee Related CN1272846C (zh) | 2002-12-27 | 2003-12-26 | 在半导体装置中形成金属线的方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US6825124B2 (zh) |
KR (1) | KR100483594B1 (zh) |
CN (1) | CN1272846C (zh) |
TW (1) | TWI321346B (zh) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7109111B2 (en) * | 2002-02-11 | 2006-09-19 | Applied Materials, Inc. | Method of annealing metal layers |
US7030023B2 (en) * | 2003-09-04 | 2006-04-18 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for simultaneous degas and baking in copper damascene process |
KR20060076437A (ko) * | 2004-12-29 | 2006-07-04 | 동부일렉트로닉스 주식회사 | 반도체 소자의 콘택홀 형성방법 |
US20060148243A1 (en) * | 2004-12-30 | 2006-07-06 | Jeng-Ho Wang | Method for fabricating a dual damascene and polymer removal |
US7351656B2 (en) * | 2005-01-21 | 2008-04-01 | Kabushiki Kaihsa Toshiba | Semiconductor device having oxidized metal film and manufacture method of the same |
KR100652317B1 (ko) * | 2005-08-11 | 2006-11-29 | 동부일렉트로닉스 주식회사 | 반도체 소자의 금속 패드 제조 방법 |
KR100672731B1 (ko) * | 2005-10-04 | 2007-01-24 | 동부일렉트로닉스 주식회사 | 반도체 소자의 금속배선 형성방법 |
KR100708529B1 (ko) * | 2005-12-14 | 2007-04-16 | 동부일렉트로닉스 주식회사 | 구리 배선 증착 방법 및 장치 |
KR101147529B1 (ko) * | 2005-12-21 | 2012-05-21 | 매그나칩 반도체 유한회사 | 반도체 소자의 금속배선 형성방법 |
KR100720487B1 (ko) * | 2005-12-28 | 2007-05-22 | 동부일렉트로닉스 주식회사 | 다마신 공정을 이용한 구리 금속 배선의 형성 방법 |
KR100790731B1 (ko) * | 2006-07-18 | 2008-01-02 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조 방법 |
CN100468695C (zh) * | 2006-12-04 | 2009-03-11 | 中芯国际集成电路制造(上海)有限公司 | 改善多晶硅缺陷的方法 |
CN101593724B (zh) * | 2008-05-30 | 2012-04-18 | 中芯国际集成电路制造(北京)有限公司 | 通孔形成方法 |
US8258010B2 (en) * | 2009-03-17 | 2012-09-04 | Stats Chippac, Ltd. | Making a semiconductor device having conductive through organic vias |
CN102693934B (zh) * | 2011-03-22 | 2014-07-02 | 中芯国际集成电路制造(上海)有限公司 | 互连结构的制作方法 |
CN102420174B (zh) * | 2011-06-07 | 2013-09-11 | 上海华力微电子有限公司 | 一种双大马士革工艺中通孔填充的方法 |
CN102364670B (zh) * | 2011-09-15 | 2013-06-12 | 上海华力微电子有限公司 | 金属铜大马士革互联结构的制造方法 |
CN103426751B (zh) * | 2012-05-14 | 2018-09-07 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构的形成方法 |
CN107574476A (zh) | 2013-08-09 | 2018-01-12 | 应用材料公司 | 于外延生长之前预清洁基板表面的方法和设备 |
CN105762107A (zh) * | 2014-12-18 | 2016-07-13 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构的形成方法 |
CN109427649B (zh) * | 2017-08-24 | 2020-09-08 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其形成方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5143820A (en) * | 1989-10-31 | 1992-09-01 | International Business Machines Corporation | Method for fabricating high circuit density, self-aligned metal linens to contact windows |
JPH0950986A (ja) * | 1995-05-29 | 1997-02-18 | Sony Corp | 接続孔の形成方法 |
US5935762A (en) * | 1997-10-14 | 1999-08-10 | Industrial Technology Research Institute | Two-layered TSI process for dual damascene patterning |
TW394989B (en) * | 1997-10-29 | 2000-06-21 | Matsushita Electronics Corp | Semiconductor device manufacturing and reaction room environment control method for dry etching device |
US6380096B2 (en) * | 1998-07-09 | 2002-04-30 | Applied Materials, Inc. | In-situ integrated oxide etch process particularly useful for copper dual damascene |
US6355571B1 (en) * | 1998-11-17 | 2002-03-12 | Applied Materials, Inc. | Method and apparatus for reducing copper oxidation and contamination in a semiconductor device |
US6126806A (en) | 1998-12-02 | 2000-10-03 | International Business Machines Corporation | Enhancing copper electromigration resistance with indium and oxygen lamination |
-
2002
- 2002-12-27 KR KR10-2002-0085499A patent/KR100483594B1/ko active IP Right Grant
-
2003
- 2003-07-14 TW TW092119134A patent/TWI321346B/zh not_active IP Right Cessation
- 2003-08-07 US US10/636,168 patent/US6825124B2/en not_active Expired - Lifetime
- 2003-12-26 CN CNB2003101247412A patent/CN1272846C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN1516264A (zh) | 2004-07-28 |
US20040127002A1 (en) | 2004-07-01 |
KR20040058977A (ko) | 2004-07-05 |
TW200411828A (en) | 2004-07-01 |
TWI321346B (en) | 2010-03-01 |
US6825124B2 (en) | 2004-11-30 |
KR100483594B1 (ko) | 2005-04-15 |
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Effective date of registration: 20201019 Address after: Han Guozhongqingbeidao Patentee after: Key Foundry Co.,Ltd. Address before: Han Guozhongqingbeidao Patentee before: Magnachip Semiconductor, Ltd. |
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