CN1256830A - 时钟恢复电路和具有时钟恢复电路的接收机 - Google Patents
时钟恢复电路和具有时钟恢复电路的接收机 Download PDFInfo
- Publication number
- CN1256830A CN1256830A CN99800170.8A CN99800170A CN1256830A CN 1256830 A CN1256830 A CN 1256830A CN 99800170 A CN99800170 A CN 99800170A CN 1256830 A CN1256830 A CN 1256830A
- Authority
- CN
- China
- Prior art keywords
- rising
- falling edges
- phase
- locked loop
- reference position
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000011084 recovery Methods 0.000 title claims abstract description 23
- 230000000630 rising effect Effects 0.000 claims abstract description 60
- 238000000034 method Methods 0.000 claims description 6
- 238000001914 filtration Methods 0.000 claims description 2
- 238000012986 modification Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 230000001360 synchronised effect Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000035945 sensitivity Effects 0.000 description 4
- 230000010363 phase shift Effects 0.000 description 3
- 230000033228 biological regulation Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 235000008331 Pinus X rigitaeda Nutrition 0.000 description 1
- 235000011613 Pinus brutia Nutrition 0.000 description 1
- 241000018646 Pinus brutia Species 0.000 description 1
- 230000003044 adaptive effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000011067 equilibration Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
Description
Claims (11)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GBGB9804045.4A GB9804045D0 (en) | 1998-02-26 | 1998-02-26 | Receiver |
GB9804045.4 | 1998-02-26 | ||
GBGB9820721.0A GB9820721D0 (en) | 1998-02-26 | 1998-09-24 | Receiver |
GB9820721.0 | 1998-09-24 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1256830A true CN1256830A (zh) | 2000-06-14 |
CN1227856C CN1227856C (zh) | 2005-11-16 |
Family
ID=26313184
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN99800170.8A Expired - Fee Related CN1227856C (zh) | 1998-02-26 | 1999-02-15 | 时钟恢复方法、时钟恢复电路和具有时钟恢复电路的接收机 |
Country Status (6)
Country | Link |
---|---|
US (1) | US6587531B1 (zh) |
EP (1) | EP0983659B1 (zh) |
JP (1) | JP4070823B2 (zh) |
CN (1) | CN1227856C (zh) |
TW (1) | TW417372B (zh) |
WO (1) | WO1999044327A2 (zh) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101060508B (zh) * | 2006-04-21 | 2010-12-08 | 阿尔卡特朗讯 | 解调信号的数据分割器电路、解调级、接收***和方法 |
CN108449300A (zh) * | 2018-03-16 | 2018-08-24 | 成都力合微电子有限公司 | 一种ofdm***帧同步方法 |
CN112385174A (zh) * | 2018-06-26 | 2021-02-19 | 美高森美半导体无限责任公司 | 具有状态机控制器的时钟恢复设备 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6711226B1 (en) * | 2000-05-12 | 2004-03-23 | Cypress Semiconductor Corp. | Linearized digital phase-locked loop |
GB2379027B (en) | 2001-08-02 | 2004-12-22 | Daidalos Inc | Pulse peak and/or trough detector |
US7049869B2 (en) * | 2003-09-02 | 2006-05-23 | Gennum Corporation | Adaptive lock position circuit |
US7826581B1 (en) | 2004-10-05 | 2010-11-02 | Cypress Semiconductor Corporation | Linearized digital phase-locked loop method for maintaining end of packet time linearity |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4734900A (en) * | 1986-04-25 | 1988-03-29 | International Business Machines Corporation | Restoring and clocking pulse width modulated data |
US4970609A (en) * | 1988-10-17 | 1990-11-13 | International Business Machines Corporation | Clocking method and apparatus for use with partial response coded binary data |
EP0500263A3 (en) | 1991-02-20 | 1993-06-09 | Research Machines Plc | Method for synchronising a receiver's data clock |
US5134637A (en) * | 1991-03-22 | 1992-07-28 | Motorola, Inc. | Clock recovery enhancement circuit |
US5208833A (en) * | 1991-04-08 | 1993-05-04 | Motorola, Inc. | Multi-level symbol synchronizer |
DE4231175C1 (de) | 1992-09-17 | 1994-01-13 | Siemens Ag | Anordnung zur Taktrückgewinnung |
US5539784A (en) * | 1994-09-30 | 1996-07-23 | At&T Corp. | Refined timing recovery circuit |
US5502711A (en) * | 1995-03-20 | 1996-03-26 | International Business Machines Corporation | Dual digital phase locked loop clock channel for optical recording |
US5943378A (en) * | 1996-08-01 | 1999-08-24 | Motorola, Inc. | Digital signal clock recovery |
JP2993559B2 (ja) * | 1997-03-31 | 1999-12-20 | 日本電気株式会社 | 位相同期回路 |
-
1999
- 1999-02-15 EP EP99901851A patent/EP0983659B1/en not_active Expired - Lifetime
- 1999-02-15 JP JP54332399A patent/JP4070823B2/ja not_active Expired - Fee Related
- 1999-02-15 WO PCT/IB1999/000264 patent/WO1999044327A2/en active IP Right Grant
- 1999-02-15 CN CN99800170.8A patent/CN1227856C/zh not_active Expired - Fee Related
- 1999-02-18 US US09/252,692 patent/US6587531B1/en not_active Expired - Lifetime
- 1999-02-24 TW TW088102730A patent/TW417372B/zh not_active IP Right Cessation
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101060508B (zh) * | 2006-04-21 | 2010-12-08 | 阿尔卡特朗讯 | 解调信号的数据分割器电路、解调级、接收***和方法 |
CN108449300A (zh) * | 2018-03-16 | 2018-08-24 | 成都力合微电子有限公司 | 一种ofdm***帧同步方法 |
CN108449300B (zh) * | 2018-03-16 | 2020-12-29 | 成都力合微电子有限公司 | 一种ofdm***帧同步方法 |
CN112385174A (zh) * | 2018-06-26 | 2021-02-19 | 美高森美半导体无限责任公司 | 具有状态机控制器的时钟恢复设备 |
CN112385174B (zh) * | 2018-06-26 | 2022-08-05 | 美高森美半导体无限责任公司 | 具有状态机控制器的时钟恢复设备 |
Also Published As
Publication number | Publication date |
---|---|
CN1227856C (zh) | 2005-11-16 |
WO1999044327A3 (en) | 1999-12-02 |
JP2001522577A (ja) | 2001-11-13 |
WO1999044327A2 (en) | 1999-09-02 |
TW417372B (en) | 2001-01-01 |
JP4070823B2 (ja) | 2008-04-02 |
EP0983659B1 (en) | 2011-10-05 |
EP0983659A2 (en) | 2000-03-08 |
US6587531B1 (en) | 2003-07-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: NXP CO., LTD. Free format text: FORMER OWNER: ROYAL PHILIPS ELECTRONICS CO., LTD. Effective date: 20070831 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20070831 Address after: Holland Ian Deho Finn Patentee after: Koninkl Philips Electronics NV Address before: Holland Ian Deho Finn Patentee before: Koninklike Philips Electronics N. V. |
|
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20051116 Termination date: 20130215 |