CN118160228A

CN118160228A - Electronic device including duplexer including filter having characteristics adaptively changeable according to state

Info

Publication number: CN118160228A
Application number: CN202280072062.6A
Authority: CN
Inventors: Y·文; 金兑泳; 罗孝锡; 梁东一
Original assignee: Samsung Electronics Co Ltd
Current assignee: Samsung Electronics Co Ltd
Priority date: 2021-10-29
Filing date: 2022-09-06
Publication date: 2024-06-07

Abstract

According to one embodiment, an electronic device may include: an antenna; a Radio Frequency Front End (RFFE) comprising a first diplexer comprising a first filter that passes a first signal and a second filter that passes a second signal and a fourth signal, and a second diplexer comprising a first filter that passes a third signal and a fifth signal and a second filter that passes a sixth signal; and at least one processor operatively connected to the RFFE.

Description

Electronic device including duplexer including filter having characteristics adaptively changeable according to state

Technical Field

Various example embodiments relate to an electronic device including a duplexer including a filter having characteristics adaptively changed according to a state.

Background

The electronic device may include a Radio Frequency Front End (RFFE) including a diplexer for supporting bi-directional communication via a single path. The diplexer may include a plurality of filters to separate signals transmitted through the antenna and signals received through the antenna from each other.

Disclosure of Invention

Technical solution

According to an example embodiment, an electronic device may include: an antenna; a Radio Frequency Front End (RFFE), the RFFE comprising: a first diplexer, the first diplexer comprising: a first filter that passes a first signal in an uplink frequency range of a first frequency band; and a second filter that passes a second signal in a downlink frequency range of the first frequency band and a fourth signal in a downlink frequency range of a second frequency band that partially overlaps the downlink frequency range of the first frequency band; and a second diplexer, the second diplexer comprising: a first filter that passes a third signal in an uplink frequency range of the second frequency band and a fifth signal in an uplink frequency range of a third frequency band; and a second filter that passes a sixth signal in a downlink frequency range of the third frequency band that is separate from the downlink frequency range of the first frequency band and that partially overlaps the downlink frequency range of the second frequency band; and at least one processor operatively coupled with the RFFE, wherein the at least one processor may be configured to change a cutoff frequency of the second filter in the first diplexer to a first frequency that cuts off the sixth signal in a portion of the third frequency band that partially overlaps the downlink frequency range of the second frequency band, or to change a cutoff frequency of the second filter in the second diplexer to a second frequency that cuts off the fourth signal in a portion of the second frequency band that partially overlaps the downlink frequency range of the third frequency band when both the first diplexer and the second diplexer are electrically connected with the antenna.

According to an example embodiment, an electronic device may include: an antenna; a Radio Frequency Front End (RFFE), the RFFE comprising: a switch; a first diplexer, the first diplexer comprising: a first filter that passes a first signal in an uplink frequency range of a first frequency band; and a second filter that passes a second signal in a downlink frequency range of the first frequency band and a fourth signal in a downlink frequency range of a second frequency band that partially overlaps the downlink frequency range of the first frequency band, and the first duplexer is connectable with the antenna via the switch; a second diplexer, the second diplexer comprising: a first filter that passes a third signal in an uplink frequency range of the second frequency band and a fifth signal in an uplink frequency range of a third frequency band; and a second filter that passes a sixth signal in a downlink frequency range of the third frequency band that is separate from the downlink frequency range of the first frequency band and partially overlaps the downlink frequency range of the second frequency band, and the second duplexer is connectable with the antenna via the switch; a first impedance matching circuit electrically connected to a first electrical path between the switch and the first diplexer; and a second impedance matching circuit electrically connected to a second electrical path between the switch and the second diplexer; and at least one processor operatively coupled with the RFFE, wherein the at least one processor may be configured to change a center frequency of the second filter in the first duplexer to a first frequency that cuts off the sixth signal in a portion of the third frequency band that partially overlaps the downlink frequency range of the second frequency band by using the first impedance matching circuit or to change a center frequency of the second filter in the second duplexer to a second frequency that cuts off the fourth signal in a portion of the second frequency band that partially overlaps the downlink frequency range of the third frequency band when both the first duplexer and the second duplexer are connected with the antenna via the switch.

According to an example embodiment, an electronic device may include: an antenna; a Radio Frequency Front End (RFFE), the RFFE comprising: a switch; a first diplexer, the first diplexer comprising: a first filter that passes a first signal in an uplink frequency range of a first frequency band; and a second filter that passes a second signal in a downlink frequency range of the first frequency band and a fourth signal in a downlink frequency range of a second frequency band that partially overlaps the downlink frequency range of the first frequency band, and the first duplexer is connectable with the antenna via the switch; a second diplexer, the second diplexer comprising: a first filter that passes a third signal in an uplink frequency range of the second frequency band and a fifth signal in an uplink frequency range of a third frequency band; and a second filter that passes a sixth signal in a downlink frequency range of the third frequency band that is separate from the downlink frequency range of the first frequency band and partially overlaps the downlink frequency range of the second frequency band, and the second duplexer is connectable with the antenna via the switch; a first impedance matching circuit electrically connected to a second filter in the first duplexer among the first filter in the first duplexer and the second filter in the first duplexer; and a second impedance matching circuit electrically connected to the first filter of the second diplexer and a second filter of the second diplexer among the first filter of the second diplexer; and at least one processor operably coupled with the RFFE, wherein the at least one processor may be configured to change characteristics of a filter among the second filter in the first duplexer and the second filter in the second duplexer by using an impedance matching circuit among the first impedance matching circuit and the second impedance matching circuit when both the first duplexer and the second duplexer are connected with the antenna via the switch.

Drawings

Fig. 1 is a block diagram of an electronic device in a network environment, according to various example embodiments.

Fig. 2 is a block diagram of an electronic device for supporting legacy network communications and 5G network communications, according to various example embodiments.

Fig. 3 is a simplified block diagram of an electronic device according to an example embodiment.

Fig. 4 is a graph showing the pass band of each of the filters in the diplexer in the RFFE of the electronic device according to an example embodiment.

Fig. 5a and 5b illustrate examples of connection relations between a filter in each of diplexers of a Radio Frequency Front End (RFFE) of an electronic device and an impedance matching circuit of the RFFE according to example embodiments.

Fig. 6 shows an example of an impedance matching circuit of an RFFE in a control electronics according to an example embodiment.

Fig. 7 is a graph showing the pass band of a filter changed based on the control of the impedance matching circuit of the RFFE of the electronic device according to an example embodiment.

Fig. 8 shows an example of another impedance matching circuit of an RFFE in a control electronics according to an example embodiment.

Fig. 9 is a graph showing the pass band of a filter changed based on control of another impedance matching circuit of RFFE in an electronic device according to an example embodiment.

Fig. 10 illustrates an example of a state of RFFE in an electronic device when transmitting and receiving signals via an E-UTRA new radio dual connection (EN-DC), according to an example embodiment.

Fig. 11 shows an example of the pass band of each of the filters in the diplexer that holds the RFFE of the electronic device according to an example embodiment.

Fig. 12 shows another example of the pass band of each of the filters in the diplexer that holds the RFFE of the electronic device according to an example embodiment.

Detailed Description

Fig. 1 is a block diagram illustrating an electronic device 101 in a network environment 100 according to various example embodiments.

Referring to fig. 1, an electronic device 101 in a network environment 100 may communicate with the electronic device 102 via a first network 198 (e.g., a short-range wireless communication network) or with at least one of the electronic device 104 or the server 108 via a second network 199 (e.g., a long-range wireless communication network). According to an embodiment, the electronic device 101 may communicate with the electronic device 104 via the server 108. According to an embodiment, the electronic device 101 may include a processor 120, a memory 130, an input module 150, a sound output module 155, a display module 160, an audio module 170, a sensor module 176, an interface 177, a connection 178, a haptic module 179, a camera module 180, a power management module 188, a battery 189, a communication module 190, a Subscriber Identity Module (SIM) 196, or an antenna module 197. In some embodiments, at least one of the above-described components (e.g., connection end 178) may be omitted from electronic device 101, or one or more other components may be added to electronic device 101. In some example embodiments, some of the components (e.g., sensor module 176, camera module 180, or antenna module 197) may be implemented as a single component (e.g., display module 160). Each "module" herein may include circuitry.

The processor 120 may run, for example, software (e.g., program 140) to control at least one other component (e.g., hardware or software component) of the electronic device 101 connected to the processor 120, and may perform various data processing or calculations. According to one embodiment, as at least part of the data processing or calculation, the processor 120 may store commands or data received from another component (e.g., the sensor module 176 or the communication module 190) into the volatile memory 132, process the commands or data stored in the volatile memory 132, and store the resulting data in the non-volatile memory 134 (which may include the internal memory 136 and the external memory 138). According to an embodiment, the processor 120 may include a main processor 121 (e.g., a Central Processing Unit (CPU) or an Application Processor (AP)) or an auxiliary processor 123 (e.g., a Graphics Processing Unit (GPU), a Neural Processing Unit (NPU), an Image Signal Processor (ISP), a sensor hub processor, or a Communication Processor (CP)) that is operatively independent of or combined with the main processor 121. For example, when the electronic device 101 comprises a main processor 121 and a secondary processor 123, the secondary processor 123 may be adapted to consume less power than the main processor 121 or to be dedicated to a particular function. The auxiliary processor 123 may be implemented separately from the main processor 121 or as part of the main processor 121. Each processing unit herein preferably includes at least one processor.

Each processor herein includes processing circuitry.

The auxiliary processor 123 (instead of the main processor 121) may control at least some of the functions or states associated with at least one of the components of the electronic device 101 (e.g., the display module 160 including a display, the sensor module 176 including at least one sensor, or the communication module 190 including communication circuitry) while the main processor 121 is in an inactive (e.g., sleep) state, or may control at least some of the functions or states with the main processor 121 while the main processor 121 is in an active state (e.g., running an application). According to an embodiment, the auxiliary processor 123 (e.g., an image signal processor or a communication processor) may be implemented as part of another component (e.g., the camera module 180 or the communication module 190) functionally related to the auxiliary processor 123. According to an embodiment, the auxiliary processor 123 (e.g., a neural processing unit) may include hardware structures dedicated to artificial intelligence model processing. The artificial intelligence model may be generated through machine learning. Such learning may be performed, for example, by electronic device #01 where artificial intelligence is performed or via a separate server (e.g., server 108). The learning algorithm may include, but is not limited to, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning. The artificial intelligence model may include a plurality of artificial neural network layers. The artificial neural network may be a Deep Neural Network (DNN), a Convolutional Neural Network (CNN), a Recurrent Neural Network (RNN), a boltzmann machine limited (RBM), a Deep Belief Network (DBN), a bi-directional recurrent deep neural network (BRDNN), a deep Q network, or a combination of two or more thereof, but is not limited thereto. Additionally or alternatively, the artificial intelligence model may include software structures in addition to hardware structures.

The memory 130 may store various data used by at least one component of the electronic device 101 (e.g., the processor 120 or the sensor module 176). The various data may include, for example, software (e.g., program 140) and input data or output data for commands associated therewith. Memory 130 may include volatile memory 132 or nonvolatile memory 134.

The program 140 may be stored as software in the memory 130, and the program 140 may include, for example, an Operating System (OS) 142, middleware 144, or applications 146.

The input module 150 may receive commands or data from outside the electronic device 101 (e.g., a user) to be used by other components of the electronic device 101 (e.g., the processor 120). The input module 150 may include, for example, a microphone, a mouse, a keyboard, keys (e.g., buttons) or a digital pen (e.g., a stylus).

The sound output module 155 may output a sound signal to the outside of the electronic device 101. The sound output module 155 may include, for example, a speaker or a receiver. Speakers may be used for general purposes such as playing multimedia or playing a record. The receiver may be used to receive an incoming call. Depending on the embodiment, the receiver may be implemented separate from the speaker or as part of the speaker.

The display module 160 may visually provide information to the outside (e.g., user) of the electronic device 101. The display module 160 may include, for example, a display, a holographic device, or a projector, and a control circuit for controlling a corresponding one of the display, the holographic device, and the projector. According to an embodiment, the display module 160 may comprise a touch sensor adapted to detect a touch or a pressure sensor adapted to measure the strength of the force caused by a touch.

The audio module 170 may convert sound into electrical signals and vice versa. According to an embodiment, the audio module 170 may obtain sound via the input module 150, or output sound via the sound output module 155 or headphones of an external electronic device (e.g., the electronic device 102) that is directly (e.g., wired) or wirelessly connected to the electronic device 101.

The sensor module 176 may detect an operational state (e.g., power or temperature) of the electronic device 101 or an environmental state (e.g., a state of a user) external to the electronic device 101 and then generate an electrical signal or data value corresponding to the detected state. According to an embodiment, the sensor module 176 may include, for example, a gesture sensor, a gyroscope sensor, an atmospheric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an Infrared (IR) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or a brightness sensor.

Interface 177 may support one or more specific protocols that will be used to connect electronic device 101 directly (e.g., wired) or wirelessly with an external electronic device (e.g., electronic device 102). According to an embodiment, interface 177 may include, for example, a High Definition Multimedia Interface (HDMI), a Universal Serial Bus (USB) interface, a Secure Digital (SD) card interface, or an audio interface.

The connection end 178 may include a connector via which the electronic device 101 may be physically connected with an external electronic device (e.g., the electronic device 102). According to an embodiment, the connection end 178 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

The haptic module 179 may convert the electrical signal into a mechanical stimulus (e.g., vibration or motion) or an electrical stimulus that can be recognized by the user via his sense of touch or kinesthetic sense. According to an embodiment, the haptic module 179 may include, for example, a motor, a piezoelectric element, or an electrostimulator.

The camera module 180 may capture still images or moving images. According to an embodiment, the camera module 180 may include one or more lenses, an image sensor, an image signal processor, or a flash.

The power management module 188 may manage power supply to the electronic device 101. According to one embodiment, the power management module 188 may be implemented as at least part of, for example, a Power Management Integrated Circuit (PMIC).

Battery 189 may supply power to at least one component of electronic device 101. Depending on the embodiment, battery 189 may include, for example, a primary non-rechargeable battery, a rechargeable battery, or a fuel cell.

The communication module 190 may support establishing a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device 101 and an external electronic device (e.g., the electronic device 102, the electronic device 104, or the server 108) and performing communication via the established communication channel. The communication module 190 may include one or more communication processors (e.g., application Processors (APs)) operating independently of the processor 120 and supporting direct (e.g., wired) or wireless communication. According to an embodiment, the communication module 190 may include a wireless communication module 192 (e.g., a cellular communication module, a short-range wireless communication module, or a Global Navigation Satellite System (GNSS) communication module) or a wired communication module 194 (e.g., a Local Area Network (LAN) communication module or a Power Line Communication (PLC) module). A respective one of these communication modules may communicate with external electronic devices via a first network 198 (e.g., a short-range communication network such as bluetooth, wireless fidelity (Wi-Fi) direct, or infrared data association (IrDA)) or a second network 199 (e.g., a long-range communication network such as a conventional cellular network, a 5G network, a next-generation communication network, the internet, or a computer network (e.g., a LAN or Wide Area Network (WAN)). These various types of communication modules may be implemented as a single component (e.g., a single chip), or may be implemented as multiple components (e.g., multiple chips) separate from each other. The wireless communication module 192 may identify and authenticate the electronic device 101 in a communication network, such as the first network 198 or the second network 199, using user information (e.g., an International Mobile Subscriber Identity (IMSI)) stored in the user identification module 196.

The wireless communication module 192 may support next generation communication technologies (e.g., new Radio (NR) access technologies) following a 4G network, NR access technologies may support various requirements specified in the electronic device 101, an external electronic device (e.g., electronic device 104), or a network system (e.g., second network 199). The wireless communication module 192 may support a high frequency band (e.g., millimeter-wave band) to achieve, for example, a high data transmission rate, the wireless communication module 192 may support various technologies for ensuring performance on the high frequency band, such as beamforming, massive multiple-input multiple-output (massive MIMO), full-dimensional MIMO (FD-MIMO), array antennas, analog beamforming, or large antennas.

The antenna module 197 may transmit or receive signals or power to or from the outside of the electronic device 101 (e.g., an external electronic device). According to an embodiment, the antenna module 197 may include an antenna including a radiating element composed of a conductive material or conductive pattern formed in or on a substrate, such as a Printed Circuit Board (PCB). According to an embodiment, the antenna module 197 may include a plurality of antennas (e.g., array antennas). In this case, at least one antenna suitable for a communication scheme used in a communication network, such as the first network 198 or the second network 199, may be selected from the plurality of antennas, for example, by the communication module 190 (e.g., the wireless communication module 192). Signals or power may then be transmitted or received between the communication module 190 and the external electronic device via the selected at least one antenna. According to an embodiment, further components (e.g., a Radio Frequency Integrated Circuit (RFIC)) other than radiating elements may additionally be formed as part of the antenna module 197.

According to various embodiments, antenna module 197 may form a millimeter wave antenna module. According to an embodiment, a millimeter wave antenna module may include: a printed circuit board; an RFIC disposed on or adjacent to a first surface (e.g., a bottom surface) of the printed circuit board and capable of supporting a specified high frequency band (e.g., millimeter wave band); and a plurality of antennas (e.g., array antennas) disposed on or adjacent to the second surface (e.g., top surface or side surface) of the printed circuit board and capable of transmitting or receiving signals of a specified high frequency band.

At least some of the above components may be interconnected via an inter-peripheral communication scheme (e.g., bus, general Purpose Input and Output (GPIO), serial Peripheral Interface (SPI), or Mobile Industrial Processor Interface (MIPI)) and communicatively communicate signals (e.g., commands or data) therebetween.

According to an embodiment, commands or data may be sent or received between the electronic device 101 and the external electronic device 104 via the server 108 connected to the second network 199. Each of the electronic devices 102 or 104 may be the same type of device as the electronic device 101 or a different type of device from the electronic device 101. According to an embodiment, all or some of the operations to be performed at the electronic device 101 may be performed at one or more of the external electronic devices 102, 104, and/or 108. For example, if the electronic device 101 should automatically perform a function or service or should perform a function or service in response to a request from a user or another device, the electronic device 101 may request the one or more external electronic devices to perform at least a portion of the function or service instead of or in addition to the function or service, or the electronic device 101 may request the one or more external electronic devices to perform at least a portion of the function or service. The one or more external electronic devices that received the request may perform the requested at least part of the function or service or perform another function or another service related to the request and transmit the result of the performing to the electronic device 101. The electronic device 101 may provide the result as at least a partial reply to the request with or without further processing of the result. For this purpose, for example, cloud computing technology, distributed computing technology, mobile Edge Computing (MEC) technology, or client-server computing technology may be used. The electronic device 101 may provide ultra-low latency services using, for example, distributed computing or mobile edge computing. In another embodiment, the external electronic device 104 may comprise an internet of things (IoT) device. Server 108 may be an intelligent server using machine learning and/or neural networks. According to an embodiment, the external electronic device 104 or the server 108 may be included in the second network 199. The electronic device 101 may be applied to smart services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology or IoT-related technology.

Fig. 2 is a block diagram 200 of an electronic device 101 for supporting legacy network communications and 5G network communications, according to various example embodiments. Referring to fig. 2, the electronic device 101 may include a first communication processor 212, a second communication processor 214, a first Radio Frequency Integrated Circuit (RFIC) 222, second and third RFICs 224, 226, a fourth RFIC 228, a first Radio Frequency Front End (RFFE) 232, a second RFFE 234, a first antenna module 242, a second antenna module 244, and an antenna 248. Each antenna module herein (see, e.g., 242, 244, and 246) includes an antenna.

The electronic device 101 may also include a processor 120 and a memory 130. The second network 199 may include a first cellular network 292 and a second cellular network 294. According to another embodiment, the electronic device 101 may also include at least one of the components shown in fig. 1, and the second network 199 may also include at least one other network. According to an embodiment, the first communication processor 212, the second communication processor 214, the first RFIC 222, the second RFIC 224, the fourth RFIC 228, the first RFFE 232, and the second RFFE 234 may form at least a portion of the wireless communication module 192 (including communication circuitry). According to another embodiment, the fourth RFIC 228 may be omitted or may be included as part of the third RFIC 226.

The first communication processor 212 may support establishing a communication channel for a frequency band to be used for wireless communication with the first cellular network 292, as well as conventional network communication over the established communication channel. According to various embodiments, the first cellular network 292 may be a legacy network including a second generation (2G) network, a third generation (3G) network, a fourth generation (4G) network, and/or a Long Term Evolution (LTE) network. The second communication processor 214 may support establishing a communication channel corresponding to a designated frequency band (e.g., about 6GHz to 60 GHz) in a frequency band to be used for wireless communication with the second cellular network 294, and performing 5G network communication through the established communication channel. According to various embodiments, the second cellular network 294 may be a 5G network defined by 3 GPP. Additionally, according to an embodiment, the first communication processor 212 or the second communication processor 214 may support establishing a communication channel corresponding to a specified frequency band (e.g., about 6GHz or less) among frequency bands for wireless communication with the second cellular network 294, and performing 5G network communication through the established communication channel. The first communication processor 212 and the second communication processor 214 may be implemented in a single chip or a single package, depending on the embodiment. According to various embodiments, the first communication processor 212 or the second communication processor 214 may be formed in a single chip or a single package along with the processor 120, the auxiliary/co-processor 123, or the communication module 190 (including communication circuitry) of fig. 1.

Upon transmission, the first RFIC 222 may convert baseband signals generated by the first communication processor 212 to Radio Frequency (RF) signals of about 700MHz to about 3GHz for use in a first cellular network 292 (e.g., a legacy network). Upon reception, the RF signal may be obtained from a first cellular network 292 (e.g., a legacy network) through an antenna (e.g., a first antenna module 242 including at least one antenna) and may be preprocessed through an RFFE (e.g., a first RFFE 232). The first RFIC 222 may convert the preprocessed RF signals to baseband signals for processing by the first communication processor 212.

At the time of transmission, the second RFIC 224 may convert the baseband signal generated by the first communication processor 212 or the second communication processor 214 into an RF signal (hereinafter, referred to as a 5gsub6 RF signal) of a Sub6 band (for example, about 6GHz or less) used in the second cellular network 294 (for example, a 5G network). Upon reception, the 5G Sub6 RF signal may be obtained from the second cellular network 294 (e.g., a 5G network) through an antenna (e.g., the second antenna module 244 including at least one antenna) and may be preprocessed through an RFFE (e.g., the second RFFE 234). The second RFIC 224 may convert the pre-processed 5g Sub6 RF signal to a baseband signal for processing by a corresponding one of the first communications processor 212 or the second communications processor 214.

The third RFIC 226 may convert baseband signals generated by the second communication processor 214 into RF signals (hereinafter referred to as 5G Above6RF signals) of a 5G Above6 band (e.g., about 6GHz to about 60 GHz) to be used in a second cellular network 294 (e.g., a 5G network). Upon reception, the 5G abov 6RF signal may be obtained from the second cellular network 294 (e.g., 5G network) through an antenna (e.g., antenna 248) and the 5G abov 6RF signal may be preprocessed by the third RFFE 236. For example, the third RFFE236 may perform preprocessing of the signal by using at least one phase shifter 238. The third RFIC 226 may convert the pre-processed 5g Above6RF signal to a baseband signal for processing by the second communications processor 214. According to an embodiment, the third RFFE236 may be formed as part of the third RFIC 226.

According to an example embodiment, the electronic device 101 may include a fourth RFIC 228 that is independent of the third RFIC 226 or at least as part of the third RFIC 226. In this case, the fourth RFIC 228 may convert the baseband signal generated by the second communication processor 214 into an RF signal (hereinafter, referred to as an Intermediate Frequency (IF) signal) of an intermediate frequency band (for example, about 9GHz to about 11 GHz), and then transmit the IF signal to the third RFIC 226. The third RFIC 226 may convert the IF signal to a 5g Above6RF signal. Upon reception, a 5G Above6RF signal may be received from a second cellular network 294 (e.g., a 5G network) via an antenna (e.g., antenna 248), and the 5G Above6RF signal may be converted to an IF signal by the third RFIC 226. The fourth RFIC 228 may convert the IF signal to a baseband signal for processing by the second communications processor 214.

According to example embodiments, the first RFIC 222 and the second RFIC 224 may be implemented as at least a portion of a single chip or a single package. According to an embodiment, the first RFFE 232 and the second RFFE 234 may be implemented as at least a portion of a single chip or a single package. According to embodiments, at least one of the first antenna module 242 or the second antenna module 244 may be omitted or combined with another antenna module to process RF signals of multiple corresponding frequency bands.

According to an example embodiment, the third RFIC 226 and the antenna 248 may be disposed on the same substrate to form a third antenna module 246. For example, the wireless communication module 192 or the processor 120 may be disposed on a first substrate (e.g., a main PCB). In this case, the third RFIC 226 may be disposed in a partial region (e.g., a lower surface) of the second substrate (e.g., a sub-PCB) that is separate from the first substrate, and the antenna 248 may be disposed in another partial region (e.g., an upper surface) to form the third antenna module 246. According to an embodiment, the antenna 248 may comprise an antenna array that may be used for beamforming, for example. By disposing the third RFIC 226 and the antenna 248 on the same substrate, the length of the transmission line therebetween may be reduced. For example, this may reduce loss (e.g., attenuation) of signals in a high frequency band (e.g., about 6GHz to about 60 GHz) for transmission lines for 5G network communications. Accordingly, the electronic device 101 may improve the quality or speed of communication with the second cellular network 294 (e.g., a 5G network).

The second cellular network 294 (e.g., a 5G network) may operate independently (e.g., independently (SA)) from the first cellular network 292 (e.g., a legacy network) or as connected to the first cellular network (e.g., a non-independent (NSA)). For example, in a 5G network, there may be only an access network (e.g., a 5G Radio Access Network (RAN) or a next generation RAN (NG RAN)) and no core network (e.g., a Next Generation Core (NGC)). In this case, the electronic device 101 may access an external network (e.g., the internet) under the control of a core network (e.g., an evolved encapsulation core (EPC)) of a legacy network after accessing an access network of the 5G network. Protocol information for communicating with a legacy network (e.g., LTE protocol information) or protocol information for communicating with a 5G network (e.g., new Radio (NR) protocol information) may be stored in the memory 230 and may be accessed by other components (e.g., the processor 120, the first communication processor 212, or the second communication processor 214).

The electronic device may transmit or receive signals on each of a plurality of frequency bands. A first frequency band among the plurality of frequency bands may partially overlap with a second frequency band among the plurality of frequency bands. Although the first and second frequency bands partially overlap each other, including a diplexer for each of the plurality of frequency bands in a Radio Frequency Front End (RFFE) of the electronic device may result in an increase in the size of the RFFE.

The electronic apparatus according to the example embodiment may reduce the number of diplexers included in the RFFE by including a diplexer including a filter that passes a signal on a first frequency band and a signal on a second frequency band partially overlapping the first frequency band.

Fig. 3 is a simplified block diagram of an electronic device according to an example embodiment. The functional components indicated by the simplified block diagram may be included in the electronic device 101 shown in fig. 1.

Referring to fig. 3, the electronic device 101 may include a processor 300, a first RFFE 310, and a first antenna 358.

In an example embodiment, the processor 300 may include the processor 120 shown in fig. 1. In an embodiment, the processor 300 may include at least one of the processor 120, the first communication processor 212, the second communication processor 214, the first RFIC 222, the second RFIC 224, the third RFIC 226, or the fourth RFIC 228 shown in fig. 2.

In an example embodiment, the first RFFE 310 may be operatively connected to a first antenna 358. In an embodiment, the first RFFE 310 may include a first diplexer 320 connectable to a first antenna 358 and a second diplexer 330 connectable to the first antenna 358.

For example, the first duplexer 320 may include a first filter (e.g., an uplink frequency range (e.g., 832 megahertz (MHz) to 862 megahertz) of B20 of an LTE standard of 3GPP (third generation partnership project) or n20 of an NR standard of 3 GPP) that passes a first signal within a first frequency band. For example, in terms of the frequency range of the signal transmitted from the electronic device 101, the uplink frequency range of the first frequency band may be referred to as the transmission frequency range of the first frequency band.

For example, the first duplexer 320 may include a second filter 322 passing a second signal within a downlink frequency range of the first frequency band (e.g., 791MHz to 821 MHz) and a fourth signal within a downlink frequency range of the second frequency band (e.g., 773MHz to 803 MHz) partially overlapping the downlink frequency range of the first frequency band (e.g., B28B of an LTE standard of 3GPP or n28B of an NR standard of 3 GPP). For example, when the downlink frequency range of the first frequency band is 791MHz to 821MHz and the downlink frequency range of the second frequency band is 773MHz to 803MHz, the downlink frequency range of the first frequency band and the downlink frequency range of the second frequency band may overlap at 791MHz to 803 MHz. For example, the downlink frequency range of the first frequency band and the downlink frequency range of the second frequency band may be referred to as a reception frequency range of the first frequency band and a reception frequency range of the second frequency band as frequency ranges of signals received at the electronic device 101.

For example, the second diplexer 330 may include a first filter 331 (referred to as a third filter) that passes a third signal in an uplink frequency range (e.g., 718MHz to 748 MHz) of the second frequency band and a fifth signal in an uplink frequency range (e.g., 703MHz to 733 MHz) of the third frequency band (e.g., B28A of an LTE standard of 3GPP or n28A of an NR standard of 3 GPP). For example, the uplink frequency range of the second frequency band and the uplink frequency range of the third frequency band may be referred to as a transmission frequency range of the second frequency band and a transmission frequency range of the third frequency band as frequency ranges of signals transmitted by the electronic apparatus 101.

For example, the second diplexer 330 may include a second filter 332 (which may be referred to as a fourth filter) that passes sixth signals within a downlink frequency range of a third frequency band (e.g., 758MHz to 788 MHz). For example, the downlink frequency range of the third frequency band may be separate or spaced apart from the downlink frequency range of the first frequency band, unlike the downlink frequency range of the second frequency band. For example, the downlink frequency range of the third frequency band may not overlap with the downlink frequency range of the first frequency band, unlike the downlink frequency range of the second frequency band. For example, the downlink frequency range of the third frequency band may partially overlap with the downlink frequency range of the second frequency band. For example, since the downlink frequency range of the third frequency band partially overlaps the downlink frequency range of the second frequency band, the passband of the second filter 322 may partially overlap the passband of the second filter 332. For example, the downlink frequency range of the third frequency band may be referred to as a reception frequency range of the third frequency band as a frequency range of the signal received by the electronic device 101.

According to example embodiments, since the B28A of the LTE standard and the B28B of the LTE standard are frequency bands divided from the B28 of the LTE standard when the second frequency band is the B28B of the LTE standard of 3GPP (or the N28B of the NR standard of 3 GPP) and the third frequency band is the B28A of the LTE standard of 3GPP (or the N28A of the NR standard of 3 GPP), the second frequency band may be referred to as a part of the frequency bands and the third frequency band may be referred to as another part of the frequency bands. However, it is not limited thereto.

In an example embodiment, since the passband of the second filter 322 partially overlaps the passband of the second filter 332, no guard band may be formed or provided between the passband of the second filter 322 and the passband of the second filter 332. For example, referring to fig. 4, when the first frequency band is B20 of the LTE standard of 3GPP (or n20 of the NR standard of 3 GPP), the second frequency band is B28B of the LTE standard of 3GPP (or n28B of the NR standard of 3 GPP), and the third frequency band is B28A of the LTE standard of 3GPP (or n28A of the NR standard of 3 GPP), the pass band of each of the first filter 321 in the first duplexer 320, the second filter 322 in the first duplexer 320, the first filter 331 in the second duplexer 330, and the second filter 332 in the second duplexer 330 may be represented as a graph 400. The horizontal axis of graph 400 is frequency (unit: MHz), the vertical axis of graph 400 is loss, and the lines in graph 400 (e.g., line 410, line 420, line 430, and line 440) represent the reduced passband of first filter 321, the reduced passband of second filter 322, the reduced passband of first filter 331, and the passband of second filter 332, respectively. For example, the loss may be represented by an S (scattering) parameter. For example, the S parameter may represent a ratio of an input voltage to an output voltage in a frequency distribution. For example, since each of the first and second diplexers 320 and 330 is a passive element, the maximum or high value of the S parameter in the graph 400 may be 0 decibel (dB). For example, as in line 410, the first filter 321 may have a first cutoff frequency 411 of 832MHz and a second cutoff frequency 412 of 862MHz, and may pass a first signal having a frequency between the first cutoff frequency 411 and the second cutoff frequency 412. For example, as in line 420, the second filter 322 may have a first cutoff frequency 421 of 773MHz and a second cutoff frequency 422 of 821MHz, and may pass the second signal and the fourth signal having frequencies between the first cutoff frequency 421 and the second cutoff frequency 422. For example, as in line 430, the first filter 331 may have a first cutoff frequency 431 of 703MHz and a second cutoff frequency 432 of 748MHz, and may pass a third signal and a fifth signal having frequencies between the first cutoff frequency 431 and the second cutoff frequency 432. For example, as with line 440, the second filter 332 may have a first cutoff frequency 441 of 758MHz and a second cutoff frequency 442 of 788MHz, and may pass a sixth signal having a frequency between the first cutoff frequency 441 and the second cutoff frequency 442. Because the first cut-off frequency 421 of the second filter 322 is a frequency lower than the second cut-off frequency 442 of the second filter 332, no guard band may be formed or provided between the pass-band of the second filter 322 and the pass-band of the second filter 332. Since a guard band may not be provided between the pass band of the second filter 322 and the pass band of the second filter 332, the processor 300 may change the characteristics of the second filter 322 under the first specified condition or change the characteristics of the second filter 332 under the second specified condition.

Referring back to fig. 3, in an example embodiment, the first RFFE 310 may also include a switch 340. For example, the switch 340 may be controlled by the processor 300. For example, the processor 300 may connect the first duplexer 320 with the first antenna 358, connect the second duplexer 330 with the first antenna 358, connect both the first duplexer 320 and the second duplexer 330 with the first antenna 358, or disconnect both the first duplexer 320 and the second duplexer 330 from the antenna 358 via the switch 340. For example, based on the control of the processor 300, the switch 340 may have one of a first state in which the first electrical path 341 is formed (or provided) between the first duplexer 320 and the first antenna 358, a second state in which the second electrical path 342 is formed between the second duplexer 330 and the first antenna 358, a third state in which both the first electrical path 341 and the second electrical path 342 are formed, and a fourth state in which both the first electrical path 341 and the second electrical path 342 are not formed.

In an example embodiment, the first RFFE 310 may further include a first impedance matching circuit 346 capable of changing or setting the characteristics of the second filter 322 in the first diplexer 320 and a second impedance matching circuit 347 capable of changing or setting the characteristics of the second filter 332 in the second diplexer 330.

For example, the first impedance matching circuit 346 may be controlled by the processor 300. For example, the processor 300 may change the characteristics of the second filter 322 by changing the cut-off frequency of the second filter 322 or changing the center frequency of the second filter 322 via the first impedance matching circuit 346. An example of changing the characteristics of the second filter 322 via the first impedance matching circuit 346 will be described later with reference to fig. 8 and 9.

For example, the second impedance matching circuit 347 may be controlled by the processor 300. For example, the processor 300 may change the characteristics of the second filter 332 by changing the cut-off frequency of the second filter 332 or changing the center frequency of the second filter 332 via the second impedance matching circuit 347. An example of changing the characteristics of the second filter 332 via the second impedance matching circuit 347 will be described later with reference to fig. 6 and 7.

In an example embodiment, each of the first impedance matching circuit 346 and the second impedance matching circuit 347 may include at least one of at least one variable capacitor or at least one inductor. In an embodiment, each of the first impedance matching circuit 346 and the second impedance matching circuit 347 may include at least one of at least one capacitor or at least one variable inductor. However, it is not limited thereto.

In an example embodiment, the first impedance matching circuit 346 may be electrically connected to a first electrical path 348 between the first diplexer 320 and the switch 340. For example, the first impedance matching circuit 346 may be electrically connected to the first diplexer 320 and to the switch 340. In an embodiment, the second impedance matching circuit 347 may be electrically connected to a second electrical path 349 between the second diplexer 330 and the switch 340. For example, the second impedance matching circuit 347 may be electrically connected to the second diplexer 330 and to the switch 340.

In an example embodiment, the first impedance matching circuit 346 may be electrically connected to the second filter 322 of the first filter 321 and the second filter 322, and the second impedance matching circuit 347 may be electrically connected to the second filter 332 of the first filter 331 and the second filter 332. For example, referring to fig. 5a, the first impedance matching circuit 346 may be electrically connected to the second filter 322 extending into the first filter 321 and the second filter 322/the third electrical path 350 extending from the second filter 322 or formed from the second filter 322, instead of being electrically connected to the first electrical path 348 between the first duplexer 320 and the switch 340, to prevent or reduce a change in the characteristics of the first filter 321 caused by a change in the characteristics of the second filter 322 by the first impedance matching circuit 346 being electrically connected to the first duplexer 320. Further, the first impedance matching circuit 346 electrically connected to the third electrical path 350 may be operatively connected to a Low Noise Amplifier (LNA) 352 shown in fig. 3. The second impedance matching circuit 347 may be electrically connected to the second filter 332 extending into or from the second filter 332/the fourth electrical path 351 extending from the second filter 332 instead of being electrically connected to the second electrical path 349 between the second diplexer 330 and the switch 340 to prevent or reduce a change in the characteristics of the first filter 331 caused by a change in the characteristics of the second filter 332 through the second impedance matching circuit 347 being electrically connected to the second diplexer 330. For example, the second impedance matching circuit 347 electrically connected to the fourth electrical path 351 may be operatively connected to the LNA353 shown in fig. 3. For another example, referring to fig. 5b, the first impedance matching circuit 346 may be electrically connected to the second filter 322 of the first filter 321 and the second filter 322, instead of being electrically connected to the first electrical path 348 between the first duplexer 320 and the switch 340, to prevent or reduce a change in the characteristics of the first filter 321 caused by a change in the characteristics of the second filter 322 by the first impedance matching circuit 346 being electrically connected to the first duplexer 320. For example, the first impedance matching circuit 346 shown in fig. 5b may be electrically connected to the second filter 322 in parallel with the third electrical path 350. For example, the second impedance matching circuit 347 may be electrically connected to the second filter 332 of the first and second filters 331 and 332, instead of being electrically connected to the second electrical path 349 between the second duplexer 330 and the switch 340, to prevent or reduce a change in the characteristics of the first filter 331 caused by a change in the characteristics of the second filter 332 by the second impedance matching circuit 347 being electrically connected to the second duplexer 330. For example, the second impedance matching circuit 347 shown in fig. 5b may be electrically connected in parallel with the fourth electrical path 351 to the second filter 332.

Referring back to fig. 3, in an embodiment, the first RFFE 310 may further include an LNA352 configured to amplify the second signal or the fourth signal received from the first antenna 358 through the second filter 322 in the first duplexer 320. The second signal or the fourth signal amplified by the LNA352 may be provided to the processor 300.

In an embodiment, the first RFFE 310 may further include an LNA353 configured to amplify the sixth signal received from the first antenna 358 through the second filter 332 in the second diplexer 330. The sixth signal amplified by LNA353 may be provided to processor 300.

In an example embodiment, the first RFFE 310 may further include a Power Amplifier (PA) 354 configured to amplify the signal obtained from the processor 300. For example, the signal amplified by the PA 354 may be provided to the first filter 321 or the first filter 331. In an embodiment, the first filter 321 may be configured to pass a first signal among the amplified signals. In an embodiment, the first filter 331 may be configured to pass a third signal among the amplified signals. In an embodiment, the first filter 331 may be configured to pass a fifth signal among the amplified signals.

In an example embodiment, the first RFFE 310 may further include a switch 355 to provide the amplified signal to a filter among the first filter 321 and the first filter 331. Switch 355 may be controlled by processor 300. For example, the processor 300 may connect the PA 354 and the first filter 321, connect the PA 354 and the first filter 331, or disconnect both the PA 354, the first filter 321, and the first filter 331 via the switch 355. For example, the switch 355 may have a first state in which the first electric path 356 is formed (or provided), a second state in which the second electric path 357 is formed, and a third state in which all of the first electric path 356 and the second electric path 357 are disconnected, based on the control of the processor 300.

In an example embodiment, the electronic device 101 may further include a second RFFE 360 and a second antenna 390 to support at least one of transmit diversity or receive diversity.

In an example embodiment, the second RFFE 360 may be operatively connected to a second antenna 390. In an embodiment, the second RFFE 360 may include a filter 361 connectable to the second antenna 390 and a diplexer 362 connectable to the second antenna 390. For example, the filter 361 may pass the second signal. For example, the duplexer 362 may include a first filter 363 through which the fifth signal passes. For example, the duplexer 362 may include a second filter 364 that passes the sixth signal.

In an example embodiment, the second RFFE 360 may also include a switch 365. For example, the switch 365 may be controlled by the processor 300. For example, the processor 300 may connect the filter 361 and the second antenna 390, connect the duplexer 362 and the second antenna 390, connect both the filter 361 and the duplexer 362 to the second antenna 390, or may disconnect both the filter 361 and the duplexer 362 from the second antenna 390 via the switch 365. For example, based on the control of the processor 300, the switch 365 may have one of a first state in which the first electrical path 366 is formed (or provided) between the first filter 261 and the second antenna 390, a second state in which the second electrical path 367 is formed between the duplexer 362 and the second antenna 390, a third state in which both the first electrical path 366 and the second electrical path 367 are formed, and a fourth state in which both the first electrical path 366 and the second electrical path 367 are not formed.

In an example embodiment, the second RFFE 360 may further include an LNA368 configured to amplify the second signal received from the second antenna 390 via the filter 361. The second signal amplified by LNA368 may be provided to processor 300.

In an example embodiment, the second RFFE 360 may further include an LNA369 configured to amplify a sixth signal received from the second antenna 390 via the second filter 364 in the diplexer 362. The sixth signal amplified by LNA369 may be provided to processor 300.

In an example embodiment, the second RFFE 360 may further include a PA370 configured to amplify the signal obtained from the processor 300. For example, the signal amplified by the PA370 may be provided to a first filter 363 in the diplexer 362. In an embodiment, the first filter 363 may be configured to pass a fifth signal from among the amplified signals.

In an example embodiment, the processor 300 may change the characteristics of the second filter 322 in the first duplexer 320 or change the characteristics of the second filter 332 in the second duplexer 330 in the case where both the first duplexer 320 and the second duplexer 330 are connected to the first antenna 358.

For example, referring to fig. 6, in the case of transmitting the third signal and receiving the fourth signal, the processor 300 may connect the first antenna 358 to both the first duplexer 320 and the second duplexer 330 by setting the state of the switch 340 to a third state providing both the first electrical path 341 and the second electrical path 342, respectively. For example, since the passband of the second filter 322 in the first duplexer 320 connected to the first antenna 358 partially overlaps the passband of the second filter 332 in the second duplexer 330 connected to the first antenna 358 when the state of the switch 340 is in the third state, the processor 300 may change the characteristics of the second filter 332 not used for receiving the fourth signal. For example, the processor 300 may change the cutoff frequency (or center frequency) of the second filter 332 to prevent or inhibit the reception of the fourth signal via the second filter 332. For example, the processor 300 may change the cut-off frequency (or center frequency) of the second filter 332 to a frequency that blocks the fourth signal within a portion of the downlink frequency range of the second frequency band that partially overlaps the downlink frequency range of the third frequency band via the second impedance matching circuit 347. For example, referring to fig. 7, when the first frequency band is B20 of the LTE standard of 3GPP (or n20 of the NR standard of 3 GPP), the second frequency band is B28B of the LTE standard of 3GPP (or n28B of the NR standard of 3 GPP), and the third frequency band is B28A of the LTE standard of 3GPP (or n28A of the NR standard of 3 GPP), the pass band of each of the first filter 321 in the first duplexer 320, the second filter 322 in the first duplexer 320, the first filter 331 in the second duplexer 330, and the second filter 332 in the second duplexer 330 may be represented as a graph 700 when transmitting the third signal and receiving the fourth signal. The horizontal axis of graph 700 is frequency (units: MHz), the vertical axis of graph 400 is loss, and the lines in graph 700 (e.g., line 410, line 420, line 430, and line 710) represent the reduced passband of first filter 321, the reduced passband of second filter 322, the reduced passband of first filter 331, and the passband of second filter 332, respectively. For example, the loss may be represented by an S (scattering) parameter. For example, the S parameter may represent a ratio of an input voltage to an output voltage in a frequency distribution. For example, since each of the first and second diplexers 320 and 330 is a passive element, the maximum or high value of the S parameter in graph 700 may be 0dB. For example, in the case of transmitting the third signal and receiving the fourth signal, the processor 300 may change the second cut-off frequency 442 of the second filter 332 to the second cut-off frequency 701. Since the passband of the second filter 332 defined by the first cut-off frequency 441 and the second cut-off frequency 701 does not overlap the downlink frequency range of the second frequency band, the processor 300 may prevent or inhibit the reception of the fourth signal via the second filter 332 by changing the characteristics of the second filter 332. For example, unlike fig. 4, since the guard band 715 is defined or formed between the passband 720 of the second filter 322 defined by the first cutoff frequency 421 and the second cutoff frequency 422 and the passband 725 of the second filter 332 defined by the first cutoff frequency 441 and the second cutoff frequency 701, the processor 300 may prevent the fourth signal from being received through the second filter 332 and the fourth signal from being received through the second filter 322.

For another example, referring to fig. 8, in the case of transmitting a first signal, receiving a second signal, and receiving a sixth signal via the first RFFE 310, the processor 300 may connect the first antenna 358 to both the first duplexer 320 and the second duplexer 330 by setting the state of the switch 340 to a third state providing both the first electrical path 341 and the second electrical path 342, respectively. For example, the processor 300 may set the state of the switch 340 to the third state to transmit the first and fifth signals (not shown in fig. 8, shown in fig. 10) and receive the second and sixth signals through Carrier Aggregation (CA). For example, the processor 300 may set the state of the switch 340 to a third state to transmit the first and fifth signals (not shown in fig. 8, shown in fig. 10) and receive the second and sixth signals via an E-UTRA new wireless dual connection (EN-DC) of the NR standard of 3 GPP. For example, since the passband of the second filter 322 in the first duplexer 320 connected to the first antenna 358 partially overlaps the passband of the second filter 332 in the second duplexer 330 connected to the first antenna 358 when the state of the switch 340 is in the third state, the processor 300 may change the characteristics of the second filter 322 for receiving the second signal and the fourth signal, but not for receiving the sixth signal. For example, the processor 300 may change the cut-off frequency (or center frequency) of the second filter 322 to prevent or inhibit receiving the sixth signal via the second filter 322. For example, the processor 300 may change the cutoff frequency of the second filter 322 to a frequency that blocks the sixth signal within a portion of the downlink frequency range of the third frequency band that partially overlaps the downlink frequency range of the second frequency band via the first impedance matching circuit 346. For example, referring to fig. 9, when the first frequency band is B20 of the LTE standard of 3GPP (or n20 of the NR standard of 3 GPP), the second frequency band is B28B of the LTE standard of 3GPP (or n28B of the NR standard of 3 GPP), and the third frequency band is n28A of the NR standard of 3GPP (or B28A of the LTE standard of 3 GPP), the first filter 321 in the first duplexer 320, the second filter 322 in the first duplexer 320, the first filter 331 in the second duplexer 330, the second filter 331 when transmitting the first signal, receiving the second signal, and receiving the sixth signal, And the pass band of each of the second filters 332 in the second diplexer 330 may be represented as graph 900. The horizontal axis of graph 900 is frequency (units: MHz), the vertical axis of graph 900 is loss, and the lines in graph 900 (e.g., line 410, line 430, line 440, and line 910) represent the reduced passband of first filter 321, the reduced passband of second filter 322, the reduced passband of first filter 331, and the passband of second filter 332, respectively. For example, the loss may be represented by an S (scattering) parameter. For example, the S parameter may represent a ratio of an input voltage to an output voltage in a frequency distribution. For example, since each of the first and second diplexers 320 and 330 is a passive element, the maximum or high value of the S parameter in graph 900 may be 0dB. For example, the processor 300 may change the first cut-off frequency 421 of the second filter 322 to the first cut-off frequency 901 under the conditions of transmitting the first signal, receiving the second signal, and receiving the sixth signal. Since the pass band of the second filter 322 defined as the first cut-off frequency 901 and the second cut-off frequency 422 includes the downlink frequency range of the first frequency band and the pass band of the second filter 322 defined as the first cut-off frequency 901 and the second cut-off frequency 422 does not overlap the downlink frequency range of the third frequency band, the processor 300 may receive the second signal through the second filter 322 via a change in the characteristics of the second filter 322 and may prevent or suppress the reception of the sixth signal through the second filter 322 via a change in the characteristics of the second filter 322. For example, unlike fig. 4, since the guard band 915 is defined or formed between the pass band 920 of the second filter 322 defined by the first cut-off frequency 901 and the second cut-off frequency 422 and the pass band 925 of the second filter 332 defined by the first cut-off frequency 441 and the second cut-off frequency 442, the processor 300 may prevent the sixth signal from being received via the second filter 322 and the sixth signal from being received via the second filter 332. Each processor herein includes processing circuitry.

Referring back to fig. 3, in an embodiment, the processor 300 may transmit the first and fifth signals via CA or EN-DC and receive the second and sixth signals by using both the first and second RFFEs 310 and 360. For example, referring to fig. 10, the processor 300 may transmit a first signal, receive a second signal, and receive a sixth signal via the first RFFE 310 by connecting the first duplexer 320 and the first antenna 358 and connecting the second duplexer 330 and the first antenna 358 based on setting the state of the switch 340 to a third state providing both the first electrical path 341 and the second electrical path 342. For example, the cutoff frequency (or center frequency) of the second filter 322 may be changed via the first impedance matching circuit 346 to prevent or reduce the sixth signal from passing through the second filter 322. For example, the processor 300 may use the first antenna 358 as a transmit/receive path for a first frequency band through the first RFFE 310 and use the first antenna 358 as a diversity receive path for a third frequency band. For example, processor 300 may transmit the fifth signal, receive the second signal, and receive the sixth signal via second RFFE 360 by connecting filter 361 and second antenna 390 and connecting diplexer 362 and second antenna 390 by setting the state of switch 340 to the third state based on setting the state of switch 365 to the third state providing both first electrical path 366 and second electrical path 367. For example, the processor 300 may use the second antenna 390 as a diversity reception path of the first frequency band via the second RFFE 360, and may use the second antenna 390 as a transmission/reception path of the third frequency band.

Referring back to fig. 3, in an example embodiment, the processor 300 may maintain characteristics of the second filter 322 in the first duplexer 320 and the second filter 332 in the second duplexer 330 in a case where a duplexer among the first duplexer 320 and the second duplexer 330 is connected to the first antenna 358.

For example, referring to fig. 11, in the case of transmitting the fifth signal and receiving the sixth signal, the processor 300 may connect the first antenna 358 to the second diplexer 330 by setting the state of the switch 340 to a second state providing the second electrical path 342. For example, since the first antenna 358 is disconnected from the first duplexer 320 when the state of the switch 340 is in the second state, the processor 300 may maintain the characteristics of the second filter 332. For example, when the state of the switch 340 is in the second state, the processor 300 may maintain the characteristics of the second filter 332 by maintaining the cut-off frequency (or center frequency) of the second filter 332 such that the pass band corresponds to the downlink frequency range of the third frequency band. For example, referring to fig. 4, when the first frequency band is B20 of the LTE standard of 3GPP (or n20 of the NR standard of 3 GPP), the second frequency band is B28B of the LTE standard of 3GPP (or n28B of the NR standard of 3 GPP), and the third frequency band is B28A of the LTE standard of 3GPP (or n28A of the NR standard of 3 GPP), the processor 300 may set the pass band of the first filter 331 via the second impedance matching circuit 347 such that the pass band of the first filter 331 is represented as a line 430, and set the pass band of the second filter 332 such that the pass band of the second filter 332 is represented as a line 440.

Referring to fig. 12, for another example, in the case of transmitting a first signal and receiving a second signal, the processor 300 may connect the first antenna 358 to the first duplexer 320 by setting the state of the switch 340 to a first state providing the first electrical path 341. For example, when the state of the switch 340 is in the first state, the processor 300 may maintain the characteristics of the first filter 322 since the first antenna 358 is disconnected from the second diplexer 330. For example, when the state of the switch 340 is in the first state, the processor 300 may maintain the characteristics of the second filter 322 by maintaining the cut-off frequency (or center frequency) of the second filter 322 such that the passband of the second filter 322 corresponds to the second frequency band. For example, referring to fig. 4, when the first frequency band is B20 of the LTE standard of 3GPP (or n20 of the NR standard of 3 GPP), the second frequency band is B28B of the LTE standard of 3GPP (or n28B of the NR standard of 3 GPP), and the third frequency band is B28A of the LTE standard of 3GPP (or n28A of the NR standard of 3 GPP), the processor 300 may set the pass band of the first filter 321 via the first impedance matching circuit 346 such that the pass band of the first filter 321 is represented as a line 410, and set the pass band of the second filter 322 such that the pass band of the second filter 322 is represented as a line 420.

As described above, the electronic device 101 may include a filter (e.g., the second filter 322) that passes all signals on frequency ranges that overlap each other (e.g., a downlink frequency range of the first frequency band and a downlink frequency range of the second frequency band). By including a filter, electronic device 101 may include an RFFE (e.g., first RFFE 310) that is smaller in size than an RFFE having electronic devices for each frequency range. Since the electronic device 101 includes RFFE having a reduced size, a space for mounting components of the electronic device 101 can be more widely provided.

In an example embodiment, the electronic apparatus 101 may change a characteristic of the filter or another filter according to a transmission/reception state of a signal by including the filter to prevent or reduce the reception of an unexpected signal through the filter or another filter different from the filter. For example, the electronic device 101 may include an impedance matching circuit (e.g., the first impedance matching circuit 346 or the second impedance matching circuit 347) to change the characteristics of the filter or the characteristics of another filter.

The above description describes an example of changing the characteristics of a filter in each of the diplexers for receiving signals when two or more diplexers are respectively connected to one antenna, but this is for convenience of description. When two or more duplexers are connected to one antenna, respectively, the above description can be used to change the characteristics of the filter in each of the duplexers for transmitting signals.

An electronic device according to an example embodiment may reduce the size of a Radio Frequency Front End (RFFE) including a diplexer by including: a duplexer including a filter passing a signal on a first frequency band and a signal on a second frequency band partially overlapping the first frequency band; and a circuit for adaptively changing the characteristics of the filter.

As described above, according to an example embodiment, an electronic device (e.g., electronic device 101) may include: an antenna (e.g., first antenna 358); a Radio Frequency Front End (RFFE) (e.g., first RFFE 310) comprising: a first diplexer (e.g., first diplexer 320), the first diplexer comprising: a first filter (e.g., first filter 321) that passes a first signal in an uplink frequency range of a first frequency band; and a second filter (e.g., second filter 322) that passes a second signal in a downlink frequency range of the first frequency band and a fourth signal in a downlink frequency range of the second frequency band that partially overlaps the downlink frequency range of the first frequency band; and a second diplexer (e.g., second diplexer 330), the second diplexer comprising: a first filter (e.g., first filter 331) that passes the third signal in the uplink frequency range of the second frequency band and the fifth signal in the uplink frequency range of the third frequency band; and a second filter (e.g., second filter 332) that passes a sixth signal in a downlink frequency range of the third frequency band that is separate from and partially overlapping the downlink frequency range of the first frequency band; and at least one processor (e.g., processor 300) operatively coupled with the RFFE, wherein the at least one processor may be configured to change a cutoff frequency of the second filter in the first diplexer to a first frequency that cuts off a sixth signal in a portion of the third frequency band that partially overlaps a downlink frequency range of the second frequency band or to change a cutoff frequency of the second filter in the second diplexer to a second frequency that cuts off a fourth signal in a portion of the second frequency band that partially overlaps the downlink frequency range of the third frequency band when both the first diplexer and the second diplexer are electrically connected with the antenna. Any embodiment herein may or may not be used with any other embodiment herein.

In an example embodiment, the at least one processor may be configured to change a cut-off frequency of a second filter in the second diplexer to the second frequency when the third signal is transmitted and the fourth signal is received via an antenna electrically connected to both the first diplexer and the second diplexer; and changing a cutoff frequency of the second filter in the first duplexer to the first frequency when the first signal is transmitted and the second signal and the sixth signal are received via an antenna electrically connected to both the first duplexer and the second duplexer.

In an example embodiment, the at least one processor is further configured to: when a first duplexer among the first duplexer and the second duplexer is electrically connected to the antenna, maintaining a cut-off frequency of the second filter in the first duplexer at a third frequency at which both the second signal in the downlink frequency range of the first frequency band and the fourth signal in the downlink frequency range of the second frequency band pass; and maintaining a cut-off frequency of the second filter in the second duplexer to a fourth frequency at which a sixth signal in a downlink frequency range of the third frequency band passes when the second duplexer among the first duplexer and the second duplexer is electrically connected to the antenna. In an embodiment, the at least one processor may be configured to maintain a cut-off frequency of a second filter in the first duplexer at a third frequency when the first signal is transmitted and the second signal is received via an antenna electrically connected to the first duplexer among the first and second duplexers; and maintaining a cut-off frequency of a second filter in the second diplexer at a fourth frequency while transmitting the fifth signal and receiving the sixth signal via an antenna electrically connected to the second diplexer of the first diplexer and the second diplexer.

In an example embodiment, the RFFE may further include a switch (e.g., switch 340), wherein the first diplexer may be connectable to the antenna via the switch, wherein the second diplexer may be connectable to the antenna via the switch, and wherein the at least one processor may be configured to change a cut-off frequency of the second filter in the first diplexer to the first frequency or to change a cut-off frequency of the second filter in the second diplexer to the second frequency when the switch is controlled to electrically connect both the first diplexer and the second diplexer to the antenna. In an embodiment, the at least one processor may be further configured to maintain a cut-off frequency of the second filter in the first duplexer to a third frequency that passes both the second signal in the downlink frequency range of the first frequency band and the fourth signal in the downlink frequency range of the second frequency band when the control switch electrically connects the first duplexer among the first duplexer and the second duplexer with the antenna; and maintaining a cut-off frequency of the second filter in the second diplexer to be a fourth frequency through which a sixth signal in a downlink frequency range of the third frequency band passes when the control switch electrically connects the second diplexer among the first diplexer and the second diplexer to the antenna.

In an example embodiment, the RFFE may further include: a first impedance matching circuit (e.g., first impedance matching circuit 346 shown in fig. 3) electrically connected to the first diplexer, electrically connected to the switch; and a second impedance matching circuit (e.g., second impedance matching circuit 347 shown in fig. 3) electrically connected to the second diplexer, electrically connected to the switch, and wherein the at least one processor may be configured to change the cut-off frequency of the second filter in the first diplexer to the first frequency by using the first impedance matching circuit or to change the cut-off frequency of the second filter in the second diplexer to the second frequency by using the second impedance matching circuit when controlling the switch to electrically connect both the first diplexer and the second diplexer to the antenna.

In an example embodiment, the RFFE may further include: a first impedance matching circuit (e.g., first impedance matching circuit 346 shown in fig. 5) electrically connected to the second filter in the first duplexer; and a second impedance matching circuit (e.g., second impedance matching circuit 347 shown in fig. 5) electrically connected to the second filter in the second diplexer, and wherein the at least one processor may be configured to change the cut-off frequency of the second filter in the first diplexer to the first frequency by using the first impedance matching circuit or to change the cut-off frequency of the second filter in the second diplexer to the second frequency by using the second impedance matching circuit when the control switch electrically connects both the first diplexer and the second diplexer to the antenna.

In an example embodiment, the antenna may be a first antenna; wherein the electronic device may further include a second antenna (e.g., second antenna 390), and another RFFE (e.g., second RFFE 360) operatively coupled with the at least one processor, the another RFFE comprising: a duplexer (e.g., a duplexer 362) including a first filter for passing the fifth signal and a second filter for passing the sixth signal and a filter for passing the second signal (e.g., a filter 361), and; wherein the at least one processor may be further configured to change a cutoff frequency of the second filter in the first duplexer to the second frequency when the first signal is transmitted and the second signal and the sixth signal are received via a first antenna electrically connected to both the first duplexer and the second duplexer; and when the first signal and the second signal are transmitted and received via a first antenna electrically connected to both the first duplexer and the second duplexer, the fifth signal and the second signal are transmitted and received via a second antenna electrically connected to both the duplexer and the filter in the other RFFE.

In an example embodiment, the uplink frequency range of the first frequency band, the uplink frequency range of the second frequency band, and the uplink frequency range of the third frequency band may be separated from each other.

In an example embodiment, an electronic device (e.g., electronic device 101) may include: an antenna (e.g., first antenna 358); a Radio Frequency Front End (RFFE) (e.g., first RFFE 310) comprising: a switch (e.g., switch 340); a first diplexer (e.g., first diplexer 320), the first diplexer comprising: a first filter (e.g., first filter 321) that passes a first signal in an uplink frequency range of a first frequency band; and a second filter (e.g., second filter 322) that passes a second signal in a downlink frequency range of the first frequency band and a fourth signal in a downlink frequency range of the second frequency band that partially overlaps the downlink frequency range of the first frequency band, and the first duplexer is connectable with an antenna via a switch; a second diplexer (e.g., second diplexer 330), the second diplexer comprising: a first filter (e.g., first filter 331) that passes the third signal in the uplink frequency range of the second frequency band and the fifth signal in the uplink frequency range of the third frequency band; and a second filter (e.g., second filter 332) that passes a sixth signal in a downlink frequency range of the third frequency band that is separate from and partially overlapping with the downlink frequency range of the first frequency band, and that is connectable to the antenna via a switch; a first impedance matching circuit (e.g., first impedance matching circuit 346) electrically connected to a first electrical path between the switch and the first diplexer; and a second impedance matching circuit (e.g., second impedance matching circuit 347) electrically connected to a second electrical path between the switch and the second diplexer; and at least one processor (e.g., processor 300) operatively coupled with the RFFE, wherein the at least one processor may be configured to change a center frequency of the second filter in the first diplexer to a first frequency that cuts off a sixth signal in a portion of the third frequency band that partially overlaps a downlink frequency range of the second frequency band by using the first impedance matching circuit or to change a center frequency of the second filter in the second diplexer to a second frequency that cuts off a fourth signal in a portion of the second frequency band that partially overlaps a downlink frequency range of the third frequency band by using the second impedance matching circuit when both the first diplexer and the second diplexer are connected with the antenna via the switch.

In an example embodiment, the at least one processor may be configured to change a center frequency of the second filter in the first duplexer to the first frequency by using a first impedance matching circuit among the first impedance matching circuit and the second impedance matching circuit when transmitting the first signal and receiving the second signal and the sixth signal via an antenna electrically connected to both the first duplexer and the second duplexer; and changing a center frequency of a second filter in the second duplexer to a second frequency by using a second impedance matching circuit among the first impedance matching circuit and the second impedance matching circuit when transmitting the third signal and receiving the fourth signal through an antenna electrically connected to the first duplexer and the second duplexer via a switch.

In an example embodiment, the at least one processor may be configured to: when a first duplexer among the first duplexer and the second duplexer is electrically connected to the antenna via the switch, maintaining a cut-off frequency of the second filter in the first duplexer to a third frequency at which both the second signal in the downlink frequency range of the first frequency band and the fourth signal in the downlink frequency range of the second frequency band pass by using the first impedance matching circuit; and maintaining a cutoff frequency of the second filter in the second duplexer to a fourth frequency at which a sixth signal in a downlink frequency range of the third frequency band passes by using the second impedance matching circuit when the second duplexer among the first duplexer and the second duplexer is electrically connected to the antenna via the switch. In an embodiment, the at least one processor may be configured to maintain a center frequency of the second filter in the first duplexer to a third frequency by using the first impedance matching circuit when transmitting the first signal and receiving the second signal via an antenna electrically connected to the first duplexer among the first duplexer and the second duplexer through the switch; and maintaining a center frequency of a second filter in the second duplexer to a fourth frequency by using a second impedance matching circuit when transmitting the fifth signal and receiving the sixth signal through an antenna electrically connected to the second duplexer among the first and second duplexers via a switch.

In an example embodiment, the antenna may be a first antenna; wherein the electronic device may further include a second antenna (e.g., second antenna 390), and another RFFE (e.g., second RFFE 360) operatively coupled with the at least one processor, the another RFFE comprising: another switch (e.g., switch 365); a duplexer (e.g., duplexer 362) including a first filter passing the fifth signal and a second filter passing the sixth signal and a filter passing the second signal (e.g., filter 361), and wherein the at least one processor may be further configured to change a center frequency of the second filter in the first duplexer to the first frequency by using the first impedance matching circuit when the first signal and the sixth signal are transmitted and received through a first antenna electrically connected to both the first and second duplexers via the switch; and transmitting the fifth signal and receiving the second signal and the sixth signal through a second antenna electrically connected to both the diplexer and the filter in the other RFFE through the other switch when the first signal and the second signal are transmitted through a first antenna electrically connected to both the first diplexer and the second diplexer through the switch.

In an example embodiment, the first impedance matching circuit may include at least one variable capacitor; wherein the second impedance matching circuit may comprise at least one variable capacitor; and wherein the at least one processor may be configured to change the center frequency of the second filter in the first diplexer to the first frequency based on changing the capacitance value of at least one variable capacitor in the second impedance matching circuit; or changing the center frequency of the second filter in the second diplexer to a second frequency based on changing the capacitance value of at least one variable capacitor in the first impedance matching circuit.

In an example embodiment, an electronic device (e.g., electronic device 101) may include: an antenna (e.g., first antenna 358); a Radio Frequency Front End (RFFE) (e.g., first RFFE 310) comprising: a switch (e.g., switch 340); a first diplexer (e.g., first diplexer 320), the first diplexer comprising: a first filter (e.g., first filter 321) that passes a first signal in an uplink frequency range of a first frequency band; and a second filter (e.g., second filter 322) that passes a second signal in a downlink frequency range of the first frequency band and a fourth signal in a downlink frequency range of the second frequency band that partially overlaps the downlink frequency range of the first frequency band, and the first duplexer is connectable with an antenna via a switch; a second diplexer (e.g., second diplexer 330), the second diplexer comprising: a first filter (e.g., first filter 331) that passes the third signal in the uplink frequency range of the second frequency band and the fifth signal in the uplink frequency range of the third frequency band; and a second filter (e.g., second filter 332) that passes a sixth signal in a downlink frequency range of the third frequency band that is separate from and partially overlapping with the downlink frequency range of the first frequency band, and that is connectable to the antenna via a switch; a first impedance matching circuit (e.g., first impedance matching circuit 346) electrically connected to a second filter of the first duplexer among the first filter in the first duplexer and the second filter in the first duplexer; and a second impedance matching circuit (e.g., second impedance matching circuit 347) electrically connected to the first filter of the second diplexer and a second filter of the second diplexer among the first filter of the second diplexer; and at least one processor (e.g., processor 300) operatively coupled with the RFFE, wherein the at least one processor may be configured to change characteristics of the second filter in the first duplexer and a filter among the second filters of the second duplexer by using an impedance matching circuit among the first impedance matching circuit and the second impedance matching circuit when both the first duplexer and the second duplexer are connectable with the antenna via the switch.

In an example embodiment, the at least one processor may be configured to change a characteristic of the second filter in the first duplexer by using a first impedance matching circuit among the first impedance matching circuit and the second impedance matching circuit when transmitting the first signal and receiving the second signal through an antenna electrically connected to both the first duplexer and the second duplexer, and to change a characteristic of the second filter in the second duplexer by using a second impedance matching circuit among the first impedance matching circuit and the second impedance matching circuit when transmitting the third signal and receiving the fourth signal through an antenna electrically connected to both the first duplexer and the second duplexer.

In an example embodiment, the at least one processor may be further configured to: the characteristics of the second filter in the first duplexer are maintained by using the first impedance matching circuit when the first duplexer among the first duplexer and the second duplexer is electrically connected to the antenna via the switch, and the characteristics of the second filter in the second duplexer are maintained by using the second impedance matching circuit when the second duplexer among the first duplexer and the second duplexer is electrically connected to the antenna via the switch.

In an example embodiment, the at least one processor may be configured to maintain characteristics of the second filter in the first duplexer by using the first impedance matching circuit when transmitting the first signal and receiving the second signal through an antenna electrically connected to the first duplexer among the first and second duplexers through the switch, and to maintain characteristics of the second filter in the second duplexer by using the second impedance matching circuit when transmitting the fifth signal and receiving the sixth signal through an antenna electrically connected to the second duplexer among the first and second duplexers through the switch.

An electronic device according to some embodiments may be one of various types of electronic devices. The electronic device may include, for example, a portable communication device (e.g., a smart phone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a household appliance. According to the embodiment, the electronic device is not limited to those described above.

It should be understood that the various embodiments of the disclosure and the terminology used therein are not intended to limit the technical features set forth herein to the particular embodiments, but rather include various modifications, equivalents or alternatives to the respective embodiments. For the description of the drawings, like reference numerals may be used to refer to like or related elements. It will be understood that the singular form of a noun corresponding to an item may include one or more things unless the context clearly indicates otherwise. As used herein, each of the phrases such as "a or B", "at least one of a and B", "at least one of a or B", "A, B or C", "at least one of A, B and C", and "at least one of A, B or C" may include any or all possible combinations of the items listed with the corresponding one of the plurality of phrases. As used herein, terms such as "1 st" and "2 nd" or "first" and "second" may be used to simply distinguish one element from another element and not to limit the element in other respects (e.g., importance or order). It will be understood that if the term "operatively" or "communicatively" is used or the term "operatively" or "communicatively" is not used, then if an element (e.g., a first element) is referred to as being "coupled to," "connected to," or "connected to" another element (e.g., a second element), it means that the element can be directly (e.g., wired) coupled to, or at least be coupled to the other element via a third element.

As used herein, the term "module" may include units implemented in hardware, software, or firmware, and may be used interchangeably with other attributes (e.g., "logic," "logic blocks," "portions," or "circuitry"). A module may be a single integrated component adapted to perform one or more functions or a minimal unit or portion of the single integrated component. For example, according to an embodiment, a module may be implemented in the form of an Application Specific Integrated Circuit (ASIC).

The various embodiments set forth herein may be implemented as software (e.g., program 140) comprising one or more instructions stored in a storage medium (e.g., internal memory 136 or external memory 138) readable by a machine (e.g., electronic device 101). For example, under control of a processor, a processor (e.g., processor 120) of the machine (e.g., electronic device 101) may invoke and execute at least one of the one or more instructions stored in the storage medium with or without the use of one or more other components. This enables the machine to operate to perform at least one function in accordance with the at least one instruction invoked. The one or more instructions may include code generated by a compiler or code capable of being executed by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Wherein the term "non-transitory" merely means that the storage medium is a tangible device and does not include a signal (e.g., electromagnetic waves), but the term does not distinguish between data being semi-permanently stored in the storage medium and data being temporarily stored in the storage medium.

Methods according to various embodiments of the present disclosure may be included and provided in computer program products. The computer program product may be used as a product for conducting transactions between sellers and buyers. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disk read only memory (CD-ROM)), or may be distributed (e.g., downloaded or uploaded) online via an application Store (e.g., play Store ^TM), or may be distributed (e.g., downloaded or uploaded) directly between two user devices (e.g., smart phones). At least some of the computer program product may be temporarily generated if published online, or at least some of the computer program product may be stored at least temporarily in a machine readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a forwarding server.

According to various embodiments, each of the above-described components (e.g., modules or programs) may include a single entity or multiple entities. According to various embodiments, one or more of the above components may be omitted, or one or more other components may be added. Alternatively or additionally, multiple components (e.g., modules or programs) may be integrated into a single component. In this case, according to various embodiments, the integrated component may still perform the one or more functions of each of the plurality of components in the same or similar manner as the corresponding one of the plurality of components performed the one or more functions prior to integration. According to various embodiments, operations performed by a module, a program, or another component may be performed sequentially, in parallel, repeatedly, or in a heuristic manner, or one or more of the operations may be performed in a different order or omitted, or one or more other operations may be added.

Claims

1. An electronic device, the electronic device comprising:

The antenna is arranged to be connected to the antenna,

A radio frequency front end RFFE, the radio frequency front end comprising:

A first diplexer, the first diplexer comprising: a first filter configured to pass a first signal in an uplink frequency range of a first frequency band; and

A second filter configured to pass a second signal in a downlink frequency range of the first frequency band and a fourth signal in a downlink frequency range of a second frequency band that partially overlaps the downlink frequency range of the first frequency band; and

A second diplexer, the second diplexer comprising: a first filter configured to pass a third signal in an uplink frequency range of the second frequency band and a fifth signal in an uplink frequency range of a third frequency band; and a second filter configured to pass a sixth signal in a downlink frequency range of the third frequency band that is separate from and partially overlapping the downlink frequency range of the first frequency band; and

At least one processor operably coupled with the RFFE, the at least one processor configured to:

At least one of the following is performed when both the first and second diplexers are electrically connected to the antenna: (a) Changing a cutoff frequency of the second filter in the first duplexer to a first frequency that cuts off the sixth signal in a portion where the downlink frequency range of the third frequency band partially overlaps the downlink frequency range of the second frequency band, and/or (b) changing a cutoff frequency of the second filter in the second duplexer to a second frequency that cuts off the fourth signal in a portion where the downlink frequency range of the second frequency band partially overlaps the downlink frequency range of the third frequency band.

2. The electronic device of claim 1, wherein the at least one processor is further configured to:

Changing a cutoff frequency of the second filter in the second duplexer to the second frequency when the third signal is transmitted and the fourth signal is received via the antenna electrically connected to both the first duplexer and the second duplexer; and

When the first signal is transmitted and the second signal and the sixth signal are received via the antenna electrically connected to both the first duplexer and the second duplexer, a cut-off frequency of the second filter in the first duplexer is changed to the first frequency.

3. The electronic device of claim 1, wherein the at least one processor is further configured to:

Maintaining a cutoff frequency of the second filter in the first duplexer to a third frequency at which both the second signal in the downlink frequency range of the first frequency band and the fourth signal in the downlink frequency range of the second frequency band pass when the first duplexer among the first duplexer and the second duplexer is electrically connected to the antenna; and

When the second duplexer among the first duplexer and the second duplexer is electrically connected with the antenna, a cut-off frequency of the second filter in the second duplexer is maintained at a fourth frequency at which the sixth signal in the downlink frequency range of the third frequency band passes.

4. The electronic device of claim 3, wherein the at least one processor is further configured to:

Maintaining a cut-off frequency of the second filter in the first duplexer to the third frequency when the first signal is transmitted and the second signal is received via the antenna electrically connected to the first duplexer among the first duplexer and the second duplexer; and

The cut-off frequency of the second filter in the second duplexer is maintained at the fourth frequency while the fifth signal is transmitted and the sixth signal is received via the antenna electrically connected to the second duplexer among the first duplexer and the second duplexer.

5. The electronic device of claim 1, wherein the RFFE further comprises a switch,

Wherein the first diplexer is connectable to the antenna via the switch,

Wherein the second diplexer is connectable to the antenna via the switch, and

Wherein the at least one processor is further configured to change a cut-off frequency of the second filter in the first diplexer to the first frequency and/or to change a cut-off frequency of the second filter in the second diplexer to the second frequency when controlling the switch to electrically connect both the first diplexer and the second diplexer to the antenna.

6. The electronic device of claim 5, wherein the at least one processor is further configured to:

Maintaining a cut-off frequency of the second filter in the first duplexer to a third frequency at which the second signal in the downlink frequency range of the first frequency band and the fourth signal in the downlink frequency range of the second frequency band pass when the switch is controlled to electrically connect the first duplexer and the antenna among the first duplexer and the second duplexer; and

When the switch is controlled to electrically connect the second duplexer among the first duplexer and the second duplexer with the antenna, a cut-off frequency of the second filter in the second duplexer is maintained at a fourth frequency at which the sixth signal in the downlink frequency range of the third frequency band passes.

7. The electronic device of claim 5, wherein the RFFE further comprises:

A first impedance matching circuit electrically connected with the first diplexer and with the switch; and

A second impedance matching circuit electrically connected to the second diplexer and to the switch, and

Wherein the at least one processor is further configured to:

When the switch is controlled to electrically connect both the first duplexer and the second duplexer with the antenna, a cut-off frequency of the second filter in the first duplexer is changed to the first frequency by using at least the first impedance matching circuit, and/or a cut-off frequency of the second filter in the second duplexer is changed to the second frequency by using at least the second impedance matching circuit.

8. The electronic device of claim 5, wherein the RFFE further comprises:

A first impedance matching circuit electrically connected to the second filter in the first duplexer; and

A second impedance matching circuit electrically connected to the second filter in the second duplexer, and

Wherein the at least one processor is further configured to:

9. The electronic device of claim 1, wherein the antenna comprises a first antenna,

Wherein the electronic device further comprises:

A second antenna, and

Another RFFE operatively coupled with the at least one processor, the another RFFE comprising:

A diplexer, the diplexer comprising: a first filter configured to pass the fifth signal; and a second filter configured to pass the sixth signal; and

A filter configured to pass the second signal, and wherein the at least one processor is further configured to:

Changing a cut-off frequency of the second filter in the first duplexer to the second frequency when the first signal is transmitted and the second signal and a sixth signal are received via the first antenna electrically connected to both the first duplexer and the second duplexer; and

When the first signal and the second signal are transmitted and received via the first antenna electrically connected to both the first duplexer and the second duplexer, the fifth signal and the second signal are transmitted and received via the second antenna electrically connected to both the duplexer and the filter in the other RFFE.

10. The electronic device of claim 1, wherein the uplink frequency range of the first frequency band, the uplink frequency range of the second frequency band, and the uplink frequency range of the third frequency band are separate from one another.

11. An electronic device, the electronic device comprising: an antenna; and a radio frequency front end RFFE, the radio frequency front end comprising: a first diplexer, the first diplexer comprising: a first filter configured to pass a first signal in an uplink frequency range of a first frequency band; and a second filter configured to pass a second signal in a downlink frequency range of the first frequency band and a fourth signal in a downlink frequency range of a second frequency band that partially overlaps the downlink frequency range of the first frequency band; and a second diplexer, the second diplexer comprising: a first filter configured to pass a third signal in an uplink frequency range of the second frequency band and a fifth signal in an uplink frequency range of a third frequency band; and a second filter configured to pass sixth signals in a downlink frequency range of the third frequency band that is separate from the downlink frequency range of the first frequency band and partially overlaps the downlink frequency range of the second frequency band, the method comprising:

when both the first duplexer and the second duplexer are electrically connected to the antenna, a cutoff frequency of the second filter in the first duplexer is changed to a first frequency at which the sixth signal in a portion where the downlink frequency range of the third frequency band partially overlaps with the downlink frequency range of the second frequency band is cut off, or a cutoff frequency of the second filter in the second duplexer is changed to a second frequency at which the fourth signal in a portion where the downlink frequency range of the second frequency band partially overlaps with the downlink frequency range of the third frequency band is cut off.

12. The method of claim 11, the method further comprising:

13. The method of claim 11, the method further comprising:

14. The method of claim 13, the method further comprising:

15. The method of claim 11, wherein the RFFE further comprises a switch,

Wherein the first diplexer is connectable to the antenna via the switch,

Wherein the second diplexer is connectable to the antenna via the switch, and

Wherein the method further comprises changing a cut-off frequency of the second filter in the first diplexer to the first frequency and/or changing a cut-off frequency of the second filter in the second diplexer to the second frequency when controlling the switch to electrically connect both the first diplexer and the second diplexer to the antenna.