CN118136692A - SiC Schottky diode based on GaN HEMT junction terminal - Google Patents

SiC Schottky diode based on GaN HEMT junction terminal Download PDF

Info

Publication number
CN118136692A
CN118136692A CN202410559014.0A CN202410559014A CN118136692A CN 118136692 A CN118136692 A CN 118136692A CN 202410559014 A CN202410559014 A CN 202410559014A CN 118136692 A CN118136692 A CN 118136692A
Authority
CN
China
Prior art keywords
layer
sic
gan
electrode
aln
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202410559014.0A
Other languages
Chinese (zh)
Inventor
崔鹏
代嘉铖
韩吉胜
汉多科·林纳威赫
徐现刚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shandong University
Original Assignee
Shandong University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shandong University filed Critical Shandong University
Priority to CN202410559014.0A priority Critical patent/CN118136692A/en
Publication of CN118136692A publication Critical patent/CN118136692A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

The invention discloses a SiC Schottky diode based on a GaN HEMT junction terminal, which relates to the technical field of microelectronics and comprises a SiC substrate and a GaN HEMT junction terminal which is prepared on the SiC substrate and is composed of a GaN buffer layer, a second AlN intercalation layer, an AlGaN barrier layer and a GaN cap layer, wherein the Schottky diode is composed of the SiC substrate, an n + -SiC buffer layer, an n-SiC layer, a first Ni electrode, a second Ni electrode, an Au electrode and a SiO 2 passivation layer. The AlGaN/GaN is used as the junction terminal, so that the electric field of the junction terminal is effectively balanced, the fringe peak electric field is reduced, the breakdown voltage of the device is improved, and meanwhile, the method has the advantages of being simple in process flow, low in preparation cost and capable of improving the reliability of the breakdown voltage of the SiC SBD.

Description

SiC Schottky diode based on GaN HEMT junction terminal
Technical Field
The invention relates to the technical field of microelectronics, in particular to a SiC Schottky diode based on a GaN HEMT junction terminal.
Background
With the development of power semiconductor devices, silicon-based devices are limited by basic characteristics of materials, and cannot meet the requirements of low power consumption, good reliability, fast switching frequency and the like, and cannot meet the requirements of aerospace, 5G communication, large-scale high-power electronic transmission lines and the like. At present, the main direction of attack of the power semiconductor device is to use a third generation wide bandgap semiconductor material, such as silicon carbide (SiC), gallium nitride (GaN) and the like, and the bandgap is larger than that of the traditional silicon, so that the intrinsic carrier concentration is very low, the manufactured device has the advantages of higher intrinsic temperature, smaller leakage current, lower power consumption, high thermal conductivity, high electron saturation drift rate and high critical breakdown field strength.
The Schottky barrier diode (Schottky Barrier Diode, SBD) prepared from the SiC material is used as a unipolar power device, and has the advantages of low switching loss, high recovery speed, simple manufacturing process and the like. However, since the conventional SiC SBD is susceptible to a spike discharge effect due to a junction termination fringe electric field, and a large number of defects are generated at a junction between the schottky metal and the semiconductor, the schottky metal fringe is easily broken down, and the schottky metal fringe leakage problem of the SiC SBD limits further development in high power applications and reduces reverse cut-off performance.
In addition, siC SBDs generally use ion implantation to form junction terminals, which requires high temperature conditions, requires high equipment requirements, has a long production cycle, and often involves problems such as ion activation and long-term stability when using ion implantation to form junction terminals of SiC SBDs.
Disclosure of Invention
In order to solve the problems, the invention provides the SiC Schottky diode based on the GaN HEMT junction terminal, which adopts AlGaN/GaN as the junction terminal, effectively balances the electric field of the junction terminal, reduces the fringe peak electric field, improves the breakdown voltage of the device, and has the advantages of simple process flow, low preparation cost and improves the reliability of the breakdown voltage of the SiC SBD.
In order to achieve the above purpose, the present invention adopts the following technical scheme:
In a first aspect, the present invention provides a SiC schottky diode based on a GaN HEMT junction termination, comprising: a SiC substrate, an n + -SiC buffer layer and an n-SiC layer which are sequentially grown on the SiC substrate, and a first Ni electrode prepared under the SiC substrate;
Sequentially preparing a second Ni electrode and an Au electrode upwards in a Schottky contact area of the n-SiC layer;
a first AlN intercalation layer, a GaN buffer layer, a second AlN intercalation layer, an AlGaN barrier layer and a GaN cap layer are sequentially grown upwards in other areas of the n-SiC layer, and the GaN buffer layer, the second AlN intercalation layer, the AlGaN barrier layer and the GaN cap layer form a GaN HEMT junction terminal;
A SiO 2 passivation layer grows above the n-SiC layer, the GaN cap layer, the second Ni electrode and the Au electrode; the SiC substrate, the n + -SiC buffer layer, the n-SiC layer, the first Ni electrode, the second Ni electrode, the Au electrode and the SiO 2 passivation layer form a Schottky diode.
As an alternative embodiment, the thickness of the n + -SiC buffer layer is 0.2-2 μm.
As an alternative embodiment, the n-type doping concentration of the n + -SiC buffer layer is 1 x 10 16~1×1019cm-3.
In an alternative embodiment, the thickness of the n-SiC layer is 1 to 100 μm.
Alternatively, the n-SiC layer has a doping concentration of 1 x 10 15~1×1017cm-3.
In an alternative embodiment, the thickness of the first AlN intercalation is 1 to 1000nm.
In an alternative embodiment, the thickness of the second AlN intercalation is 0.5-2 nm.
As an alternative implementation mode, the thickness of the GaN buffer layer is 0.5-5 μm.
In an alternative embodiment, the thickness of the AlGaN barrier layer is 10-25 nm.
As an alternative implementation mode, the thickness of the GaN cap layer is 1-5 nm.
In an alternative embodiment, the thickness of the first Ni electrode is 10 to 1000nm.
In a second aspect, the present invention provides a method for preparing a SiC schottky diode based on a GaN HEMT junction termination, including:
Sequentially epitaxially growing an n + -SiC buffer layer and an n-SiC layer on the SiC substrate upwards;
Sequentially epitaxially growing a first AlN intercalation layer, a GaN buffer layer, a second AlN intercalation layer, an AlGaN barrier layer and a GaN cap layer on the n-SiC layer upwards;
Removing the first AlN intercalation, the GaN buffer layer, the second AlN intercalation, the AlGaN barrier layer and the GaN cap layer of the non-Schottky contact region by dry etching;
Evaporating a first Ni electrode below the SiC substrate, and forming ohmic contact through annealing treatment;
Sequentially evaporating a second Ni electrode and an Au electrode above the Schottky contact area of the n-SiC layer to form Schottky contact;
Growing a SiO 2 passivation layer above the n-SiC layer, the GaN cap layer, the second Ni electrode and the Au electrode;
Openings are made in the passivation layer of SiO 2, which openings terminate on the Au electrode.
As an alternative embodiment, a groove is formed by removing the first AlN intercalation, the GaN buffer layer, the second AlN intercalation, the AlGaN barrier layer and the GaN cap layer, which are not schottky contact regions, using dry etching, a second Ni electrode is prepared in the groove, and a second Ni electrode is prepared above the GaN cap layer.
Compared with the prior art, the invention has the beneficial effects that:
(1) Higher breakdown voltage. The conventional SiC SBD is easy to break down due to the fact that peak occurs in the junction terminal fringe electric field, defects exist at the joint between the Schottky metal and the semiconductor, and the like, so that high-power application of the SiC SBD is restricted, and reverse cut-off performance is reduced. According to the invention, alGaN/GaN is used as a junction terminal, and two-dimensional electron gas is generated at the interface of the AlGaN/GaN heterostructure, so that the electric field of the junction terminal can be effectively balanced, the fringe peak electric field is reduced, and the breakdown voltage of the device is improved. Meanwhile, because GaN materials different from SiC are used, the energy band heights have larger difference, so that n-SiC/GaN forms larger band step difference and has larger potential barrier at the interface, thereby greatly improving the breakdown voltage of the device.
(2) Low cost. SiC SBDs typically use ion implantation to form junction terminations, which require high temperature conditions, high equipment requirements, and long manufacturing cycles. The invention uses the epitaxial technology to grow AlGaN/GaN as a junction terminal, and has simple process flow and low preparation cost.
(3) High reliability. When the junction termination of SiC SBD is formed using ion implantation, problems such as ion activation and long-term stability are often associated. According to the invention, alGaN/GaN is used as the SiC SBD junction terminal, and the problems of ion attenuation and the like are avoided due to the existence of a two-dimensional electron gas interface in AlGaN/GaN, so that the ion implantation process is avoided, the advantage of high reliability is achieved, and the reliability of the breakdown voltage of the SiC SBD is effectively improved.
Additional aspects of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention.
Fig. 1 is a schematic diagram of an overall structure of a SiC schottky diode based on a GaN HEMT junction termination provided in an embodiment of the present invention;
FIG. 2 is a schematic diagram of a SiC substrate;
FIG. 3 is a schematic structural diagram obtained through step S1 in the preparation method according to the embodiment of the present invention;
Fig. 4 is a schematic structural diagram obtained through step S2 in the preparation method according to the embodiment of the present invention;
fig. 5 is a schematic structural diagram obtained through step S3 in the preparation method according to the embodiment of the present invention;
Fig. 6 is a schematic structural diagram obtained through step S4 in the preparation method according to the embodiment of the present invention;
fig. 7 is a schematic structural diagram obtained through step S5 in the preparation method according to the embodiment of the present invention;
fig. 8 is a schematic structural diagram obtained through step S6 in the preparation method according to the embodiment of the present invention;
fig. 9 is a schematic structural diagram obtained through step S7 in the preparation method according to the embodiment of the present invention;
FIG. 10 is a layout of a dead-end SiC SBD space charge area;
FIG. 11 is a SiC SBD space charge region layout of a GaN HEMT junction termination;
FIG. 12 is an energy band diagram at the GaN HEMT, alN, n-SiC interface;
FIG. 13 is a breakdown voltage comparison plot of SiC SBD without termination SiC SBD and GaN HEMT junction termination;
The semiconductor device comprises a substrate 101, a SiC substrate 102, an n + -SiC buffer layer, a 103, an n-SiC layer, a 104, a first AlN intercalation layer, a 105, a GaN buffer layer, a 106, a second AlN intercalation layer, a 107, an AlGaN barrier layer, a 108, a GaN cap layer, a 109, a first Ni electrode, a 110, a second Ni electrode, a 111, an Au electrode, a 112 and a SiO 2 passivation layer.
Detailed Description
The invention is further described below with reference to the drawings and examples.
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the invention. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the present invention. As used herein, unless the context clearly indicates otherwise, the singular forms also are intended to include the plural forms, and furthermore, it is to be understood that the terms "comprises" and "comprising" and any variations thereof are intended to cover non-exclusive inclusions, e.g., processes, methods, systems, products or devices that comprise a series of steps or units, are not necessarily limited to those steps or units that are expressly listed, but may include other steps or units that are not expressly listed or inherent to such processes, methods, products or devices.
Embodiments of the invention and features of the embodiments may be combined with each other without conflict.
Example 1
As shown in fig. 1, the present embodiment provides a SiC schottky diode based on a GaN HEMT (GaN High Electron Mobility Transistor, gallium nitride high electron mobility transistor) junction termination, including: a SiC substrate 101, an n + -SiC buffer layer 102 and an n-SiC layer 103 grown in this order on the SiC substrate 101, and a first Ni electrode 109 prepared under the SiC substrate 101;
Sequentially preparing a second Ni electrode 110 and an Au electrode 111 upwards in the Schottky contact area of the n-SiC layer 103;
A first AlN intercalation layer 104, a GaN buffer layer 105, a second AlN intercalation layer 106, an AlGaN barrier layer 107 and a GaN cap layer 108 are sequentially grown upwards in other areas of the n-SiC layer 103; the GaN buffer layer 105, the second AlN intercalation layer 106, the AlGaN barrier layer 107 and the GaN cap layer 108 form a GaN HEMT junction terminal;
A SiO 2 passivation layer 112 is grown over the n-SiC layer 103, the GaN cap layer 108, the second Ni electrode 110, and the Au electrode 111; the SiC substrate 101, the n + -SiC buffer layer 102, the n-SiC layer 103, the first Ni electrode 109, the second Ni electrode 110, the Au electrode 111, and the SiO 2 passivation layer 112 constitute a schottky diode.
More specifically: a GaN HEMT junction termination based SiC schottky diode includes a SiC substrate 101, an n + -SiC buffer layer 102 located on the SiC substrate 101, an n-SiC layer 103 located on the n + -SiC buffer layer 102, a first AlN interlayer 104 located on the n-SiC layer 103, a GaN buffer layer 105 located on the first AlN interlayer 104, a second AlN interlayer 106 located on the GaN buffer layer 105, an AlGaN barrier layer 107 located on the second AlN interlayer 106, a GaN cap layer 108 located on the AlGaN barrier layer 107, a first Ni (nickel) electrode located under the SiC substrate 101, a second Ni electrode 110 located on the n-SiC layer 103 and the GaN cap layer 108, an Au (gold) electrode located on the second Ni electrode 110, and a SiO 2 (silicon dioxide) passivation layer located on the n-SiC layer 103, the GaN cap layer 108, the second Ni electrode 110, and the Au electrode 111.
Further, siO 2 passivation layer 112 is grown on both end regions of n-SiC layer 103 except for the second Ni electrode 110 and first AlN interlayer 104, and SiO 2 passivation layer 112 is grown on GaN cap layer 108, second Ni electrode 110, and Au electrode 111 in this order along the sides of first AlN interlayer 104, gaN buffer layer 105, second AlN interlayer 106, alGaN barrier layer 107, and GaN cap layer 108.
Because the conventional SiC SBD is easy to break down due to the fact that peak occurs in a junction terminal fringe electric field, a large number of defects exist at the junction between the Schottky metal and the semiconductor, high-power application of the SiC SBD is severely restricted, and reverse cut-off performance is reduced. Therefore, in this embodiment, alGaN (aluminum gallium nitride)/GaN (gallium nitride) is used as a junction terminal, and since the AlGaN/GaN heterostructure generates two-dimensional electron gas at an interface thereof, an electric field of the junction terminal can be effectively balanced, a fringe peak electric field can be reduced, and a breakdown voltage of the device can be improved. Meanwhile, because GaN materials different from SiC are used, the energy band heights have larger difference, so that n-SiC/GaN forms larger band step difference and has larger potential barrier at the interface, thereby greatly improving the breakdown voltage of the device.
And moreover, alGaN/GaN is grown by using an epitaxial technology as a junction terminal, so that the process flow is simple and the preparation cost is low. Meanwhile, as the two-dimensional electron gas interface exists in AlGaN/GaN, the carrier concentration of the interface is generally 5 multiplied by 10 12~1×1013cm-2, the problems of ion attenuation and the like can not occur, the ion implantation process is avoided, the advantages of high reliability are achieved, and the reliability of the breakdown voltage of the SiC SBD can be effectively improved.
As an alternative embodiment, the thickness of the n + -SiC buffer layer 102 is 0.2-2 μm.
Further preferably, the thickness of the n + -SiC buffer layer 102 is 1 [ mu ] m.
As an alternative embodiment, the n-type doping concentration of the n + -SiC buffer layer 102 is 1×10 16~1×1019cm-3.
Further preferably, the n-type doping concentration of the n + -SiC buffer layer 102 is 1×10 17cm-3.
Alternatively, the thickness of the n-SiC layer 103 is 1 to 100 μm.
Further preferably, the thickness of the n-SiC layer 103 is 10. Mu.m.
Alternatively, the n-SiC layer 103 may have a doping concentration of 1×10 15~1×1017cm-3.
Further preferably, the n-SiC layer 103 has a doping concentration of 5×10 15cm-3.
In an alternative embodiment, the thickness of the first AlN (aluminum nitride) intercalation is 1-1000 nm.
Further preferably, the thickness of the first AlN interlayer 104 is 100nm.
Alternatively, the thickness of the GaN buffer layer 105 is 0.5-5 μm.
Further preferably, the GaN buffer layer 105 has a thickness of 1.5 μm.
Alternatively, the thickness of the second AlN interlayer 106 may be 0.5-2 nm.
Further preferably, the thickness of the second AlN interlayer 106 is 1nm.
In an alternative embodiment, the thickness of the AlGaN barrier layer 107 is 10 to 25nm.
Further preferably, the AlGaN barrier layer 107 has a thickness of 25nm.
Alternatively, the thickness of the GaN cap layer 108 is 1-5 nm.
Further preferably, the thickness of the GaN cap layer 108 is 2nm.
In an alternative embodiment, the thickness of the first Ni electrode 109 is 10 to 1000nm.
Further preferably, the thickness of the first Ni electrode 109 is 200nm.
The preparation method of the SiC Schottky diode based on the GaN HEMT junction terminal specifically comprises the following steps:
s1, as shown in FIG. 2, a substrate made of silicon carbide is adopted, and an n + -SiC buffer layer 102 and an n-SiC layer 103 are sequentially and epitaxially grown on a SiC substrate 101, as shown in FIG. 3.
S2, a first AlN interlayer 104, a GaN buffer layer 105, a second AlN interlayer 106, an AlGaN barrier layer 107, and a GaN cap layer 108 are epitaxially grown in this order upward on the n-SiC layer 103, as shown in fig. 4.
S3, the first AlN interlayer 104, the GaN buffer layer 105, the second AlN interlayer 106, the AlGaN barrier layer 107, and the GaN cap layer 108, which are not schottky contact regions, are removed using dry etching, as shown in fig. 5.
S4, the first Ni electrode 109 is evaporated under the SiC substrate 101, and an ohmic contact is formed by annealing, as shown in fig. 6.
And S5, sequentially evaporating a second Ni electrode 110 and an Au electrode 111 above the Schottky contact region of the n-SiC layer 103 to form Schottky contact, as shown in FIG. 7.
S6, a SiO 2 passivation layer 112 is grown over the n-SiC layer 103, the GaN cap layer 108, the second Ni electrode 110, and the Au electrode 111, as shown in FIG. 8.
S7, openings are formed in the SiO 2 passivation layer 112, and the openings are cut off to the Au electrode 111, as shown in FIG. 9.
As an alternative embodiment, the growth methods of the n + -SiC buffer layer and the n-SiC layer in step S1 are high-quality film forming methods such as Liquid Phase Epitaxy (LPE), metal Organic Chemical Vapor Deposition (MOCVD), and Molecular Beam Epitaxy (MBE).
Further preferably, the n + -SiC buffer layer 102 and the n-SiC layer 103 in step S1 are grown by Liquid Phase Epitaxy (LPE).
As an alternative embodiment, the growth methods of the first AlN interlayer 104, the GaN buffer layer 105, the second AlN interlayer 106, the AlGaN barrier layer 107, and the GaN cap layer 108 in step S2 include high-quality film forming methods such as Metal Organic Chemical Vapor Deposition (MOCVD) and Molecular Beam Epitaxy (MBE).
Further preferably, the growth method of the first AlN interlayer 104, the GaN buffer layer 105, the second AlN interlayer 106, the AlGaN barrier layer 107, and the GaN cap layer 108 in step S2 employs a Metal Organic Chemical Vapor Deposition (MOCVD).
In this embodiment, after growing the n + -SiC buffer layer 102 and the n-SiC layer 103 over the SiC substrate 101 by the LPE method, the first AlN interlayer 104, the GaN buffer layer 105, the second AlN interlayer 106, the AlGaN barrier layer 107, and the GaN cap layer 108 are grown by the MOCVD method, which specifically includes the steps of:
(1) Providing an SiC substrate epitaxial material for growing an n + -SiC/n-SiC/p-GaN heterojunction by an MOCVD method;
(2) Depositing an n + -SiC buffer layer and an n-SiC layer on the SiC substrate epitaxial material by adopting an LPE method;
(3) Growing a first AlN intercalation on the material obtained in the step (2) by adopting an MOCVD method;
(4) Growing a GaN buffer layer on the material obtained in the step (3) by adopting an MOCVD method;
(5) Growing a second AlN intercalation on the material obtained in the step (4) by adopting an MOCVD method;
(6) Growing an AlGaN barrier layer on the material obtained in the step (5) by adopting an MOCVD method;
(7) And (3) growing a GaN cap layer on the material obtained in the step (6) by adopting an MOCVD method.
Alternatively, the method of etching the AlN intercalation and the p-GaN cap layer (including the GaN buffer layer, alGaN barrier layer, and GaN cap layer) in step S3 includes inductively coupled plasma etching (ICP) or Reactive Ion Etching (RIE).
Further preferably, the method of etching the AlN intercalation and the p-GaN cap layer in step S3 is inductively coupled plasma etching (ICP).
In this embodiment, the specific process of etching the first AlN interlayer, the GaN buffer layer, the second AlN interlayer, the AlGaN barrier layer, and the GaN cap layer using ICP includes the steps of:
(1) Providing a first AlN intercalation, a GaN buffer layer, a second AlN intercalation, an AlGaN barrier layer and a GaN cap layer which need ICP etching and epitaxial materials thereof;
(2) Coating photoresist on the material provided in the step (1);
(3) Exposing the areas of the first AlN intercalation, the GaN buffer layer, the second AlN intercalation, the AlGaN barrier layer and the GaN cap layer to be etched on the photoresist by utilizing a photoetching development technology;
(4) Etching the first AlN intercalation layer, the GaN buffer layer, the second AlN intercalation layer, the AlGaN barrier layer and the GaN cap layer by using an ICP device;
(5) The coated photoresist is removed using a chemical solution to achieve that the first AlN intercalation, gaN buffer layer, second AlN intercalation, alGaN barrier layer and GaN cap layer are present only in specific areas.
Further, a groove is formed by removing the first AlN interlayer 104, the GaN buffer layer 105, the second AlN interlayer 106, the AlGaN barrier layer 107, and the GaN cap layer 108, which are not schottky contact regions, using dry etching, and a second Ni electrode 110 is prepared in the groove, and a second Ni electrode is prepared above the GaN cap layer 108.
Alternatively, the method of evaporating the first Ni electrode in step S4, evaporating the second Ni electrode and Au electrode in step S5 is electron beam evaporation or magnetron sputtering.
Further preferably, the method of vapor deposition of the first Ni electrode in step S4 and the second Ni electrode and Au electrode in step S5 is magnetron sputtering.
Alternatively, the first Ni electrode is annealed in step S4 at 950 ℃ in nitrogen N 2 for 40S.
Alternatively, the SiO 2 passivation layer is grown in a Low Pressure Chemical Vapor Deposition (LPCVD) process in step S6.
In this embodiment, in step S7, the passivation layer is formed by using ICP to open the SiO 2, which specifically includes the following steps:
(1) Providing GaN, n-SiC and epitaxial materials thereof which need ICP etching;
(2) Coating a photoresist on the material;
(3) Exposing a SiO 2 passivation layer region needing to be opened on the photoresist by utilizing a photoetching development technology;
(4) Etching the SiO 2 passivation layer by using an ICP device;
(5) The coated photoresist was removed using a chemical solution to achieve the SiO 2 passivation layer opening.
According to the SiC Schottky diode based on the GaN HEMT junction terminal and the preparation method thereof, higher breakdown voltage can be achieved. The AlGaN/GaN heterojunction structure is used as a junction terminal, and two-dimensional electron gas can be generated at the interface of the AlGaN/GaN heterojunction structure, so that the electric field of the junction terminal can be effectively balanced, the fringe peak electric field is reduced, and the breakdown voltage of the device is improved. The SiC SBD space-charge region layout without termination obtained by simulation is shown in fig. 10, and the SiC SBD space-charge region layout with termination of GaN HEMT junction obtained by simulation is shown in fig. 11, and it can be seen that the space-charge region is greatly expanded by the termination of GaN HEMT junction.
Meanwhile, because GaN materials different from SiC are used, the energy band heights have larger difference, so that n-SiC/GaN forms larger band step difference, and the interface of the n-SiC/GaN has larger potential barrier, thereby greatly improving the breakdown voltage of the device. As shown in fig. 12, the energy band diagram at the interface of GaN HEMT, alN and n-SiC obtained by simulation shows that the energy band difference between AlN and n-SiC is 5.2 eV, and the huge band step difference makes a higher potential barrier between AlN/n-SiC, which greatly improves the breakdown voltage. As shown in fig. 13, a breakdown voltage comparison graph of SiC SBD of the non-termination SiC SBD and the GaN HEMT junction termination obtained by simulation is shown, the breakdown voltage of SiC SBD of the non-termination SiC SBD is 1255V, the breakdown voltage of SiC SBD of the GaN HEMT junction termination is 2030V, which is improved by 61.8%, and the effectiveness of the structure proposed in this embodiment is demonstrated.
According to the SiC Schottky diode based on the GaN HEMT junction terminal and the preparation method thereof, alGaN/GaN is grown by using an epitaxial technology as the junction terminal, the process flow is simple, and the preparation cost is low. Meanwhile, as the two-dimensional electron gas interface exists in AlGaN/GaN, the carrier concentration of the interface is generally 5 multiplied by 10 12~1×1013cm-2, the problems of ion attenuation and the like can not occur, the ion implantation process is avoided, the advantages of high reliability are achieved, and the reliability of the breakdown voltage of the SiC SBD can be effectively improved.
While the foregoing description of the embodiments of the present invention has been presented in conjunction with the drawings, it should be understood that it is not intended to limit the scope of the invention, but rather, it is intended to cover all modifications or variations within the scope of the invention as defined by the claims of the present invention.

Claims (10)

1. SiC Schottky diode based on GaN HEMT junction termination, characterized by comprising: a SiC substrate, an n + -SiC buffer layer and an n-SiC layer which are sequentially grown on the SiC substrate, and a first Ni electrode prepared under the SiC substrate;
Sequentially preparing a second Ni electrode and an Au electrode upwards in a Schottky contact area of the n-SiC layer;
a first AlN intercalation layer, a GaN buffer layer, a second AlN intercalation layer, an AlGaN barrier layer and a GaN cap layer are sequentially grown upwards in other areas of the n-SiC layer, and the GaN buffer layer, the second AlN intercalation layer, the AlGaN barrier layer and the GaN cap layer form a GaN HEMT junction terminal;
A SiO 2 passivation layer grows above the n-SiC layer, the GaN cap layer, the second Ni electrode and the Au electrode; the SiC substrate, the n + -SiC buffer layer, the n-SiC layer, the first Ni electrode, the second Ni electrode, the Au electrode and the SiO 2 passivation layer form a Schottky diode.
2. The GaN HEMT junction termination based SiC schottky diode of claim 1, wherein the n + -SiC buffer layer has a thickness of 0.2-2 μm.
3. The GaN HEMT junction termination based SiC schottky diode of claim 1, wherein said n + -SiC buffer layer has an n-type doping concentration of 1 x 10 16~1×1019 cm-3.
4. The GaN HEMT junction termination based SiC schottky diode of claim 1, wherein said n-SiC layer has a thickness of 1-100 μm.
5. The GaN HEMT junction termination based SiC schottky diode of claim 1, wherein said n-SiC layer has a doping concentration of 1 x 10 15~1×1017cm-3.
6. The GaN HEMT junction termination based SiC schottky diode of claim 1,
The thickness of the first AlN intercalation is 1-1000 nm;
The thickness of the second AlN intercalation is 0.5-2 nm.
7. The GaN HEMT junction termination based SiC schottky diode of claim 1,
The thickness of the GaN buffer layer is 0.5-5 mu m;
The thickness of the AlGaN barrier layer is 10-25 nm;
the thickness of the GaN cap layer is 1-5 nm.
8. The GaN HEMT junction termination based SiC schottky diode of claim 1, wherein said first Ni electrode has a thickness of 10-1000 nm.
9. The preparation method of the SiC Schottky diode based on the GaN HEMT junction terminal is characterized by comprising the following steps of:
Sequentially epitaxially growing an n + -SiC buffer layer and an n-SiC layer on the SiC substrate upwards;
Sequentially epitaxially growing a first AlN intercalation layer, a GaN buffer layer, a second AlN intercalation layer, an AlGaN barrier layer and a GaN cap layer on the n-SiC layer upwards;
Removing the first AlN intercalation, the GaN buffer layer, the second AlN intercalation, the AlGaN barrier layer and the GaN cap layer of the non-Schottky contact region by dry etching;
Evaporating a first Ni electrode below the SiC substrate, and forming ohmic contact through annealing treatment;
Sequentially evaporating a second Ni electrode and an Au electrode above the Schottky contact area of the n-SiC layer to form Schottky contact;
Growing a SiO 2 passivation layer above the n-SiC layer, the GaN cap layer, the second Ni electrode and the Au electrode;
Openings are made in the passivation layer of SiO 2, which openings terminate on the Au electrode.
10. The GaN HEMT junction termination based SiC schottky diode of claim 9, wherein the first AlN intercalation, gaN buffer layer, second AlN intercalation, alGaN barrier layer and GaN cap layer of the non-schottky contact region are removed using dry etching to form a recess, a second Ni electrode is fabricated in the recess, and a second Ni electrode is fabricated over the GaN cap layer.
CN202410559014.0A 2024-05-08 2024-05-08 SiC Schottky diode based on GaN HEMT junction terminal Pending CN118136692A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202410559014.0A CN118136692A (en) 2024-05-08 2024-05-08 SiC Schottky diode based on GaN HEMT junction terminal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202410559014.0A CN118136692A (en) 2024-05-08 2024-05-08 SiC Schottky diode based on GaN HEMT junction terminal

Publications (1)

Publication Number Publication Date
CN118136692A true CN118136692A (en) 2024-06-04

Family

ID=91244323

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202410559014.0A Pending CN118136692A (en) 2024-05-08 2024-05-08 SiC Schottky diode based on GaN HEMT junction terminal

Country Status (1)

Country Link
CN (1) CN118136692A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104465795A (en) * 2014-11-19 2015-03-25 苏州捷芯威半导体有限公司 Schottky diode and manufacturing method thereof
US20210074807A1 (en) * 2018-09-12 2021-03-11 Institute of Microelectronics, Chinese Academy of Sciences Semiconductor device and preparation method thereof
CN115548012A (en) * 2022-09-26 2022-12-30 山东大学 High-reliability AlGaN/GaN HEMT and preparation method thereof
CN117613106A (en) * 2024-01-23 2024-02-27 山东大学 High-breakdown-voltage silicon carbide Schottky diode and preparation method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104465795A (en) * 2014-11-19 2015-03-25 苏州捷芯威半导体有限公司 Schottky diode and manufacturing method thereof
US20210074807A1 (en) * 2018-09-12 2021-03-11 Institute of Microelectronics, Chinese Academy of Sciences Semiconductor device and preparation method thereof
CN115548012A (en) * 2022-09-26 2022-12-30 山东大学 High-reliability AlGaN/GaN HEMT and preparation method thereof
CN117613106A (en) * 2024-01-23 2024-02-27 山东大学 High-breakdown-voltage silicon carbide Schottky diode and preparation method thereof

Similar Documents

Publication Publication Date Title
CN109742142A (en) A kind of GaN base HEMT device and preparation method thereof
CN112635544B (en) Enhanced AlGaN-GaN vertical super-junction HEMT with dipole layer and preparation method thereof
CN108711578A (en) A kind of part p-type GaN cap RESURF GaN base Schottky-barrier diodes
CN114899227A (en) Enhanced gallium nitride-based transistor and preparation method thereof
CN111081763B (en) Normally-off HEMT device with honeycomb groove barrier layer structure below field plate and preparation method thereof
CN117613106A (en) High-breakdown-voltage silicon carbide Schottky diode and preparation method thereof
CN109950324A (en) III group-III nitride diode component of p-type anode and preparation method thereof
CN109950323A (en) The III group-III nitride diode component and preparation method thereof for the superjunction that polarizes
CN116666428A (en) Gallium nitride Schottky diode and preparation method thereof
CN115910782B (en) Method for manufacturing normally-off high electron mobility transistor
CN115775730B (en) GaN Schottky diode with quasi-vertical structure and preparation method thereof
CN116314349A (en) GaN-based power Schottky diode with P-type two-dimensional material intercalation and preparation process thereof
CN116741805A (en) High-breakdown-voltage enhanced gallium nitride device and preparation method thereof
CN116387367A (en) High-voltage gallium oxide Schottky barrier diode with groove and field plate composite terminal structure
CN118136692A (en) SiC Schottky diode based on GaN HEMT junction terminal
CN112382662B (en) Gallium nitride enhancement mode device and method of making same
CN111739800B (en) Preparation method of SOI-based concave gate enhanced GaN power switch device
CN213212169U (en) Epitaxial structure of semiconductor device and semiconductor device
CN111192927B (en) Gallium oxide Schottky diode and manufacturing method thereof
CN111211176A (en) Gallium nitride-based heterojunction integrated device structure and manufacturing method
CN109873034B (en) Normally-off HEMT power device for depositing polycrystalline AlN and preparation method thereof
CN112599586B (en) High-reliability gallium nitride-based power device and preparation method thereof
CN112838006B (en) Gallium nitride PIN diode and preparation method thereof
CN109817728B (en) PIN diode device structure and preparation method thereof
CN118016665B (en) Enhanced GaN HEMT device on SiC substrate of integrated SBD

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination