CN117954505A - Diode structure - Google Patents

Diode structure Download PDF

Info

Publication number
CN117954505A
CN117954505A CN202211281352.XA CN202211281352A CN117954505A CN 117954505 A CN117954505 A CN 117954505A CN 202211281352 A CN202211281352 A CN 202211281352A CN 117954505 A CN117954505 A CN 117954505A
Authority
CN
China
Prior art keywords
semiconductor layer
type semiconductor
region
electrode
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202211281352.XA
Other languages
Chinese (zh)
Inventor
尹向阳
谢弟银
李静
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guangzhou Huarui Shengyang Investment Co ltd
Original Assignee
Guangzhou Huarui Shengyang Investment Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Guangzhou Huarui Shengyang Investment Co ltd filed Critical Guangzhou Huarui Shengyang Investment Co ltd
Priority to CN202211281352.XA priority Critical patent/CN117954505A/en
Publication of CN117954505A publication Critical patent/CN117954505A/en
Pending legal-status Critical Current

Links

Abstract

The invention discloses a diode structure, comprising: a first n-type semiconductor layer including a SnO 2 or Ga 2O3 -type compound semiconductor; the second n-type semiconductor layer is the same as the first n-type semiconductor layer semiconductor and is arranged on the upper surface of the first n-type semiconductor layer, and the upper surface of the second n-type semiconductor layer comprises a first region and a second region; a first p-type semiconductor layer provided in the first region, the upper surface including third to fifth regions; a third n-type semiconductor layer, the same as the first n-type semiconductor layer, the first and second portions being provided in the third and fourth regions, respectively; a second p-type semiconductor layer provided in the fifth region; a first electrode provided on a lower surface of the first n-type semiconductor layer; the insulating layer and the second electrode are sequentially arranged in the second region and extend to a partial region of the upper surface of the third n-type semiconductor layer; and the third electrode is arranged on the upper surface of the second electrode and extends to the upper surface of the second p-type semiconductor layer along with the residual area of the upper surface of the third n-type semiconductor layer. The diode of the invention has the advantages of reduced conduction voltage and small reverse leakage current.

Description

Diode structure
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to a diode structure.
Background
Semiconductor materials have evolved over several decades from the first generation of semiconductor materials germanium and silicon, to the second generation of semiconductor materials gallium arsenide and indium phosphide, to the third generation of semiconductor materials such as silicon carbide, gallium nitride, boron nitride, and the like, and oxide semiconductor materials including gallium oxide, zinc oxide, tin oxide, and the like. The development of the material iterates, so that the performance of the semiconductor is better and better, and the size of the semiconductor is smaller and smaller.
Silicon is currently the most commonly used material for semiconductor devices and power devices. The raw materials are abundant in reserves, and the crystal growth process is mature and efficient; however, the forbidden bandwidth of the silicon material is 1.1eV, the breakdown field strength is only 40V/μm, and the application of the silicon material has great limitation in some fields with high voltage and high temperature.
The material properties of the third generation semiconductor materials such as silicon carbide and gallium nitride are greatly improved compared with those of silicon. For example, silicon carbide has a forbidden band width of about 3.3eV, which is 3 times that of silicon; the breakdown field strength is about 300V/μm, which is more than 7 times that of silicon. For example, gallium nitride has a forbidden bandwidth of about 3.44eV, which is 3 times more than silicon; the breakdown field strength is about 500V/μm, which is more than 10 times that of silicon. The improvement of the material characteristics enables silicon carbide and gallium nitride to be used in higher-pressure and higher-temperature application scenes, and widens the application boundary of the semiconductor material.
However, the preparation of crystals of either silicon carbide or gallium nitride is difficult. For example, the mainstream preparation process of silicon carbide single crystal adopts physical gas phase transportation method [ PVT ], the crystal growth efficiency is relatively slow, and the crystal growth yield is very low due to the fact that silicon carbide has more than 200 isomers, and the cost of the silicon carbide single crystal is high due to the two factors. For example, the mainstream preparation process of the gallium nitride single crystal adopts a halide vapor phase epitaxy method (HVPE), and adopts an epitaxy mode to grow the crystal, so that the crystal growth efficiency is slower than that of silicon carbide, and the cost of the gallium nitride single crystal is more than 3 times of that of the silicon carbide single crystal due to the relatively expensive source material. In a schottky diode having a high breakdown field such as gallium nitride, if the reverse voltage is increased, the leakage current between the anode electrode and the semiconductor layer becomes extremely large before the semiconductor layer breaks down, and the diode is damaged in advance. These factors greatly affect the application of silicon carbide and gallium nitride to a greater extent.
Disclosure of Invention
Accordingly, the technical problem to be solved by the present invention is to provide a diode structure, which can solve the defects of the prior art at least to a certain extent.
The embodiment of the diode structure provided by the invention is as follows:
A diode structure comprising at least:
a first n-type semiconductor layer including a SnO 2 or Ga 2O3 -type compound semiconductor;
A second n-type semiconductor layer including the same semiconductor as the first n-type semiconductor layer, provided on an upper surface of the first n-type semiconductor layer, the second n-type semiconductor layer upper surface including a first region and a second region, the second n-type semiconductor layer having a lower electron carrier concentration than the first n-type semiconductor layer;
the first p-type semiconductor layer is arranged above the first region, and the upper surface of the first p-type semiconductor layer comprises a third region, a fourth region and a fifth region;
A third n-type semiconductor layer comprising the same semiconductor as the first n-type semiconductor layer, a first portion of the third n-type semiconductor layer being disposed over the third region and a second portion being disposed over the fourth region;
A second p-type semiconductor layer provided over the fifth region, the second p-type semiconductor layer having a higher hole carrier concentration than the first p-type semiconductor layer;
A first electrode provided on a lower surface of the first n-type semiconductor layer;
An insulating layer and a second electrode which are sequentially arranged on the second region and extend to a partial region of the upper surface of the third n-type semiconductor layer;
And the third electrode is arranged on the upper surface of the second electrode and extends to the upper surface of the second p-type semiconductor layer along with the residual area of the upper surface of the third n-type semiconductor layer.
Further, the first region is located at the center of the upper surface of the second n-type semiconductor layer, the third region is located at the left side of the upper surface of the first p-type semiconductor layer, the fourth region is located at the right side of the upper surface of the first p-type semiconductor layer, and the fifth region is located at the center of the upper surface of the first p-type semiconductor layer.
Further, the first region comprises a first left region and a first right region which are respectively positioned at the left side and the right side of the upper surface of the second n-type semiconductor layer; the third area is positioned in an area close to the right in the first left area, and the fourth area is positioned in an area close to the left in the first right area; the fifth region includes a fifth left region located in a region near the left side of the first left region and a fifth right region located in a region near the right side of the first right region.
Preferably, the second n-type semiconductor layer includes a SnO 2 compound semiconductor, and the electron carrier concentration of the SnO 2 compound semiconductor is: < 5X 10 17/cm3; or < 5×10 16/cm3; or < 5 x 10 15/cm3.
Preferably, the first n-type semiconductor layer includes SnO 2 -type compound semiconductor having an electron carrier concentration of 5×10 17/cm3 or more.
Preferably, the second n-type semiconductor layer includes a Ga 2O3 -type compound semiconductor, and the electron carrier concentration of the second n-type compound semiconductor layer is: < 10 18/cm3; or < 10 17/cm3; or < 10 16/cm3.
Preferably, the first n-type semiconductor layer includes a Ga 2O3 -type compound semiconductor having an electron carrier concentration of 10 or more 18/cm3.
Preferably, the first electrode and the third electrode are metal layers composed of Ti metal or any 1,2, 3 or all of Ti and Ni, ag and W, wherein the Ti layer is a layer in contact with the corresponding semiconductor.
Compared with the prior art, the invention has the following advantages:
1. When the diode structure is conducted in the forward direction, an inversion channel is formed on one side of the insulating layer under the action of the second electrode through the first p-type semiconductor layer, and when reverse voltage is applied, the p-type semiconductor widens, the channel is pinched off, the diode has higher reverse withstand voltage, and reverse leakage current is restrained; in addition, due to the fact that the third n-type semiconductor layer is arranged, the third n-type semiconductor layer can achieve a heavy doping effect, ohmic contact is formed between the third n-type semiconductor layer and the third electrode, forward voltage drop of the diode is reduced, and loss is reduced.
2. Compared with a silicon-based diode, the diode structure provided by the embodiment of the invention adopts the SnO 2 or Ga 2O3 semiconductor material with high breakdown field strength, can be applied to a higher reverse voltage-resistant scene, and has the voltage-resistant capability as high as thousands of volts. Meanwhile, the increase of forward voltage can be restrained, the loss of the device is reduced, and the heating of the device is reduced.
3. Compared with a silicon carbide-based diode, when the SnO 2 compound semiconductor material is adopted, the single crystal preparation of the diode structure adopts a physical vapor transport method [ PVT ], but under the condition of long crystal, only one isomer exists in the stable existence of the diode structure [ tetragonal rutile ], so that the yield of the long crystal can be greatly improved. So that the cost of the monocrystal is greatly reduced relative to that of the silicon carbide monocrystal. Compared with a gallium nitride-based diode, the preparation efficiency of the SnO 2 single crystal is higher than that of the gallium nitride single crystal, and the source material cost of the SnO 2 single crystal is lower than that of the gallium nitride single crystal, so that the cost of the SnO 2 single crystal is greatly reduced compared with that of the gallium nitride single crystal. The reduction of the cost of single crystals makes the SnO 2 -based diode applicable in a wider range.
Drawings
Fig. 1 is a cross-sectional structural view of a first embodiment of a diode structure of the present invention.
Fig. 2 is a cross-sectional structural view of a second embodiment of the diode structure of the present invention.
Wherein the above figures include the following reference numerals:
1. the semiconductor device comprises a first electrode, a first n-type semiconductor layer, a second n-type semiconductor layer, a first p-type semiconductor layer, a third n-type semiconductor layer, a second p-type semiconductor layer, an insulating layer, a second electrode and a third electrode, wherein the first electrode, the first n-type semiconductor layer, the second n-type semiconductor layer, the first p-type semiconductor layer, the third n-type semiconductor layer, the third p-type semiconductor layer, the second p-type semiconductor layer, the insulating layer, the second electrode and the third electrode.
Detailed Description
So that the manner in which the above recited objects, features and advantages of the present application can be understood in detail, a more particular description of the application, briefly summarized below, may be had by reference to embodiments, some of which are illustrated in the appended drawings. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, shall fall within the scope of the present application.
It should be noted that the terms "comprises" and "comprising," as well as any variations thereof, described in the specification and claims of the present application are intended to cover a non-exclusive inclusion, such as comprising a sequence of layers, regions or process steps that are not necessarily limited to those layers, regions or process steps that are expressly listed or inherent to such structure, but may include layers, regions or process steps that are not expressly listed.
In addition, the embodiments of the present application and the features in the embodiments may be combined with each other without collision.
It should be understood that, in the description and in the claims, when a layer/region is described as being "disposed/stacked" on another layer/region, the layer/region may be "disposed/stacked" directly on the other layer/region, or "disposed/stacked" on the other layer/region through a third layer/region; when a process step is described as being continued to another process step, the process step may be continued directly to the other process step or through a third process step to the other process step.
Fig. 1 is a cross-sectional structure diagram of a first embodiment of a diode structure according to the present invention, please refer to fig. 1, which at least includes: a first n-type semiconductor layer 2 including a SnO 2 or Ga 2O3 -type compound semiconductor having a first carrier concentration; a second n-type semiconductor layer 3 including the same semiconductor as the first n-type semiconductor layer 2, provided on an upper surface of the first n-type semiconductor layer 2, the second n-type semiconductor layer 3 upper surface including a first region and a second region, the second n-type semiconductor layer 3 having a lower electron carrier concentration than the first n-type semiconductor layer 2; a first p-type semiconductor layer 4 disposed over the first region, the upper surface of the first p-type semiconductor layer 4 including a third region, a fourth region, and a fifth region; a third n-type semiconductor layer 5 including the same semiconductor as the first n-type semiconductor layer 2, a first portion of the third n-type semiconductor layer 5 being provided over the third region and a second portion being provided over the fourth region; a second p-type semiconductor layer 6 provided over the fifth region, the second p-type semiconductor layer 6 having a higher hole carrier concentration than the first p-type semiconductor layer 4; a first electrode 1 provided on the lower surface of the first n-type semiconductor layer 2; an insulating layer 7 and a second electrode 8 which are sequentially provided over the second region and extend to a partial region of the upper surface of the third n-type semiconductor layer 5; and a third electrode 9 disposed on the upper surface of the second electrode 8 and extending along with the remaining region of the upper surface of the third n-type semiconductor layer 5 to the upper surface of the second p-type semiconductor layer 6.
Wherein the second n-type semiconductor layer 3 includes the same semiconductor as the first n-type semiconductor layer 2, and the third n-type semiconductor layer 5 includes the same semiconductor as the first n-type semiconductor layer 2, referring to: when the first n-type semiconductor layer 2 includes a SnO 2 -type compound semiconductor, the second n-type semiconductor layer 3 and the third n-type semiconductor layer 5 also include a SnO 2 -type compound semiconductor; when the first n-type semiconductor layer 2 includes a Ga 2O3 -type compound semiconductor, the second n-type semiconductor layer 3 also includes a Ga 2O3 -type compound semiconductor.
The second n-type semiconductor layer 3 has a lower electron carrier concentration than the first n-type semiconductor layer 2, and the second n-type semiconductor layer 3 with the aim of low electron carrier concentration has high resistivity so as to ensure that the diode has high breakdown voltage, and the first n-type semiconductor layer with higher carrier concentration ensures that the overall resistance of the semiconductor layer is small and the forward voltage drop is small.
Wherein the second p-type semiconductor layer 6 has a higher hole carrier concentration than the first p-type semiconductor layer 4 for the purpose of limiting the current flow such that the current is limited to flow in the region of the first p-type semiconductor layer 4 close to the second electrode 8 and the second n-type semiconductor layer 3.
The embodiment of the diode provided by the invention is described above, and under the condition of the same reverse voltage withstanding, the diode structure provided by the invention can increase the breakdown electric field strength, so that the electron carrier concentration is improved, and when the electron carrier concentration is increased, the on-resistance is reduced, and the forward conduction voltage drop is restrained from being increased.
In the diode structure provided by the embodiment of the invention, when the diode works, the second electrode 8 and the third electrode 8 are added with positive voltage, the first electrode 1 is added with negative voltage, electrons are gathered in the contact area of the first p-type semiconductor region 4 and the insulating layer 7, when an inversion channel is formed, the forward conduction is realized, electrons flow from the third n-type semiconductor region 5 to the second n-type semiconductor layer 3, the first n-type semiconductor layer 2 and the first electrode 1 through the inversion channel, no p+ resistor is generated at a pn junction, the on resistance is small, and the on voltage is reduced. When the first electrode 1 is applied with positive voltage, the second electrode 8 and the third electrode 8 are applied with negative voltage, the applied electric field leads the first p-type semiconductor layer 4 to be widened and the channel to be pinched off, and the widening of the first p-type semiconductor layer 4 is increased along with the rising of the applied electric field until avalanche breakdown occurs, so the diode has the characteristics of higher reverse withstand voltage, small forward voltage drop, low reverse leakage current and the like.
With continued reference to fig. 1, the first region is located in the center of the upper surface of the second n-type semiconductor layer 3, the third region is located on the left of the upper surface of the first p-type semiconductor layer 4, the fourth region is located on the right of the upper surface of the first p-type semiconductor layer 4, and the fifth region is located in the center of the upper surface of the first p-type semiconductor layer 4.
Fig. 2 is a cross-sectional view of a second embodiment of the diode structure of the present invention, wherein the first region includes a first left region and a first right region, which are respectively located on the left and right of the upper surface of the second n-type semiconductor layer 3; the third area is positioned in an area close to the right in the first left area, and the fourth area is positioned in an area close to the left in the first right area; the fifth region includes a fifth left region located near the left side of the first left region and a fifth right region located near the right side of the first right region.
Fig. 2 is different from fig. 1 in that the first trench is divided into two parts, and the corresponding structure needs to be designed adaptively, and the same inventive concept is adopted in both of the two parts, namely, when the first p-type semiconductor layer 4 is conducted in the forward direction, an inverse channel is formed on one side of the insulating layer 7 under the action of the second electrode 8, and when a reverse voltage is applied, the first p-type semiconductor layer 4 widens, the channel is pinched off, the diode has higher inverse withstand voltage, and the inverse leakage current is suppressed.
It should be noted that, in the existing preparation of SiC single crystals and GaN single crystals used as diode materials, compared with SiC single crystals, snO 2 single crystals are also grown by physical vapor transport method [ PVT ], and SnO 2 only has one phase [ tetragonal rutile phase ] stably existing under the condition of growing crystal environment, and SiC has multiple isomers coexisting under the condition of growing crystal, so that the growing crystal yield of SnO 2 single crystals is far higher than that of SiC single crystals. The main stream preparation process of the GaN single crystal adopts a halide vapor phase epitaxy method (HVPE), and adopts an epitaxy mode to grow the crystal, so that the crystal growth efficiency is slower than that of SiC, and the cost of the GaN single crystal is more than 3 times of that of a silicon carbide single crystal due to the expensive source material. So that the cost of the SnO 2 single crystal is far lower than that of the SiC single crystal and the GaN single crystal, and the cost of the SnO 2 base diode is far lower than that of the SiC base diode and the GaN base diode based on the diode manufactured by the SiC single crystal and the GaN single crystal as substrates. Under the condition of equivalent device performance, the SnO 2 -based diode has lower cost and can have a wider application range.
For example, in the embodiment of fig. 1, the first n-type semiconductor layer 2 corresponds to an n-type heavily doped [ n+ ] SnO 2 substrate layer containing conductive impurities such as Nb or Sb; the SnO 2 substrate layer is formed by slicing and thinning and grinding a bulk single crystal of the SnO 2 single crystal grown by a physical vapor transport method (PVT).
The second n-type semiconductor layer 3 corresponds to an n-type lightly doped [ n- ] SnO 2 epitaxial layer containing conductive impurities such as Nb or Sb; the SnO 2 epitaxial layer is formed by epitaxially growing an n-type lightly doped SnO 2 semiconductor layer on one surface of the SnO 2 substrate layer by adopting a vapor phase epitaxy method such as MOCVD (metal organic chemical vapor phase epitaxy).
Wherein if the second n-type semiconductor layer 3 includes a Ga 2O3 -type compound semiconductor, its electron carrier concentration is < 10 18/cm3; or < 10 17/cm3; or < 5 x 10 16/cm3.
Wherein if the first n-type semiconductor layer 2 includes a Ga 2O3 -type compound semiconductor, its electron carrier concentration is 10 or more 18/cm3.
Since the breakdown field strength (8 MV/cm) of Ga 2O3 -class compound semiconductor material is much higher than that of the existing SiC and GaN used as diodes, the reverse withstand voltage of the diodes can be improved compared with the use of SiC (3 MV/cm) and GaN (5 MV/cm) materials.
Further, the first electrode 1 and the third electrode 9 are metal layers composed of Ti metal or any 1,2, 3 or all of Ti and Ni, ag and W, wherein the Ti layer is a layer in contact with the corresponding semiconductor.
While the preferred embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications may be made without departing from the spirit of the present invention, and these are naturally included in the scope of the present invention. The method for forming each layer of the semiconductor device according to the present invention is not particularly limited as long as the object of the present invention is not hindered, and may be a known method.

Claims (8)

1. A diode structure comprising at least:
a first n-type semiconductor layer (2) comprising a SnO 2 or Ga 2O3 -type compound semiconductor;
A second n-type semiconductor layer (3) comprising the same semiconductor as the first n-type semiconductor layer (2), provided on the upper surface of the first n-type semiconductor layer (2), the second n-type semiconductor layer (3) upper surface comprising a first region and a second region, the second n-type semiconductor layer (3) having a lower electron carrier concentration than the first n-type semiconductor layer (2);
A first p-type semiconductor layer (4) disposed over the first region, the upper surface of the first p-type semiconductor layer (4) including a third region, a fourth region, and a fifth region;
A third n-type semiconductor layer (5) comprising the same semiconductor as the first n-type semiconductor layer (2), a first portion of the third n-type semiconductor layer (5) being disposed over the third region and a second portion being disposed over the fourth region;
A second p-type semiconductor layer (6) provided over the fifth region, the second p-type semiconductor layer (6) having a higher hole carrier concentration than the first p-type semiconductor layer (4);
A first electrode (1) provided on the lower surface of the first n-type semiconductor layer (2);
An insulating layer (7) and a second electrode (8) which are sequentially arranged on the second region and extend to a partial region of the upper surface of the third n-type semiconductor layer (5);
And a third electrode (9) which is arranged on the upper surface of the second electrode (8) and extends to the upper surface of the second p-type semiconductor layer (6) along with the residual area of the upper surface of the third n-type semiconductor layer (5).
2. The diode structure according to claim 1, characterized in that the first region is located at the center of the upper surface of the second n-type semiconductor layer (3), the third region is located at the left of the upper surface of the first p-type semiconductor layer (4), the fourth region is located at the right of the upper surface of the first p-type semiconductor layer (4), and the fifth region is located at the center of the upper surface of the first p-type semiconductor layer (4).
3. The diode structure according to claim 1, characterized in that the first region comprises a first left region and a first right region, respectively located to the left and to the right of the upper surface of the second n-type semiconductor layer (3); the third area is positioned in an area close to the right in the first left area, and the fourth area is positioned in an area close to the left in the first right area; the fifth region includes a fifth left region located in a region near the left side of the first left region and a fifth right region located in a region near the right side of the first right region.
4. A diode structure according to any one of claims 1 to 3, characterized in that: the second n-type semiconductor layer (3) comprises a SnO 2 compound semiconductor, and the electron carrier concentration of the second n-type semiconductor layer is as follows: < 5X 10 17/cm3; or < 5×10 16/cm3; or < 5 x 10 15/cm3.
5. A diode structure according to any one of claims 1 to 3, characterized in that the first n-type semiconductor layer (2) comprises a SnO 2 -type compound semiconductor having an electron carrier concentration of 5 x 10 17/cm3 or more.
6. A diode structure according to any one of claims 1 to 3, characterized in that the second n-type semiconductor layer (3) comprises a Ga 2O3 -type compound semiconductor with an electron carrier concentration of: < 10 18/cm3; or < 10 17/cm3; or < 10 16/cm3.
7. A diode structure according to any one of claims 1 to 3, characterized in that the first n-type semiconductor layer (2) comprises a Ga 2O3 -type compound semiconductor with an electron carrier concentration of greater than or equal to 10 18/cm3.
8. The diode structure of claim 1, wherein: the first electrode (1) and the third electrode (9) are metal layers composed of Ti metal or any 1, 2, 3 or all of Ti, ni, ag and W, wherein the Ti layer is a layer in contact with a corresponding semiconductor.
CN202211281352.XA 2022-10-19 2022-10-19 Diode structure Pending CN117954505A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211281352.XA CN117954505A (en) 2022-10-19 2022-10-19 Diode structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211281352.XA CN117954505A (en) 2022-10-19 2022-10-19 Diode structure

Publications (1)

Publication Number Publication Date
CN117954505A true CN117954505A (en) 2024-04-30

Family

ID=90794842

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211281352.XA Pending CN117954505A (en) 2022-10-19 2022-10-19 Diode structure

Country Status (1)

Country Link
CN (1) CN117954505A (en)

Similar Documents

Publication Publication Date Title
US11355594B2 (en) Diode
US11342420B2 (en) Heterojunction devices and methods for fabricating the same
US9041139B2 (en) Low voltage diode with reduced parasitic resistance and method for fabricating
JP6371986B2 (en) Nitride semiconductor structure
US20200185541A1 (en) Oxide semiconductor device and method of manufacturing oxide semiconductor device
Zhang et al. Fully-and quasi-vertical GaN-on-Si pin diodes: High performance and comprehensive comparison
US9171914B2 (en) Semiconductor device
CN105405897A (en) Longitudinal conduction-type GaN-based groove junction barrier Schottky diode and manufacturing method thereof
US9525039B2 (en) Method of fabricating a merged P-N junction and schottky diode with regrown gallium nitride layer
CN113241382A (en) Semiconductor device and method of forming a semiconductor device
US8823148B2 (en) Diode with epitaxially grown semiconductor layers
US11699766B2 (en) Schottky barrier diode
KR101669987B1 (en) SiC trench MOS barrier Schottky diode using tilt ion implantation and method for manufacturing thereof
WO2020085094A1 (en) Schottky barrier diode
CN110752260A (en) Novel GaN junction barrier Schottky diode and preparation method thereof
CN115775730A (en) Quasi-vertical structure GaN Schottky diode and preparation method thereof
CN117954505A (en) Diode structure
CN117954504A (en) Schottky barrier diode
JP2016031997A (en) Semiconductor device
US11515395B2 (en) Gallium nitride power device and manufacturing method thereof
Herath Mudiyanselage Design and optimization of edge termination techniques for β-Ga2O3/GaN heterojunction for pn power diodes using TCAD simulation
CN116154006A (en) Schottky barrier diode and manufacturing method thereof
CN117059650A (en) GaN-based pn junction diode device with polarized hypotenuse terminal structure and manufacturing method thereof
JP2019134176A (en) Semiconductor device

Legal Events

Date Code Title Description
PB01 Publication