CN117894761A - Package structure and method for forming the same - Google Patents

Abstract

The invention relates to a packaging structure and a forming method thereof. The package structure includes: a frame including a pin structure including a plurality of mutually independent pins; a chip located on the frame; the plastic sealing layer is used for plastic sealing the pin structure and the chip, and the plastic sealing layer is filled in gaps between the adjacent pins, the pins are electrically connected with the chip, and the bottom surfaces of the pins are flush with the bottom surface of the plastic sealing layer. The invention improves the stability of the whole packaging structure and is beneficial to improving the mass production performance of the packaging structure.

Description

Package structure and method for forming the same

Technical Field

The present disclosure relates to semiconductor manufacturing technology, and more particularly, to a package structure and a method for forming the same.

Background

QFN (Quad Flat No-leads Package) is a common packaging approach. The QFN packaging mode has the advantages of good electric and thermal properties, small volume, light weight, low development cost and the like, and is suitable for being applied to high-density printed circuit boards of mobile phones, digital cameras, PDAs and other portable small-sized electronic equipment. When QFN packaging is performed on the chip, the metal frame needs to be carved through to form pins penetrating through the metal frame, then the chip and the pins are connected through leads, and the chip and the leads are packaged on the metal frame in a plastic mode. However, in this packaging method, since the pre-molding material is filled between the adjacent pins to fix the plurality of discrete pins after the metal frame is etched through, there is a large difference between the thermal expansion coefficient of the pre-molding material and the thermal expansion coefficient of the pins, so that deformation such as warpage of the packaging structure is easily caused. In addition, the plastic package layers for plastic packaging the chip and the leads do not cover the pins and the metal frame, so that the stability of the packaging structure is reduced. In addition, the need to form discrete pins by etching through the metal frame tends to result in reduced etch quality and mass production performance. Since the chip mounting process is required to be performed on the metal frame that has been etched through, when a plurality of chips are to be stacked on the metal frame, the thickness of the chips is required to be thinned to avoid damaging the metal frame, however, this increases the difficulty of the chip manufacturing process and reduces the yield of the chips.

Therefore, how to improve the performance of the package structure and improve the mass production performance of the package structure is a technical problem to be solved currently.

Disclosure of Invention

The invention provides a packaging structure and a forming method thereof, which are used for improving the performance of the packaging structure and improving the mass production performance of the packaging structure.

According to some embodiments, the present invention provides a package structure, comprising:

a frame including a pin structure including a plurality of mutually independent pins;

a chip located on the frame;

the plastic sealing layer is used for plastic sealing the pin structure and the chip, and the plastic sealing layer is filled in gaps between the adjacent pins, the pins are electrically connected with the chip, and the bottom surfaces of the pins are flush with the bottom surface of the plastic sealing layer.

In some embodiments, a plurality of the pins in the pin structure are distributed around a periphery of the chip;

the packaging structure further comprises a lead, wherein one end of the lead is electrically connected with the chip, and the other end of the lead is electrically connected with the top surface of the pin.

In some embodiments, the frame further comprises:

and the plurality of pins in the pin structure are distributed around the periphery of the base island, and the chip is positioned on the base island and connected with the base island.

In some embodiments, the frame includes oppositely disposed first and second surfaces, the molding layer being located on the first surface of the frame; the package structure further includes:

and the conductive bump is positioned on the second surface of the frame and is electrically connected with the pin of which the bottom end is exposed on the surface of the plastic layer.

In some embodiments, further comprising:

and the heat dissipation structure is positioned on the second surface of the frame, a plurality of conductive bumps are distributed around the periphery of the heat dissipation structure, and the heat dissipation structure is aligned with the base island.

In some embodiments, the chip includes oppositely disposed front and back sides, the front side of the chip including a plurality of conductive bumps;

the conductive bumps are respectively and electrically connected with the pins, and the plastic sealing layer fills gaps between the pins and the chip.

According to other embodiments, the present invention further provides a method for forming a package structure, including the following steps:

forming a frame, wherein the frame comprises a pin structure and a supporting structure positioned below the pin structure, the pin structure comprises a plurality of mutually independent pins, and the supporting structure is connected with the pins;

electrically connecting the pins with the chip;

forming a plastic sealing layer for plastic sealing the pin structure and the chip, wherein the plastic sealing layer fills gaps between adjacent pins, and the bottom surface of the plastic sealing layer is flush with the bottom surface of the pins;

and removing the supporting structure.

In some embodiments, the specific steps of forming the frame include:

providing an initial frame, wherein the initial frame comprises a pin area;

etching the initial frame, forming first grooves which do not penetrate through the initial frame in the pin area, separating the initial frame into a plurality of pins by the first grooves, and taking the rest initial frame below the pins as the supporting structure.

In some embodiments, the initial frame further comprises a slide region; the specific steps of etching the initial frame include:

etching the initial frame, forming a first groove which does not penetrate through the initial frame in the pin area, forming a second groove which does not penetrate through the initial frame in the slide area, wherein a plurality of first grooves are distributed around the periphery of the second groove, the initial frame is divided into a base island and a pin area by the second groove, the pin area is divided into a plurality of pins by the first groove, the bottom surface of the base island is flush with the bottom surface of the pins, and the pins and the rest initial frame below the base island are used as supporting structures together.

In some embodiments, the frame includes oppositely disposed first and second surfaces, the molding layer being located on the first surface of the frame; after removing the support structure, the method further comprises the following steps:

and forming a conductive bump on the second surface of the frame, wherein the conductive bump is electrically connected with the bottom surface of the pin.

According to the packaging structure and the forming method thereof, the pin structure and the chip are packaged by the plastic layer, and the gaps between the adjacent pins are filled with the plastic layer, so that the packaging of the plastic layer on the pin structure is realized, the overall stability of the packaging structure is improved, and the mass production performance of the packaging structure is improved. According to the invention, the stacking of a plurality of chips on the frame can be realized on the premise of not reducing the thickness of the chips, so that the performance of the packaging structure is further improved. In addition, the pin does not need to be subjected to a pre-plastic packaging process, so that the probability of deformation such as warping and the like of the packaging structure is reduced.

Drawings

FIG. 1 is a schematic diagram of a package structure according to an embodiment of the present invention;

FIG. 2 is another schematic diagram of a package structure according to an embodiment of the present invention;

FIG. 3 is a flow chart of a method for forming a package structure according to an embodiment of the present invention;

fig. 4-16 are schematic views of the main process structure of the embodiment of the present invention in the process of forming the package structure.

Detailed Description

The following describes in detail the package structure and the forming method thereof with reference to the drawings.

In this embodiment, a package structure is provided, fig. 1 is a schematic structural diagram of the package structure in the embodiment of the present invention, and fig. 2 is another schematic structural diagram of the package structure in the embodiment of the present invention. As shown in fig. 1 and 2, the package structure includes:

a frame comprising a pin structure comprising a plurality of mutually independent pins 11;

a chip 10, said chip 10 being located on said frame;

the plastic layer 12, the plastic layer 12 encapsulates the pin structure and the chip 10, and the plastic layer 12 fills up the gap between the adjacent pins 11, the pins 11 are electrically connected with the chip 10, and the bottom surfaces of the pins 11 are flush with the bottom surface of the plastic layer 12.

Specifically, the frame includes a pin structure including at least a plurality of the pins 11 arranged at intervals along the second direction D2, as shown in fig. 1 and 2. The bottom surfaces of the pins 11 are flush with the bottom surface of the plastic layer 12 so that the bottom surfaces of the pins 11 are exposed to the bottom surface of the plastic layer 12. The pins are used for being electrically connected with the chip 10 so as to lead out signals of the chip 10 or transmit external control signals to the chip 10. The chip 10 is located on the frame and is electrically connected to the leads 11. The plastic layer 12 covers a plurality of pins 11 and chips 10 in the pin structure, and fills gaps between adjacent pins 11, thereby realizing the plastic packaging of the chips 10 and the whole pin structure, and improving the structural stability of the whole package structure. In this embodiment, the pins 11 and the chip 10 are co-encapsulated in the encapsulation layer 12, and the encapsulation layer 12 fills the gaps between the adjacent pins 11, so as to avoid the problem that the package structure is easy to warp and deform due to the pre-encapsulation process of the pins, thereby further improving the performance of the package structure.

In some embodiments, a plurality of the pins 11 in the pin structure are distributed around the periphery of the chip 10;

the package structure further comprises a lead 13, wherein one end of the lead 13 is electrically connected with the chip 10, and the other end of the lead 13 is electrically connected with the top surface of the pin 11.

For example, as shown in fig. 1, a plurality of the pins 11 in the pin structure are distributed around the periphery of the chip 10. The pins 11 include a top surface and a bottom surface that are distributed relatively along the first direction D1. The plastic layer 12 further includes the lead 13, and one end of the lead 13 is electrically connected to a pad on the front surface of the chip 10, and the other end is electrically connected to the lead 11. In an example, the top surface of the lead 11 is covered with a solder layer, and the lead 13 is bonded to the solder layer on the top surface of the lead 11. The material of the welding layer can be silver, nickel, palladium or gold. The lead wire 13 may be a gold wire, a silver wire, a copper wire, or an aluminum wire.

In some embodiments, the frame further comprises:

a land 16, a plurality of the pins 11 in the pin structure being distributed around the periphery of the land 16, the chip 10 being located on and connected to the land 16.

Specifically, the pin structure includes a plurality of circles of pins 11 distributed around the periphery of the chip 10, each circle of pins 11 includes a plurality of pins arranged at intervals, and the plurality of circles of pins 11 are nested in sequence, so that the number of input ports and output ports in the package structure can be increased, and the integration level of the package structure can be improved. A plurality of the pins 11 in the pin structure are distributed around the periphery of the base island 16. The base island 16 also includes a top surface and a bottom surface that are oppositely disposed along the first direction D1, and the chip 10 is connected to the top surface of the base island 16. In this embodiment, the lead structures are the same as the material of the islands 16, for example, all are metallic copper. In one example, an adhesive layer 14 is also provided between the chip 10 and the islands 16. Wherein the bonding layer 14 may be conductive adhesive or insulating adhesive. The adhesive layer 14 is used on the one hand to adhere the chip 10 to the islands 16; the adhesive layer 14 is used to conduct the chip 10 to the outside of the chip 10 (for example, to conduct heat generated by the chip 10 to the plastic layer 12 or the frame) so as to dissipate heat from the chip 10. The adhesive layer 14 may also cover the sides of the chip 10 and the sides of the islands 16 to further enhance the strength of the connection between the chip 10 and the islands 16. In an example, the material of the adhesive layer 14 is conductive adhesive, and the thickness of the adhesive layer 14 should be controlled such that the height of the adhesive layer 14 covering the side surface of the chip 10 is lower than the height of the chip 10, so as to avoid causing short circuit of the chip 10.

In some embodiments, the frame includes oppositely disposed first and second surfaces, the molding layer 12 being located on the first surface of the frame; the package structure further includes:

conductive bumps 15 are located on the second surface of the frame, and the conductive bumps 15 are electrically connected with the pins 11 with bottom ends exposed to the surface of the plastic layer 12.

Specifically, as shown in fig. 1, a plurality of conductive bumps 15 are located on the second surface of the frame, the conductive bumps 15 are soldered to the bottom surfaces of the leads 11 exposed to the surface of the molding layer 12, so as to achieve electrical connection between the conductive bumps 15 and the leads 11, and external control signals can be sequentially transmitted to the chip 10 through the conductive bumps 15, the leads 11 and the leads 13. In an example, the material of the conductive bump 15 may be tin.

In some embodiments, the package structure further comprises:

a heat dissipating structure on the second surface of the frame, a plurality of the conductive bumps 15 distributed around the periphery of the heat dissipating structure, and the heat dissipating structure aligned with the islands 16.

For example, as shown in fig. 1, the package structure is a QFN package structure. The chip 10 includes a front surface and a back surface that are distributed opposite to each other in the first direction D1, and the front surface of the chip 10 has pads thereon, which are electrically connected to the leads 13. The back side of the chip 10 is connected to the top side of the islands 16, and the bottom side of the islands 16 is exposed to the surface of the molding layer 12. Alignment of the heat dissipating structure with the island 16 means that the projection of the heat dissipating structure onto the second surface of the frame covers the bottom surface of the island 16. Because the bottom surface of the base island 16 is directly exposed to the surface of the plastic sealing layer 12, the base island 16 can directly dissipate heat through the heat dissipation structure, so that the heat dissipation effect of the chip 10 and the base island 16 is improved, the heat is prevented from being accumulated in the package structure, and the performance of the package structure is further improved.

In other embodiments, the chip 10 includes a front side and a back side that are oppositely disposed, the front side of the chip 10 including a plurality of conductive bumps 20;

the conductive bumps 20 are electrically connected to the leads 11, and the molding layer 12 fills the gaps between the leads 11 and the chip 10. In one example, the conductive bumps are 20-bit solder ball bumps.

In some embodiments, the frame includes oppositely disposed first and second surfaces, the molding layer 12 being located on the first surface of the frame; the package structure further includes:

a conductive bump 15 on the second surface of the frame, the conductive bump 15 being electrically connected to the lead 11 whose bottom end is exposed to the surface of the plastic layer 12;

and the heat dissipation structure is positioned on one side of the plastic sealing layer 12 away from the conductive bumps 15, and is aligned with the chip 10.

For example, as shown in fig. 2, the package structure is a QFN Flip Chip (FC) structure, the front surface of the Chip 10 faces the leads 11, and the Chip 10 is soldered to the leads 11 through the conductive bumps 20, so that electrical connection between the Chip 10 and the leads 11 can be achieved without providing leads. The plastic layer 12 encapsulates the chip 10 and the leads 11, and fills up the gaps between the adjacent leads 11 and the gaps between the leads 11 and the chip 10. The pins 11 or the islands are not arranged on the back surface of the chip 10, so that heat can be dissipated to the chip 10 through the heat dissipation structure positioned on the back surface of the chip 10, the heat dissipation effect of the chip 10 is improved, heat accumulation in the package structure is avoided, and the performance of the package structure is further improved.

The embodiment also provides a method for forming the package structure, fig. 3 is a flowchart of a method for forming the package structure in the embodiment of the invention, and fig. 4 to fig. 16 are schematic process structures of the embodiment of the invention in the process of forming the package structure. Schematic diagrams of the package structure formed in this embodiment may be seen in fig. 1 and 2. As shown in fig. 1 to 16, the method for forming the package structure includes the following steps:

step S31, forming a frame, wherein the frame comprises a pin structure and a supporting structure 52 positioned below the pin structure, the pin structure comprises a plurality of mutually independent pins 11, and the supporting structure 52 is connected with the pins 11, as shown in fig. 6 or 12;

step S32, electrically connecting the pins 11 with the chip 10, as shown in fig. 7 or fig. 13;

step S33, forming a plastic layer 12 for plastic packaging the pin structure and the chip 10, wherein the plastic layer 12 fills the gaps between the adjacent pins 11, and the bottom surface of the plastic layer 12 is flush with the bottom surface of the pins 11, as shown in fig. 8 or 14;

step S34, removing the support structure, as shown in fig. 1 or fig. 2.

In some embodiments, the specific steps of forming the frame include:

providing an initial frame 40 including a pin area therein, as shown in fig. 4;

the initial frame 40 is etched, and a first groove 51 is formed in the lead area, which does not penetrate through the initial frame 40, the plurality of first grooves 51 divide the initial frame 40 into a plurality of leads 11, and the remaining initial frame 40 under the leads 11 serves as the supporting structure 52, as shown in fig. 6.

In some embodiments, the initial frame 40 further includes a slide region; the specific steps of etching the initial frame 40 include:

etching the initial frame 40, forming first grooves 51 which do not penetrate through the initial frame 40 in the pin area, forming second grooves 53 which do not penetrate through the initial frame 40 in the slide area, wherein the first grooves 51 are distributed around the periphery of the second grooves 53, the second grooves 53 divide the initial frame 40 into a base island and a pin area, the first grooves 51 divide the pin area into a plurality of pins 11, the bottom surfaces of the base islands 16 are level with the bottom surfaces of the pins 11, and the rest of the initial frame 40 below the base islands 16 is used as the supporting structure 52 together, as shown in fig. 6.

For example, the material of the initial frame 40 may be a metal material. A first Dry Film Resist (DRR) layer 41 is formed on the surface of the initial frame 40, as shown in fig. 4. The first dry film photoresist layer 41 is patterned, and a plurality of first etching windows are formed in the first dry film photoresist layer 41. The initial frame 40 is etched downward along the first etching window along a first direction D1, so as to form the first groove 51 and the second groove 53, which do not penetrate through the initial frame 40 along the first direction D1, and the plurality of first grooves 51 are distributed around the periphery of the second groove 53, as shown in fig. 5. After the first dry film photoresist layer 41 is removed, a structure as shown in fig. 6 is obtained. The first grooves 51 are arranged at intervals at least along the second direction D2, and the first grooves 51 divide the initial frame 40 into the plurality of leads 11. The initial frame 40 surrounded by the second groove 53 serves as a base island 16, and the bottom surface of the base island 16 is made flush with the bottom surface of the lead 11. The second direction D2 intersects (e.g., obliquely intersects or perpendicularly intersects) the first direction D1. In an example, the width of the first groove 51 (e.g., the width of the first groove 51 along the second direction D2) is smaller than or equal to the width of the second groove 53 (e.g., the width of the second groove 53 along the second direction D2), such that the distance between the lead 11 and the island 16 is greater than or equal to the distance between adjacent leads 11.

In some embodiments, the specific steps of electrically connecting the pins 11 with the chip 10 include:

mounting the chip 10 on the base island 16 in a direction that the back surface of the chip 10 faces the base island 16;

leads 13 are formed over the frame to electrically connect the chip 10 to the leads 11, as shown in fig. 7.

For example, the chip 10 may be mounted on the base island 16 using a mounting process. In one example, the adhesive layer 14 may be applied to the surface of the island 16, and then the chip 10 may be attached to the island 16 by the adhesive layer 14. During the mounting of the chip 10, a part of the adhesive layer 14 is pressed to the side of the chip 10 and the side of the base island 16, thereby helping to further enhance the connection strength between the chip 10 and the base island 16. Thereafter, the leads 13 for electrically connecting pads on the front surface of the chip 10 with the top surfaces of the pins 11 are formed. The present embodiment is to attach the chip 10 to the island 16 with the support structure 52 at the bottom, and the support of the support structure 52 helps to stack multiple chips on the frame and improves the controllability of the package structure forming process. Then, the pins 11, the chips 10, the islands 16 and the leads 13 are simultaneously encapsulated by a single molding process to form the plastic package 12, as shown in fig. 8. The plastic layer 12 fills the gaps between the adjacent pins 11, so that the problem that the package structure is easy to warp and deform due to pre-plastic packaging of the frame is avoided.

In some embodiments, the specific step of removing the support structure comprises:

a grinding process is used to remove all of the support structures 52, exposing the bottom surfaces of the leads 11 and the bottom surfaces of the islands 16, so that the plurality of leads 11 are separated from each other, and so that the leads 11 are separated from the islands 16, as shown in fig. 9.

In other embodiments, the specific steps of electrically connecting the pins 11 with the chip 10 include:

providing a chip 10, wherein the chip 10 comprises a front surface and a back surface which are distributed oppositely, and the front surface of the chip 10 comprises a plurality of conductive bumps 20;

the conductive bump 20 is electrically connected to the top surface of the lead 11 by contact in a direction of the front surface of the chip 10 toward the top surface of the lead 11, as shown in fig. 13.

In some embodiments, forming the pin structure and the plastic layer 12 of the chip 10 includes:

and forming the plastic sealing layer 12 which is used for plastic sealing the pin structure and the chip 10 and filling the gaps between the adjacent pins 11 and the gaps between the pins 11 and the chip 10.

In some embodiments, the frame includes oppositely disposed first and second surfaces, the molding layer 12 being located on the first surface of the frame; after removing the support structure, the method further comprises the following steps:

conductive bumps 15 are formed on the second surface of the frame, the conductive bumps 15 being electrically connected to the bottom surfaces of the leads 11.

For example, a second dry film photoresist layer 110 is formed on the surface of the initial frame 40. The second dry film photoresist layer 110 is patterned, and a plurality of second etching windows are formed in the dry film photoresist layer 41. The initial frame 40 is etched down along the second etching window along a first direction D1, and the first trench 51 is formed along the first direction D1 without penetrating through the initial frame 40, as shown in fig. 11. After the second dry film photoresist layer 110 is removed, the structure shown in fig. 12 is obtained. Afterwards, the conductive bump 20 on the chip 10 and the lead 11 are electrically connected in a direction of the front surface of the chip 10 toward the lead 11, as shown in fig. 13. And then, a primary plastic packaging process is adopted to simultaneously package the pins 11 and the chip 10, so as to form the plastic packaging layer 12, as shown in fig. 14. In this embodiment, when the chip 10 is connected to the leads 11, the supporting structure 52 is further disposed below the leads 11, and the leads 11 are supported by the supporting structure 52, so that the deformation problem of the lead structure is reduced, and stacking of multiple chips on the frame is facilitated, and the controllability of the package structure forming process is improved.

After forming the plastic layer 12, the entire support structure 52 is removed by a grinding process, exposing the bottom surfaces of the pins 11, as shown in fig. 15. Then, a conductive bump 15 electrically connected to the bottom end of the lead 11 is formed, resulting in the structure shown in fig. 16.

According to the packaging structure and the forming method thereof, the pin structure and the chip are packaged through the plastic sealing layer, the gaps between the adjacent pins are filled with the plastic sealing layer, the packaging of the pin structure by the plastic sealing layer is achieved, the overall stability of the packaging structure is improved, and the mass production performance of the packaging structure is improved. According to the invention, the stacking of a plurality of chips on the frame can be realized on the premise of not reducing the thickness of the chips, so that the performance of the packaging structure is further improved. In addition, the pin does not need to be subjected to a pre-plastic packaging process, so that the probability of deformation such as warping and the like of the packaging structure is reduced.

The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.

Claims (10)

1. A package structure, comprising:

a frame including a pin structure including a plurality of mutually independent pins;

a chip located on the frame;

the plastic sealing layer is used for plastic sealing the pin structure and the chip, and the plastic sealing layer is filled in gaps between the adjacent pins, the pins are electrically connected with the chip, and the bottom surfaces of the pins are flush with the bottom surface of the plastic sealing layer.

2. The package structure of claim 1, wherein a plurality of the pins in the pin structure are distributed around a periphery of the chip;

the packaging structure further comprises a lead, wherein one end of the lead is electrically connected with the chip, and the other end of the lead is electrically connected with the top surface of the pin.

3. The package structure of claim 2, wherein the frame further comprises:

and the plurality of pins in the pin structure are distributed around the periphery of the base island, and the chip is positioned on the base island and connected with the base island.

4. The package structure of claim 2, wherein the frame includes oppositely disposed first and second surfaces, the molding layer being located on the first surface of the frame; the package structure further includes:

and the conductive bump is positioned on the second surface of the frame and is electrically connected with the pin of which the bottom end is exposed on the surface of the plastic layer.

5. The package structure of claim 3, further comprising:

and the heat dissipation structure is positioned on the second surface of the frame, a plurality of conductive bumps are distributed around the periphery of the heat dissipation structure, and the heat dissipation structure is aligned with the base island.

6. The package structure of claim 1, wherein the chip comprises a front side and a back side that are oppositely disposed, the front side of the chip comprising a plurality of conductive bumps;

the conductive bumps are respectively and electrically connected with the pins, and the plastic sealing layer fills gaps between the pins and the chip.

7. The method for forming the packaging structure is characterized by comprising the following steps:

forming a frame, wherein the frame comprises a pin structure and a supporting structure positioned below the pin structure, the pin structure comprises a plurality of mutually independent pins, and the supporting structure is connected with the pins;

electrically connecting the pins with the chip;

forming a plastic sealing layer for plastic sealing the pin structure and the chip, wherein the plastic sealing layer fills gaps between adjacent pins, and the bottom surface of the plastic sealing layer is flush with the bottom surface of the pins;

and removing the supporting structure.

8. The method of forming a package structure of claim 7, wherein the specific step of forming a frame comprises:

providing an initial frame, wherein the initial frame comprises a pin area;

etching the initial frame, forming first grooves which do not penetrate through the initial frame in the pin area, separating the initial frame into a plurality of pins by the first grooves, and taking the rest initial frame below the pins as the supporting structure.

9. The method of forming a package structure of claim 8, wherein the initial frame further comprises a carrier region; the specific steps of etching the initial frame include:

etching the initial frame, forming a first groove which does not penetrate through the initial frame in the pin area, forming a second groove which does not penetrate through the initial frame in the slide area, wherein a plurality of first grooves are distributed around the periphery of the second groove, the initial frame is divided into a base island and a pin area by the second groove, the pin area is divided into a plurality of pins by the first groove, the bottom surface of the base island is flush with the bottom surface of the pins, and the pins and the rest initial frame below the base island are used as supporting structures together.

10. The method of forming a package structure of claim 7, wherein the frame includes first and second surfaces that are oppositely disposed, the molding layer being located on the first surface of the frame; after removing the support structure, the method further comprises the following steps:

and forming a conductive bump on the second surface of the frame, wherein the conductive bump is electrically connected with the bottom surface of the pin.