CN117767240A - Direct-current transient hybrid triggering high-voltage ESD protection circuit and chip - Google Patents
Direct-current transient hybrid triggering high-voltage ESD protection circuit and chip Download PDFInfo
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- CN117767240A CN117767240A CN202311542330.9A CN202311542330A CN117767240A CN 117767240 A CN117767240 A CN 117767240A CN 202311542330 A CN202311542330 A CN 202311542330A CN 117767240 A CN117767240 A CN 117767240A
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Abstract
The embodiment of the application provides a direct current transient state hybrid triggering high-voltage ESD protection circuit and a chip, relates to the technical field of ESD protection, and comprises: the device comprises a transient trigger unit, a direct current trigger unit and a discharge unit; the transient trigger unit is used for providing an electric signal for the discharge unit at preset time when the ESD occurs so as to control the discharge unit to be conducted so as to discharge the ESD current; the direct current trigger unit is used for controlling the discharge unit to conduct when the ESD voltage is higher than the threshold voltage so as to discharge the ESD current. The method and the device have the advantages that by constructing the two ESD current discharging paths of the transient trigger unit and the direct current trigger unit, when an ESD event occurs, the corresponding discharging unit can be opened through the two paths of the transient trigger unit and the direct current trigger unit to discharge the ESD current, so that the corresponding discharging unit can be opened to discharge no matter what the pulse length of the ESD event is, and the method and the device have the advantages of small circuit area and high response speed.
Description
Technical Field
The application relates to the technical field of ESD protection, in particular to a direct-current transient hybrid triggering high-voltage ESD protection circuit and a chip.
Background
During the application of the chip in the integrated circuit, the chip is often interfered by ESD (electrostatic discharge) events, and if the chip is not protected, high voltage and current generated by ESD discharge may damage the chip, so the integrated circuit generally needs to be protected by an ESD protection circuit. The ESD protection capability is an important index of the chip, and the efficiency of the ESD protection circuit, i.e. the ratio of the capability of discharging ESD current to the area is lower, can greatly increase the area of the chip, and increase the cost and power consumption. Conventional ESD protection circuits typically use NMOS with grounded gate source and grounded drain to power supply to enable GGNMOS structures, but in high voltage integrated circuits, NLDMOS is typically inefficient when connected to GGNMOS structures.
Disclosure of Invention
An objective of the embodiments of the present application is to provide a dc transient hybrid triggering high-voltage ESD protection circuit and a chip, so as to solve the above-mentioned problems.
To achieve the above object, a first aspect of the present application provides a dc transient hybrid triggering high voltage ESD protection circuit, comprising:
the device comprises a transient trigger unit, a direct current trigger unit and a discharge unit;
the transient trigger unit is used for providing an electric signal for the discharge unit at preset time when the ESD occurs so as to control the discharge unit to be conducted to discharge the ESD current;
the direct current trigger unit is used for controlling the discharge unit to be conducted so as to discharge the ESD current when the ESD voltage is higher than the threshold voltage.
Optionally, the transient trigger unit includes:
a first capacitor and a first resistor;
the first end of the first capacitor is connected with a power supply, the second end of the first capacitor is connected with the first end of the first resistor, and the second end of the first resistor is grounded.
Optionally, the transient trigger unit further comprises:
a first high voltage transistor element;
the grid electrode of the first high-voltage transistor element is connected with the second end of the first capacitor and the first end of the first resistor;
the drain electrode of the first high-voltage transistor element is connected with a power supply, and the source electrode of the first high-voltage transistor element is grounded.
Optionally, the dc trigger unit includes:
a first diode and a second resistor;
the negative pole of first diode is connected with the power, the positive pole of first diode with the source of first high voltage transistor component and the first end of second resistance, the second ground connection of second resistance.
Optionally, the bleed unit comprises:
a second high voltage transistor element;
the grid electrode of the second high-voltage transistor element is connected with the positive electrode of the first diode and the first end of the second resistor, the drain electrode of the second high-voltage transistor element is connected with a power supply, and the source electrode of the second high-voltage transistor element is grounded;
the first high voltage transistor element and the second high voltage transistor element are N-type transistor elements.
Optionally, the protection circuit further includes:
a second diode;
the negative electrode of the second diode is connected with the grid electrode of the first high-voltage transistor element, and the positive electrode of the second diode is connected with the first end of the second resistor.
Optionally, the protection circuit further includes:
a third diode;
and the cathode of the third diode is connected with the grid electrode of the second high-voltage transistor element, and the anode of the third diode is grounded.
Optionally, the first diode is a high voltage diode, and the second diode is a low voltage diode.
Optionally, the breakdown voltage of the first diode is higher than the power supply voltage, and the breakdown voltage of the first diode is lower than the breakdown voltage of the second high voltage transistor element.
In a second aspect of the present application, there is provided a chip comprising:
the direct current transient hybrid triggering high-voltage ESD protection circuit.
According to the method, when an ESD event occurs, the corresponding discharging unit can be opened through the two paths of the transient triggering unit and the direct current triggering unit to discharge the ESD current, the transient triggering unit has the characteristic of high response speed, the direct current triggering unit has the characteristic of adapting to any pulse length in a direct current triggering manner, and the corresponding discharging unit can be opened to discharge no matter how long the pulse of the ESD event is, so that the method has the advantages of small circuit area and high response speed.
Additional features and advantages of embodiments of the present application will be set forth in the detailed description that follows.
Drawings
The accompanying drawings are included to provide a further understanding of embodiments of the present application and are incorporated in and constitute a part of this specification, illustrate embodiments of the present application and together with the description serve to explain, without limitation, the embodiments of the present application. In the drawings:
fig. 1 is a schematic structural diagram of a dc transient hybrid triggering high-voltage ESD protection circuit according to a preferred embodiment of the present application;
fig. 2 is a circuit structure diagram of a dc transient hybrid triggering high-voltage ESD protection circuit according to a preferred embodiment of the present application.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it should be understood that the specific implementations described herein are only for illustrating and explaining the embodiments of the present application, and are not intended to limit the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present application based on the embodiments herein.
It should be noted that, the technical solutions of the embodiments of the present application may be combined with each other, but it is necessary to be based on the fact that those skilled in the art can implement the technical solutions, and when the technical solutions are inconsistent or cannot be implemented, it should be considered that the combination of the technical solutions does not exist, and is not within the protection scope of the present application.
ESD, i.e. Electro-Static discharge, means electrostatic discharge. With the current increasing scale of modern semiconductor devices, the working voltage is lower and lower, the circuit board is smaller and smaller, the integration level is higher and higher, and the sensitivity of the semiconductor devices to external electromagnetic disturbance is greatly improved. At present, common parts of various electronic products needing ESD protection include: USB interface, HDMI interface, IEEE1394 interface, antenna interface, VGA interface, DVI interface, key circuit, SIM card, earphone and other various data transmission interfaces. When an electronic component or device is under the action of an electrostatic field, a very high voltage is generated inside the electronic component or device, if the voltage exceeds a certain threshold value, a breakdown phenomenon occurs, so that the equipment works abnormally, is halted, even is damaged and causes other safety problems. Therefore, ESD attracts more and more attention to problems such as interference caused by circuits, damage to components, CMOS circuits, and interface circuits.
In order to solve the above-mentioned problems, as shown in fig. 1, a first aspect of the present application provides a dc transient hybrid triggering high-voltage ESD protection circuit, comprising:
the device comprises a transient trigger unit, a direct current trigger unit and a discharge unit;
the transient trigger unit is used for providing an electric signal for the discharge unit at preset time when the ESD occurs so as to control the discharge unit to be conducted so as to discharge the ESD current;
the direct current trigger unit is used for controlling the discharge unit to conduct when the ESD voltage is higher than the threshold voltage so as to discharge the ESD current.
Therefore, the method and the device realize that when an ESD event occurs, the corresponding discharging units can be opened through the two paths of the transient triggering unit and the direct current triggering unit to discharge the ESD current, the transient triggering unit has the characteristic of high response speed, the direct current triggering unit has the characteristic of adapting to any pulse length in a direct current triggering manner, and the circuit structure of the transient triggering and the direct current triggering is constructed, so that the corresponding discharging units can be opened to discharge no matter how long the pulse of the ESD event occurs, and the method and the device have the advantages of small circuit area and high response speed.
The transient trigger unit can rapidly conduct connection between the control end of the discharge unit and the power supply in a preset time when an ESD event occurs, so that the control end of the discharge unit is conducted by an electric signal. When the duration of the ESD event exceeds the preset on time of the transient trigger unit, the transient trigger unit cannot continuously control the discharge unit to discharge, and at this time, as the power supply voltage increases, when the ESD voltage is higher than the threshold voltage of the dc trigger unit, the dc trigger unit conducts the connection between the control end of the discharge unit and the power supply, so that the control end of the discharge unit continuously maintains high voltage, thereby continuously discharging the ESD current.
Specifically, as shown in fig. 2, in the present application, the transient trigger unit forms a first ESD current leakage path, where the transient trigger unit includes: a first capacitor C1 and a first resistor R1; the first end of the first capacitor C1 is connected with a power supply, the second end of the first capacitor C1 is connected with the first end of the first resistor R1, and the second end of the first resistor R1 is grounded. The transient trigger unit further includes: a first high voltage transistor element M1; the gate of the first high-voltage transistor element M1 is connected with the second end of the first capacitor C1 and the first end of the first resistor R1; the drain of the first high voltage transistor element M1 is connected to a power source, and the source of the first high voltage transistor element M1 is grounded. In the present application, the first high voltage transistor element M1 is an N-type transistor element, and specifically, the first high voltage transistor element M1 is an NLDMOS transistor.
Among them, NLDMOS tube is a kind of high-voltage resistant MOSFET device. In an NLDMOS device, an N-type channel is connected with a source electrode and a drain electrode, a P-type region is connected with a gate electrode and the drain electrode, when a positive voltage is applied to the gate electrode, the P-type region forms an inversion region, a conductive channel is formed between the gate electrode and the source electrode, and the resistance of the conductive channel can be adjusted by controlling the voltage of the gate electrode, so that the current of the device is controlled. Under high voltage regulation, breakdown phenomenon is easy to occur due to large voltage difference between the drain electrode and the source electrode, and NLDMOS adopts a multi-channel structure in order to improve high voltage resistance of the device. In the multi-channel structure, the electric field is dispersed by adding a plurality of channels between the drain electrode and the source electrode, so that the breakdown phenomenon is avoided, and the high voltage resistance of the device is improved. The working principle of the NLDMOS is the prior art, and is not described here in detail.
In this application, the first capacitor C1 and the first resistor R1 form an RC trigger circuit structure. The RC trigger circuit is an efficient protection circuit, by which the second high voltage transistor element M2 can be turned on when an ESD event occurs, and the ESD current is discharged from the NLDMOS. The RC trigger circuit has a lower clamp voltage, but if the RC constant of the RC trigger circuit is smaller than the pulse time of ESD when an ESD event occurs, the ESD current is not completely discharged, and the purpose of protecting a chip cannot be achieved. Therefore, in order to solve the problems that the RC trigger circuit is difficult to completely discharge ESD current, the chip area is large due to the adoption of a large resistor and a large capacitor, and the circuit is wrongly triggered due to power supply ripple and interference generated by quick power-up due to the fact that the RC constant of the RC trigger circuit is too large, the direct-current trigger circuit of the ESD is further built on the basis of the built RC trigger circuit.
In this application, direct current trigger unit and relief unit constitute a second ESD current relief path, and wherein direct current trigger unit includes: a first diode D1 and a second resistor R2; the cathode of the first diode D1 is connected to the power source, the anode of the first diode D1 is connected to the source of the first high voltage transistor element M1 and the first end of the second resistor R2, and the second end of the second resistor R2 is grounded. Wherein the bleed unit comprises: a second high voltage transistor element M2; the grid electrode of the second high-voltage transistor element M2 is connected with the positive electrode of the first diode D1 and the first end of the second resistor R2, the drain electrode of the second high-voltage transistor element M2 is connected with a power supply, and the source electrode of the second high-voltage transistor element M2 is grounded; the second high voltage transistor element M2 is an N-type transistor element, and specifically, the second high voltage transistor element M2 is an NLDMOS transistor.
The first diode D1 and the second resistor R2 form a dc trigger circuit, and the trigger voltage of the dc trigger circuit can be adjusted by adjusting the first diode D1 and the second resistor R2.
Thus, in the present application, the ESD current drain path formed by the first capacitor C1, the first resistor R1, and the first high-voltage transistor element M1, and the ESD current drain path formed by the first diode D1, the second resistor R2, the parasitic capacitor C2 of the second high-voltage transistor element M2, and the second high-voltage transistor element M2 form two trigger paths, wherein the first diode D1 is a high-voltage diode, the breakdown voltage of the first diode D1 is higher than the power supply voltage, that is, the operation voltage of the circuit, and the breakdown voltage of the first diode D1 is lower than the breakdown voltage of the second high-voltage transistor element M2, and the parasitic capacitor C2 of the second high-voltage transistor element M2 is the gate-drain parasitic capacitor of the second high-voltage transistor element M2.
Since the size of the second resistor R2 is determined by the dc trigger voltage, and the parasitic capacitance C2 of the gate and the drain of the second high voltage transistor element M2 is not convenient to adjust, the time constant of the RC trigger circuit can be adjusted by adjusting the first capacitor C1 and the first resistor R1 of the RC trigger circuit. Meanwhile, due to the existence of the direct current trigger circuit constructed by the method, the direct current trigger circuit can be continuously triggered in the ESD event period, so that the RC constant of the RC trigger circuit can be set to be a smaller value, and error conduction during quick power-on is avoided.
At present, the traditional GGNMOS circuit generally only depends on drain-source breakdown discharge, in order to improve the efficiency of an ESD protection circuit, the transient trigger and direct current trigger circuits are constructed, when an ESD event occurs, corresponding NLDMOS tubes can be opened through two paths of the transient trigger unit and the direct current trigger unit to discharge ESD current, meanwhile, the characteristics that the RC trigger circuit is high in response speed, low in clamping voltage and capable of adapting to any pulse length are combined, accordingly, the corresponding NLDMOS tubes can be opened quickly to discharge no matter how long the pulse of the ESD event occurs, and the discharging capability of NLDMOS channel conduction is improved during the ESD event.
In order to prevent the first high voltage transistor element M1 from being broken down by high voltage, the protection circuit of the present application further includes: a second diode D2; the cathode of the second diode D2 is connected to the gate of the first high-voltage transistor element M1, and the anode of the second diode D2 is connected to the first end of the second resistor R2. The second diode D2 is a low-voltage diode. The second diode D2 prevents the first high voltage transistor element M1 from being broken down by a high voltage by connecting the gate and the source of the first high voltage transistor element M1 to protect the gate of the first high voltage transistor element M1.
In order to protect the second high voltage transistor element M2, the protection circuit of the present application further includes: a third diode D3; the cathode of the third diode D3 is connected to the gate of the second high voltage transistor element M2, and the anode of the third diode D3 is grounded. The third diode D3 may be any diode, and the third diode D3 is a protection diode, and is used for clamping the gate voltage of the second high voltage transistor element M2 when the ESD event occurs, so as to prevent the gate voltage from being broken down too high, and meanwhile, the effect of adjusting the trigger voltage, the maximum bleeder current and the breakdown voltage can be achieved by controlling the gate voltage. In this application, the number of the third diodes D3 may be multiple, and may be reverse connection or multiple forward connection in series, and different breakdown voltages of different diodes may adjust the gate voltage value of the NLDMOS transistor when the ESD event occurs.
When an ESD event occurs, the voltage at two ends of the parasitic capacitance C2 of the first capacitor C1 and the second high-voltage transistor element M2 is almost unchanged due to steep rising edges, the first high-voltage transistor element M1 is turned on to rapidly charge the grid of the second high-voltage transistor element M2, the grid voltage of the second high-voltage transistor element M2 is rapidly increased, so that the source electrode and the drain electrode of the second high-voltage transistor element M2 are conducted, and the discharging of the ESD current is performed. When the duration of the ESD event exceeds the RC time constant of the RC trigger circuit, the transient trigger circuit cannot support the continuous discharge of the ESD current, and if the power supply voltage is high, the first diode D1 will break down, the gate voltage of the second high voltage transistor M2 will continue to maintain the high voltage, and the source and drain of the second high voltage transistor M2 will be turned on, and the discharge of the ESD current will be sustained by the dc trigger circuit.
Protection diode the third diode D3 is turned on when the gate voltage of the second high voltage transistor M2 rises rapidly due to the ESD event, and if the gate voltage rises above the withstand voltage or turn-on voltage of the third diode D3, the third diode D3 is turned on to clamp the gate voltage of the second high voltage transistor M2. The gate voltage of the NLDMOS during an ESD event can be precisely controlled by varying the connection of the third diode D3 and the device type.
In a second aspect of the present application, there is provided a chip comprising: the direct current transient hybrid triggering high-voltage ESD protection circuit.
In summary, the application uses the high-voltage ESD circuit mixed by the direct-current trigger circuit and the transient trigger circuit by constructing two ESD current discharging paths of the transient trigger unit and the direct-current trigger unit, so that when an ESD event occurs, the corresponding discharging units can be opened through the two paths of the transient trigger unit and the direct-current trigger unit to discharge the ESD current, the transient trigger unit has the characteristic of high response speed, the direct-current trigger unit has the characteristic of adapting to any pulse length in a direct-current trigger mode, and the circuit structure of the transient trigger and the direct-current trigger is constructed, so that the corresponding discharging units can be opened to discharge no matter the pulse length of the ESD event, and the circuit has the advantages of small circuit area and high response speed. Meanwhile, the NLDMOS grid voltage is controlled by adding the protection diode, so that the discharge state of the NLDMOS during an ESD event can be accurately controlled, an ESD protection circuit for high-voltage application is realized by using the high-voltage NLDMOS and the high-voltage diode, and the ESD protection circuit has a smaller area.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises an element.
The foregoing is merely exemplary of the present application and is not intended to limit the present application. Various modifications and changes may be made to the present application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc. which are within the spirit and principles of the present application are intended to be included within the scope of the claims of the present application.
Claims (10)
1. A dc transient hybrid triggered high voltage ESD protection circuit comprising:
the device comprises a transient trigger unit, a direct current trigger unit and a discharge unit;
the transient trigger unit is used for providing an electric signal for the discharge unit at preset time when the ESD occurs so as to control the discharge unit to be conducted to discharge the ESD current;
the direct current trigger unit is used for controlling the discharge unit to be conducted so as to discharge the ESD current when the ESD voltage is higher than the threshold voltage.
2. The direct current transient hybrid triggered high voltage ESD protection circuit of claim 1, wherein the transient trigger unit comprises:
a first capacitor and a first resistor;
the first end of the first capacitor is connected with a power supply, the second end of the first capacitor is connected with the first end of the first resistor, and the second end of the first resistor is grounded.
3. The dc transient hybrid triggering high voltage ESD protection circuit of claim 2, wherein the transient triggering unit further comprises:
a first high voltage transistor element;
the grid electrode of the first high-voltage transistor element is connected with the second end of the first capacitor and the first end of the first resistor;
the drain electrode of the first high-voltage transistor element is connected with a power supply, and the source electrode of the first high-voltage transistor element is grounded.
4. The dc transient hybrid triggered high voltage ESD protection circuit of claim 3, wherein the dc trigger unit comprises:
a first diode and a second resistor;
the negative pole of first diode is connected with the power, the positive pole of first diode with the source of first high voltage transistor component and the first end of second resistance, the second ground connection of second resistance.
5. The dc transient hybrid triggered high voltage ESD protection circuit of claim 4, wherein the bleed unit comprises:
a second high voltage transistor element;
the grid electrode of the second high-voltage transistor element is connected with the positive electrode of the first diode and the first end of the second resistor, the drain electrode of the second high-voltage transistor element is connected with a power supply, and the source electrode of the second high-voltage transistor element is grounded;
the first high voltage transistor element and the second high voltage transistor element are N-type transistor elements.
6. The dc transient hybrid triggered high voltage ESD protection circuit of claim 5, wherein said protection circuit further comprises:
a second diode;
the negative electrode of the second diode is connected with the grid electrode of the first high-voltage transistor element, and the positive electrode of the second diode is connected with the first end of the second resistor.
7. The dc transient hybrid triggered high voltage ESD protection circuit of claim 6, wherein the protection circuit further comprises:
a third diode;
and the cathode of the third diode is connected with the grid electrode of the second high-voltage transistor element, and the anode of the third diode is grounded.
8. The dc transient hybrid triggering high voltage ESD protection circuit of claim 7, wherein the first diode is a high voltage diode and the second diode is a low voltage diode.
9. The dc transient hybrid triggered high voltage ESD protection circuit of claim 8, wherein the breakdown voltage of the first diode is higher than the supply voltage and the breakdown voltage of the first diode is lower than the breakdown voltage of the second high voltage transistor element.
10. A chip, comprising:
the dc transient hybrid triggered high voltage ESD protection circuit of any one of claims 1-9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311542330.9A CN117767240A (en) | 2023-11-17 | 2023-11-17 | Direct-current transient hybrid triggering high-voltage ESD protection circuit and chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311542330.9A CN117767240A (en) | 2023-11-17 | 2023-11-17 | Direct-current transient hybrid triggering high-voltage ESD protection circuit and chip |
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| Publication Number | Publication Date |
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| CN117767240A true CN117767240A (en) | 2024-03-26 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202311542330.9A Pending CN117767240A (en) | 2023-11-17 | 2023-11-17 | Direct-current transient hybrid triggering high-voltage ESD protection circuit and chip |
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| CN (1) | CN117767240A (en) |
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